diff options
| author | Owen Anderson <resistor@mac.com> | 2011-08-23 17:26:35 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-08-23 17:26:35 +0000 |
| commit | b4ff9698bd72eceedfe6a9c116713cbc0d97e6bf (patch) | |
| tree | 3bf63f28407253fb119c9176237f45148ca61581 /test/MC/Disassembler | |
| parent | 38fb2db6c9f64a59875d034e2a2cab27603c1884 (diff) | |
| download | llvm-b4ff9698bd72eceedfe6a9c116713cbc0d97e6bf.tar.gz llvm-b4ff9698bd72eceedfe6a9c116713cbc0d97e6bf.tar.bz2 llvm-b4ff9698bd72eceedfe6a9c116713cbc0d97e6bf.tar.xz | |
Port more assemble tests over to disassembly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138336 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler')
| -rw-r--r-- | test/MC/Disassembler/ARM/thumb1.txt | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/thumb1.txt b/test/MC/Disassembler/ARM/thumb1.txt index afd4ff88fe..04052a4d99 100644 --- a/test/MC/Disassembler/ARM/thumb1.txt +++ b/test/MC/Disassembler/ARM/thumb1.txt @@ -284,3 +284,62 @@ 0x23 0x43 +#------------------------------------------------------------------------------ +# POP +#------------------------------------------------------------------------------ +# CHECK: pop {r2, r3, r6} + +0x4c 0xbc + + +#------------------------------------------------------------------------------ +# PUSH +#------------------------------------------------------------------------------ +# CHECK: push {r1, r2, r7} + +0x86 0xb4 + + +#------------------------------------------------------------------------------ +# REV/REV16/REVSH +#------------------------------------------------------------------------------ +# CHECK: rev r6, r3 +# CHECK: rev16 r7, r2 +# CHECK: revsh r5, r1 + +0x1e 0xba +0x57 0xba +0xcd 0xba + + +#------------------------------------------------------------------------------ +# ROR +#------------------------------------------------------------------------------ +# CHECK: rors r2, r7 + +0xfa 0x41 + +#------------------------------------------------------------------------------ +# RSB +#------------------------------------------------------------------------------ +# CHECK: rsbs r1, r3, #0 + +0x59 0x42 + + +#------------------------------------------------------------------------------ +# SBC +#------------------------------------------------------------------------------ +# CHECK: sbcs r4, r3 + +0x9c 0x41 + + +#------------------------------------------------------------------------------ +# SETEND +#------------------------------------------------------------------------------ +# CHECK: setend be +# CHECK: setend le + +0x58 0xb6 +0x50 0xb6 |