diff options
author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-19 16:09:03 +0000 |
---|---|---|
committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-19 16:09:03 +0000 |
commit | eddfaad1ef9a208a8a9ee23c26fac4d980caa99a (patch) | |
tree | 507518f73242fc7a0f4be514d0f73b542885c6da /test/MC/Disassembler | |
parent | b1a003f37725a31e5e744c46112b628c5e0aeb8a (diff) | |
download | llvm-eddfaad1ef9a208a8a9ee23c26fac4d980caa99a.tar.gz llvm-eddfaad1ef9a208a8a9ee23c26fac4d980caa99a.tar.bz2 llvm-eddfaad1ef9a208a8a9ee23c26fac4d980caa99a.tar.xz |
[SystemZ] Start adding z196 and zEC12 support
This first step just adds definitions for SLLK, SRLK and SRAK.
The next patch will actually make use of them during codegen.
insn-bad.s tests that some form of error is reported when using these
instructions on z10. More work is needed to get the "instruction requires:
distinct-ops" that we'd ideally like, so I've stubbed that part out for now.
I'll come back and make it mandatory once the necessary changes are in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186680 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler')
-rw-r--r-- | test/MC/Disassembler/SystemZ/insns.txt | 110 |
1 files changed, 109 insertions, 1 deletions
diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt index 101a1683aa..6f5e332160 100644 --- a/test/MC/Disassembler/SystemZ/insns.txt +++ b/test/MC/Disassembler/SystemZ/insns.txt @@ -1,5 +1,5 @@ # Test instructions that don't have PC-relative operands. -# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s +# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s # CHECK: adbr %f0, %f0 0xb3 0x1a 0x00 0x00 @@ -5215,6 +5215,42 @@ # CHECK: sllg %r0, %r0, 524287(%r15) 0xeb 0x00 0xff 0xff 0x7f 0x0d +# CHECK: sllk %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xdf + +# CHECK: sllk %r15, %r1, 0 +0xeb 0xf1 0x00 0x00 0x00 0xdf + +# CHECK: sllk %r1, %r15, 0 +0xeb 0x1f 0x00 0x00 0x00 0xdf + +# CHECK: sllk %r15, %r15, 0 +0xeb 0xff 0x00 0x00 0x00 0xdf + +# CHECK: sllk %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xdf + +# CHECK: sllk %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xdf + +# CHECK: sllk %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xdf + +# CHECK: sllk %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xdf + +# CHECK: sllk %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xdf + +# CHECK: sllk %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xdf + +# CHECK: sllk %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xdf + +# CHECK: sllk %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xdf + # CHECK: sll %r0, 0 0x89 0x00 0x00 0x00 @@ -5416,6 +5452,42 @@ # CHECK: srag %r0, %r0, 524287(%r15) 0xeb 0x00 0xff 0xff 0x7f 0x0a +# CHECK: srak %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xdc + +# CHECK: srak %r15, %r1, 0 +0xeb 0xf1 0x00 0x00 0x00 0xdc + +# CHECK: srak %r1, %r15, 0 +0xeb 0x1f 0x00 0x00 0x00 0xdc + +# CHECK: srak %r15, %r15, 0 +0xeb 0xff 0x00 0x00 0x00 0xdc + +# CHECK: srak %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xdc + +# CHECK: srak %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xdc + +# CHECK: srak %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xdc + +# CHECK: srak %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xdc + +# CHECK: srak %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xdc + +# CHECK: srak %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xdc + +# CHECK: srak %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xdc + +# CHECK: srak %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xdc + # CHECK: sra %r0, 0 0x8a 0x00 0x00 0x00 @@ -5476,6 +5548,42 @@ # CHECK: srlg %r0, %r0, 524287(%r15) 0xeb 0x00 0xff 0xff 0x7f 0x0c +# CHECK: srlk %r0, %r0, 0 +0xeb 0x00 0x00 0x00 0x00 0xde + +# CHECK: srlk %r15, %r1, 0 +0xeb 0xf1 0x00 0x00 0x00 0xde + +# CHECK: srlk %r1, %r15, 0 +0xeb 0x1f 0x00 0x00 0x00 0xde + +# CHECK: srlk %r15, %r15, 0 +0xeb 0xff 0x00 0x00 0x00 0xde + +# CHECK: srlk %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0xde + +# CHECK: srlk %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0xde + +# CHECK: srlk %r0, %r0, 1 +0xeb 0x00 0x00 0x01 0x00 0xde + +# CHECK: srlk %r0, %r0, 524287 +0xeb 0x00 0x0f 0xff 0x7f 0xde + +# CHECK: srlk %r0, %r0, 0(%r1) +0xeb 0x00 0x10 0x00 0x00 0xde + +# CHECK: srlk %r0, %r0, 0(%r15) +0xeb 0x00 0xf0 0x00 0x00 0xde + +# CHECK: srlk %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0xde + +# CHECK: srlk %r0, %r0, 524287(%r15) +0xeb 0x00 0xff 0xff 0x7f 0xde + # CHECK: srl %r0, 0 0x88 0x00 0x00 0x00 |