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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-12 08:21:54 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-12 08:21:54 +0000 |
| commit | 0b87955888131def2f8dbc2e63bb67fa3749f364 (patch) | |
| tree | fffb0ce19071cd2cfd44b5f72a6ec36e3ca6f378 /test/MC/Mips/mips64r2/invalid.s | |
| parent | 3299dee207027b1bdef4282bda31ca6c3cc8e6a4 (diff) | |
| download | llvm-0b87955888131def2f8dbc2e63bb67fa3749f364.tar.gz llvm-0b87955888131def2f8dbc2e63bb67fa3749f364.tar.bz2 llvm-0b87955888131def2f8dbc2e63bb67fa3749f364.tar.xz | |
R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec*
There is not such thing as a 0-data ds instruction, and the data
operand needs to be a vgpr set to something meaningful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210756 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Mips/mips64r2/invalid.s')
0 files changed, 0 insertions, 0 deletions