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| author | Richard Osborne <richard@xmos.com> | 2012-12-17 13:50:04 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2012-12-17 13:50:04 +0000 |
| commit | 35150cbf4166ae8d69032d355f1e8d83b4a6eb3c (patch) | |
| tree | c2e54c7213d750760d601f6d230c784464d05993 /test/MC | |
| parent | 7f7d201d737ecb354abd683d63ab8abbf83158c3 (diff) | |
| download | llvm-35150cbf4166ae8d69032d355f1e8d83b4a6eb3c.tar.gz llvm-35150cbf4166ae8d69032d355f1e8d83b4a6eb3c.tar.bz2 llvm-35150cbf4166ae8d69032d355f1e8d83b4a6eb3c.tar.xz | |
Add instruction encodings / disassembly support for rus instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170330 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
| -rw-r--r-- | test/MC/Disassembler/XCore/xcore.txt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt index 44c870accf..a959a8928a 100644 --- a/test/MC/Disassembler/XCore/xcore.txt +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -138,3 +138,23 @@ # CHECK: sext r9, r1 0x45 0x37 + +# rus instructions + +# CHECK: chkct res[r1], 8 +0x34 0xcf + +# CHECK: getr r11, 2 +0x4e 0x87 + +# CHECK: mkmsk r4, 24 +0x72 0xa7 + +# CHECK: outct res[r3], r0 +0xcc 0x4e + +# CHECK: sext r8, 16 +0xb1 0x37 + +# CHECK: zext r2, 32 +0xd8 0x46 |