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| author | Jim Grosbach <grosbach@apple.com> | 2011-10-28 16:57:07 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-10-28 16:57:07 +0000 |
| commit | 5d0492cfc4521ccb13b4961227b279991a17c393 (patch) | |
| tree | 6bcb5252705b86ab525a2ac80d23400de6761da1 /test/MC | |
| parent | be5d6bcfc6ad4d5b771bb491c8ec6c87fcd3c425 (diff) | |
| download | llvm-5d0492cfc4521ccb13b4961227b279991a17c393.tar.gz llvm-5d0492cfc4521ccb13b4961227b279991a17c393.tar.bz2 llvm-5d0492cfc4521ccb13b4961227b279991a17c393.tar.xz | |
Thumb2 ADD/SUB instructions encoding selection outside IT block.
Outside an IT block, "add r3, #2" should select a 32-bit wide encoding
rather than generating an error indicating the 16-bit encoding is only
legal in an IT block (outside, the 'S' suffic is required for the 16-bit
encoding).
rdar://10348481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143201 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 4 | ||||
| -rw-r--r-- | test/MC/ARM/thumb-diagnostics.s | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index a024f473cf..0a183e9f5a 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -73,6 +73,7 @@ _func: add r12, r6, #0x100 addw r12, r6, #0x100 adds r1, r2, #0x1f0 + add r2, #1 @ CHECK: itet eq @ encoding: [0x0a,0xbf] @ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d] @@ -85,6 +86,7 @@ _func: @ CHECK: add.w r12, r6, #256 @ encoding: [0x06,0xf5,0x80,0x7c] @ CHECK: addw r12, r6, #256 @ encoding: [0x06,0xf2,0x00,0x1c] @ CHECK: adds.w r1, r2, #496 @ encoding: [0x12,0xf5,0xf8,0x71] +@ CHECK: add.w r2, r2, #1 @ encoding: [0x02,0xf1,0x01,0x02] @------------------------------------------------------------------------------ @@ -2533,6 +2535,7 @@ _func: sub r12, r6, #0x100 subw r12, r6, #0x100 subs r1, r2, #0x1f0 + sub r2, #1 @ CHECK: itet eq @ encoding: [0x0a,0xbf] @ CHECK: subeq r1, r2, #4 @ encoding: [0x11,0x1f] @@ -2545,6 +2548,7 @@ _func: @ CHECK: sub.w r12, r6, #256 @ encoding: [0xa6,0xf5,0x80,0x7c] @ CHECK: subw r12, r6, #256 @ encoding: [0xa6,0xf2,0x00,0x1c] @ CHECK: subs.w r1, r2, #496 @ encoding: [0xb2,0xf5,0xf8,0x71] +@ CHECK: sub.w r2, r2, #1 @ encoding: [0xa2,0xf1,0x01,0x02] @------------------------------------------------------------------------------ diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s index d02c27e1ae..548ba70bfc 100644 --- a/test/MC/ARM/thumb-diagnostics.s +++ b/test/MC/ARM/thumb-diagnostics.s @@ -125,10 +125,10 @@ error: invalid operand for instruction add sp, #3 add sp, sp, #512 add r2, sp, #1024 -@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled @ CHECK-ERRORS: add sp, #-1 @ CHECK-ERRORS: ^ -@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled @ CHECK-ERRORS: add sp, #3 @ CHECK-ERRORS: ^ @ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled |