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| author | Kevin Enderby <enderby@apple.com> | 2014-01-23 22:34:42 +0000 |
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2014-01-23 22:34:42 +0000 |
| commit | 7772f9af13b753296227f380cee14080755250d1 (patch) | |
| tree | c8da1c03edc06f6fc97e3b5073b58cead62ba90c /test/MC | |
| parent | 2a02d4bee3f683180a40b65a2c3833ceb64236c3 (diff) | |
| download | llvm-7772f9af13b753296227f380cee14080755250d1.tar.gz llvm-7772f9af13b753296227f380cee14080755250d1.tar.bz2 llvm-7772f9af13b753296227f380cee14080755250d1.tar.xz | |
Update the X86 assembler for .intel_syntax to produce an error for invalid base
registers in memory addresses that do not match the index register. As it does
for .att_syntax.
rdar://15887380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199948 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
| -rw-r--r-- | test/MC/X86/intel-syntax-invalid-basereg.s | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/test/MC/X86/intel-syntax-invalid-basereg.s b/test/MC/X86/intel-syntax-invalid-basereg.s new file mode 100644 index 0000000000..fe026e1840 --- /dev/null +++ b/test/MC/X86/intel-syntax-invalid-basereg.s @@ -0,0 +1,7 @@ +// RUN: not llvm-mc -triple x86_64-unknown-unknown %s 2> %t.err +// RUN: FileCheck < %t.err %s + +.intel_syntax + +// CHECK: error: base register is 64-bit, but index register is not + lea rax, [rdi + edx] |