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| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-06-22 22:25:01 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-06-22 22:25:01 +0000 |
| commit | 7a3698ecc95d16af547fce9acfd15ed81dd0ad55 (patch) | |
| tree | 2a8e0232cf8758ac97239b204cf61259ed52ca1a /test/MC | |
| parent | 9124b45918e0b59c37604ea4bb033aaa691a168d (diff) | |
| download | llvm-7a3698ecc95d16af547fce9acfd15ed81dd0ad55.tar.gz llvm-7a3698ecc95d16af547fce9acfd15ed81dd0ad55.tar.bz2 llvm-7a3698ecc95d16af547fce9acfd15ed81dd0ad55.tar.xz | |
MC: adjust text section flags for WoA
Correct the section flags for code built for Windows on ARM with
`-ffunction-sections`. Windows on ARM uses solely Thumb-2 instructions, and
indicates that the function is thumb by placing it in a text section that has
IMAGE_SCN_MEM_16BIT flag set.
When we encounter a .section directive, a new section is constructed. This may
be a text segment. In order to identify that we need the additional flag,
expose the target triple through the ObjectFileInfo as this information is lost
otherwise.
Since any modern ARM targeting environment on Windows would be Thumb-2 (Windows
ARM NT or Windows Embedded Compact), introducing a new flag to indicate the
section attribute seems to be a bit overkill. Simply depend on the target
triple. Since there is one location that this information is currently needed,
creating a target specific assembly parser and delegating the parsing of section
switches also feels a bit heavy handed. If it turns out that this information
ends up changing additional behaviour, then it may be worth considering that
alternative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211481 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
| -rw-r--r-- | test/MC/ARM/Windows/multiple-text-sections.s | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/test/MC/ARM/Windows/multiple-text-sections.s b/test/MC/ARM/Windows/multiple-text-sections.s new file mode 100644 index 0000000000..241eee4bca --- /dev/null +++ b/test/MC/ARM/Windows/multiple-text-sections.s @@ -0,0 +1,58 @@ +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-readobj -s - | FileCheck %s + + .syntax unified + .text + .thumb + + .section .text,"xr",one_only,a + + .def a; + .scl 2; + .type 32; + .endef +a: + movs r0, #65 + bx lr + + .section .text,"xr",one_only,b + + .def b; + .scl 2; + .type 32; + .endef + .thumb_func +b: + movs r0, #66 + bx lr + +@ CHECK: Sections [ +@ CHECK: Section { +@ CHECK: Name: .text +@ CHECK: Characteristics [ +@ CHECK: IMAGE_SCN_CNT_CODE +@ CHECK: IMAGE_SCN_MEM_16BIT +@ CHECK: IMAGE_SCN_MEM_EXECUTE +@ CHECK: IMAGE_SCN_MEM_READ +@ CHECK: ] +@ CHECK: } +@ CHECK: Section { +@ CHECK: Name: .text +@ CHECK: Characteristics [ +@ CHECK: IMAGE_SCN_CNT_CODE +@ CHECK: IMAGE_SCN_MEM_16BIT +@ CHECK: IMAGE_SCN_MEM_EXECUTE +@ CHECK: IMAGE_SCN_MEM_READ +@ CHECK: ] +@ CHECK: } +@ CHECK: Section { +@ CHECK: Name: .text +@ CHECK: Characteristics [ +@ CHECK: IMAGE_SCN_CNT_CODE +@ CHECK: IMAGE_SCN_MEM_16BIT +@ CHECK: IMAGE_SCN_MEM_EXECUTE +@ CHECK: IMAGE_SCN_MEM_READ +@ CHECK: ] +@ CHECK: } +@ CHECK: ] + |