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| author | Tim Northover <tnorthover@apple.com> | 2014-03-29 10:18:08 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-03-29 10:18:08 +0000 |
| commit | 7b837d8c75f78fe55c9b348b9ec2281169a48d2a (patch) | |
| tree | e8e01e73cf4d0723a13e49e4b5d8a66f896d184f /test/MC | |
| parent | 69bd9577fc423edea13479eaacf7b1844faa6c6a (diff) | |
| download | llvm-7b837d8c75f78fe55c9b348b9ec2281169a48d2a.tar.gz llvm-7b837d8c75f78fe55c9b348b9ec2281169a48d2a.tar.bz2 llvm-7b837d8c75f78fe55c9b348b9ec2281169a48d2a.tar.xz | |
ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.
Everything will be easier with the target in-tree though, hence this
commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
40 files changed, 13442 insertions, 0 deletions
diff --git a/test/MC/ARM64/advsimd.s b/test/MC/ARM64/advsimd.s new file mode 100644 index 0000000000..fce0832f12 --- /dev/null +++ b/test/MC/ARM64/advsimd.s @@ -0,0 +1,1997 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 -show-encoding < %s | FileCheck %s + +foo: + + abs.8b v0, v0 + abs.16b v0, v0 + abs.4h v0, v0 + abs.8h v0, v0 + abs.2s v0, v0 + abs.4s v0, v0 + +; CHECK: abs.8b v0, v0 ; encoding: [0x00,0xb8,0x20,0x0e] +; CHECK: abs.16b v0, v0 ; encoding: [0x00,0xb8,0x20,0x4e] +; CHECK: abs.4h v0, v0 ; encoding: [0x00,0xb8,0x60,0x0e] +; CHECK: abs.8h v0, v0 ; encoding: [0x00,0xb8,0x60,0x4e] +; CHECK: abs.2s v0, v0 ; encoding: [0x00,0xb8,0xa0,0x0e] +; CHECK: abs.4s v0, v0 ; encoding: [0x00,0xb8,0xa0,0x4e] + + add.8b v0, v0, v0 + add.16b v0, v0, v0 + add.4h v0, v0, v0 + add.8h v0, v0, v0 + add.2s v0, v0, v0 + add.4s v0, v0, v0 + add.2d v0, v0, v0 + +; CHECK: add.8b v0, v0, v0 ; encoding: [0x00,0x84,0x20,0x0e] +; CHECK: add.16b v0, v0, v0 ; encoding: [0x00,0x84,0x20,0x4e] +; CHECK: add.4h v0, v0, v0 ; encoding: [0x00,0x84,0x60,0x0e] +; CHECK: add.8h v0, v0, v0 ; encoding: [0x00,0x84,0x60,0x4e] +; CHECK: add.2s v0, v0, v0 ; encoding: [0x00,0x84,0xa0,0x0e] +; CHECK: add.4s v0, v0, v0 ; encoding: [0x00,0x84,0xa0,0x4e] +; CHECK: add.2d v0, v0, v0 ; encoding: [0x00,0x84,0xe0,0x4e] + + add d1, d2, d3 + +; CHECK: add d1, d2, d3 ; encoding: [0x41,0x84,0xe3,0x5e] + + addhn.8b v0, v0, v0 + addhn2.16b v0, v0, v0 + addhn.4h v0, v0, v0 + addhn2.8h v0, v0, v0 + addhn.2s v0, v0, v0 + addhn2.4s v0, v0, v0 + +; CHECK: addhn.8b v0, v0, v0 ; encoding: [0x00,0x40,0x20,0x0e] +; CHECK: addhn2.16b v0, v0, v0 ; encoding: [0x00,0x40,0x20,0x4e] +; CHECK: addhn.4h v0, v0, v0 ; encoding: [0x00,0x40,0x60,0x0e] +; CHECK: addhn2.8h v0, v0, v0 ; encoding: [0x00,0x40,0x60,0x4e] +; CHECK: addhn.2s v0, v0, v0 ; encoding: [0x00,0x40,0xa0,0x0e] +; CHECK: addhn2.4s v0, v0, v0 ; encoding: [0x00,0x40,0xa0,0x4e] + + addp.8b v0, v0, v0 + addp.16b v0, v0, v0 + addp.4h v0, v0, v0 + addp.8h v0, v0, v0 + addp.2s v0, v0, v0 + addp.4s v0, v0, v0 + addp.2d v0, v0, v0 + +; CHECK: addp.8b v0, v0, v0 ; encoding: [0x00,0xbc,0x20,0x0e] +; CHECK: addp.16b v0, v0, v0 ; encoding: [0x00,0xbc,0x20,0x4e] +; CHECK: addp.4h v0, v0, v0 ; encoding: [0x00,0xbc,0x60,0x0e] +; CHECK: addp.8h v0, v0, v0 ; encoding: [0x00,0xbc,0x60,0x4e] +; CHECK: addp.2s v0, v0, v0 ; encoding: [0x00,0xbc,0xa0,0x0e] +; CHECK: addp.4s v0, v0, v0 ; encoding: [0x00,0xbc,0xa0,0x4e] +; CHECK: addp.2d v0, v0, v0 ; encoding: [0x00,0xbc,0xe0,0x4e] + + addp.2d d0, v0 + +; CHECK: addp.2d d0, v0 ; encoding: [0x00,0xb8,0xf1,0x5e] + + addv.8b b0, v0 + addv.16b b0, v0 + addv.4h h0, v0 + addv.8h h0, v0 + addv.4s s0, v0 + +; CHECK: addv.8b b0, v0 ; encoding: [0x00,0xb8,0x31,0x0e] +; CHECK: addv.16b b0, v0 ; encoding: [0x00,0xb8,0x31,0x4e] +; CHECK: addv.4h h0, v0 ; encoding: [0x00,0xb8,0x71,0x0e] +; CHECK: addv.8h h0, v0 ; encoding: [0x00,0xb8,0x71,0x4e] +; CHECK: addv.4s s0, v0 ; encoding: [0x00,0xb8,0xb1,0x4e] + + +; INS/DUP + dup.2d v0, x3 + dup.4s v0, w3 + dup.2s v0, w3 + dup.8h v0, w3 + dup.4h v0, w3 + dup.16b v0, w3 + dup.8b v0, w3 + + dup v1.2d, x3 + dup v2.4s, w4 + dup v3.2s, w5 + dup v4.8h, w6 + dup v5.4h, w7 + dup v6.16b, w8 + dup v7.8b, w9 + +; CHECK: dup.2d v0, x3 ; encoding: [0x60,0x0c,0x08,0x4e] +; CHECK: dup.4s v0, w3 ; encoding: [0x60,0x0c,0x04,0x4e] +; CHECK: dup.2s v0, w3 ; encoding: [0x60,0x0c,0x04,0x0e] +; CHECK: dup.8h v0, w3 ; encoding: [0x60,0x0c,0x02,0x4e] +; CHECK: dup.4h v0, w3 ; encoding: [0x60,0x0c,0x02,0x0e] +; CHECK: dup.16b v0, w3 ; encoding: [0x60,0x0c,0x01,0x4e] +; CHECK: dup.8b v0, w3 ; encoding: [0x60,0x0c,0x01,0x0e] + +; CHECK: dup.2d v1, x3 ; encoding: [0x61,0x0c,0x08,0x4e] +; CHECK: dup.4s v2, w4 ; encoding: [0x82,0x0c,0x04,0x4e] +; CHECK: dup.2s v3, w5 ; encoding: [0xa3,0x0c,0x04,0x0e] +; CHECK: dup.8h v4, w6 ; encoding: [0xc4,0x0c,0x02,0x4e] +; CHECK: dup.4h v5, w7 ; encoding: [0xe5,0x0c,0x02,0x0e] +; CHECK: dup.16b v6, w8 ; encoding: [0x06,0x0d,0x01,0x4e] +; CHECK: dup.8b v7, w9 ; encoding: [0x27,0x0d,0x01,0x0e] + + dup.2d v0, v3[1] + dup.2s v0, v3[1] + dup.4s v0, v3[1] + dup.4h v0, v3[1] + dup.8h v0, v3[1] + dup.8b v0, v3[1] + dup.16b v0, v3[1] + + dup v7.2d, v9.d[1] + dup v6.2s, v8.s[1] + dup v5.4s, v7.s[2] + dup v4.4h, v6.h[3] + dup v3.8h, v5.h[4] + dup v2.8b, v4.b[5] + dup v1.16b, v3.b[6] + +; CHECK: dup.2d v0, v3[1] ; encoding: [0x60,0x04,0x18,0x4e] +; CHECK: dup.2s v0, v3[1] ; encoding: [0x60,0x04,0x0c,0x0e] +; CHECK: dup.4s v0, v3[1] ; encoding: [0x60,0x04,0x0c,0x4e] +; CHECK: dup.4h v0, v3[1] ; encoding: [0x60,0x04,0x06,0x0e] +; CHECK: dup.8h v0, v3[1] ; encoding: [0x60,0x04,0x06,0x4e] +; CHECK: dup.8b v0, v3[1] ; encoding: [0x60,0x04,0x03,0x0e] +; CHECK: dup.16b v0, v3[1] ; encoding: [0x60,0x04,0x03,0x4e] + +; CHECK: dup.2d v7, v9[1] ; encoding: [0x27,0x05,0x18,0x4e] +; CHECK: dup.2s v6, v8[1] ; encoding: [0x06,0x05,0x0c,0x0e] +; CHECK: dup.4s v5, v7[2] ; encoding: [0xe5,0x04,0x14,0x4e] +; CHECK: dup.4h v4, v6[3] ; encoding: [0xc4,0x04,0x0e,0x0e] +; CHECK: dup.8h v3, v5[4] ; encoding: [0xa3,0x04,0x12,0x4e] +; CHECK: dup.8b v2, v4[5] ; encoding: [0x82,0x04,0x0b,0x0e] +; CHECK: dup.16b v1, v3[6] ; encoding: [0x61,0x04,0x0d,0x4e] + + dup b3, v4[1] + dup h3, v4[1] + dup s3, v4[1] + dup d3, v4[1] + dup b3, v4.b[1] + dup h3, v4.h[1] + dup s3, v4.s[1] + dup d3, v4.d[1] + + mov b3, v4[1] + mov h3, v4[1] + mov s3, v4[1] + mov d3, v4[1] + mov b3, v4.b[1] + mov h3, v4.h[1] + mov s3, v4.s[1] + mov d3, v4.d[1] + +; CHECK: mov b3, v4[1] ; encoding: [0x83,0x04,0x03,0x5e] +; CHECK: mov h3, v4[1] ; encoding: [0x83,0x04,0x06,0x5e] +; CHECK: mov s3, v4[1] ; encoding: [0x83,0x04,0x0c,0x5e] +; CHECK: mov d3, v4[1] ; encoding: [0x83,0x04,0x18,0x5e] +; CHECK: mov b3, v4[1] ; encoding: [0x83,0x04,0x03,0x5e] +; CHECK: mov h3, v4[1] ; encoding: [0x83,0x04,0x06,0x5e] +; CHECK: mov s3, v4[1] ; encoding: [0x83,0x04,0x0c,0x5e] +; CHECK: mov d3, v4[1] ; encoding: [0x83,0x04,0x18,0x5e] + +; CHECK: mov b3, v4[1] ; encoding: [0x83,0x04,0x03,0x5e] +; CHECK: mov h3, v4[1] ; encoding: [0x83,0x04,0x06,0x5e] +; CHECK: mov s3, v4[1] ; encoding: [0x83,0x04,0x0c,0x5e] +; CHECK: mov d3, v4[1] ; encoding: [0x83,0x04,0x18,0x5e] +; CHECK: mov b3, v4[1] ; encoding: [0x83,0x04,0x03,0x5e] +; CHECK: mov h3, v4[1] ; encoding: [0x83,0x04,0x06,0x5e] +; CHECK: mov s3, v4[1] ; encoding: [0x83,0x04,0x0c,0x5e] +; CHECK: mov d3, v4[1] ; encoding: [0x83,0x04,0x18,0x5e] + + smov.s x3, v2[2] + smov x3, v2.s[2] + umov.s w3, v2[2] + umov w3, v2.s[2] + umov.d x3, v2[1] + umov x3, v2.d[1] + +; CHECK: smov.s x3, v2[2] ; encoding: [0x43,0x2c,0x14,0x4e] +; CHECK: smov.s x3, v2[2] ; encoding: [0x43,0x2c,0x14,0x4e] +; CHECK: umov.s w3, v2[2] ; encoding: [0x43,0x3c,0x14,0x0e] +; CHECK: umov.s w3, v2[2] ; encoding: [0x43,0x3c,0x14,0x0e] +; CHECK: umov.d x3, v2[1] ; encoding: [0x43,0x3c,0x18,0x4e] +; CHECK: umov.d x3, v2[1] ; encoding: [0x43,0x3c,0x18,0x4e] + + ; MOV aliases for UMOV instructions above + + mov.s w2, v3[3] + mov w5, v7.s[2] + mov.d x11, v13[1] + mov x17, v19.d[0] + +; CHECK: umov.s w2, v3[3] ; encoding: [0x62,0x3c,0x1c,0x0e] +; CHECK: umov.s w5, v7[2] ; encoding: [0xe5,0x3c,0x14,0x0e] +; CHECK: umov.d x11, v13[1] ; encoding: [0xab,0x3d,0x18,0x4e] +; CHECK: umov.d x17, v19[0] ; encoding: [0x71,0x3e,0x08,0x4e] + + ins.d v2[1], x5 + ins.s v2[1], w5 + ins.h v2[1], w5 + ins.b v2[1], w5 + + ins v2.d[1], x5 + ins v2.s[1], w5 + ins v2.h[1], w5 + ins v2.b[1], w5 + +; CHECK: ins.d v2[1], x5 ; encoding: [0xa2,0x1c,0x18,0x4e] +; CHECK: ins.s v2[1], w5 ; encoding: [0xa2,0x1c,0x0c,0x4e] +; CHECK: ins.h v2[1], w5 ; encoding: [0xa2,0x1c,0x06,0x4e] +; CHECK: ins.b v2[1], w5 ; encoding: [0xa2,0x1c,0x03,0x4e] + +; CHECK: ins.d v2[1], x5 ; encoding: [0xa2,0x1c,0x18,0x4e] +; CHECK: ins.s v2[1], w5 ; encoding: [0xa2,0x1c,0x0c,0x4e] +; CHECK: ins.h v2[1], w5 ; encoding: [0xa2,0x1c,0x06,0x4e] +; CHECK: ins.b v2[1], w5 ; encoding: [0xa2,0x1c,0x03,0x4e] + + ins.d v2[1], v15[1] + ins.s v2[1], v15[1] + ins.h v2[1], v15[1] + ins.b v2[1], v15[1] + + ins v2.d[1], v15.d[0] + ins v2.s[3], v15.s[2] + ins v2.h[7], v15.h[3] + ins v2.b[10], v15.b[5] + +; CHECK: ins.d v2[1], v15[1] ; encoding: [0xe2,0x45,0x18,0x6e] +; CHECK: ins.s v2[1], v15[1] ; encoding: [0xe2,0x25,0x0c,0x6e] +; CHECK: ins.h v2[1], v15[1] ; encoding: [0xe2,0x15,0x06,0x6e] +; CHECK: ins.b v2[1], v15[1] ; encoding: [0xe2,0x0d,0x03,0x6e] + +; CHECK: ins.d v2[1], v15[0] ; encoding: [0xe2,0x05,0x18,0x6e] +; CHECK: ins.s v2[3], v15[2] ; encoding: [0xe2,0x45,0x1c,0x6e] +; CHECK: ins.h v2[7], v15[3] ; encoding: [0xe2,0x35,0x1e,0x6e] +; CHECK: ins.b v2[10], v15[5] ; encoding: [0xe2,0x2d,0x15,0x6e] + +; MOV aliases for the above INS instructions. + mov.d v2[1], x5 + mov.s v3[1], w6 + mov.h v4[1], w7 + mov.b v5[1], w8 + + mov v9.d[1], x2 + mov v8.s[1], w3 + mov v7.h[1], w4 + mov v6.b[1], w5 + + mov.d v1[1], v10[1] + mov.s v2[1], v11[1] + mov.h v7[1], v12[1] + mov.b v8[1], v15[1] + + mov v2.d[1], v15.d[0] + mov v7.s[3], v16.s[2] + mov v8.h[7], v17.h[3] + mov v9.b[10], v18.b[5] + +; CHECK: ins.d v2[1], x5 ; encoding: [0xa2,0x1c,0x18,0x4e] +; CHECK: ins.s v3[1], w6 ; encoding: [0xc3,0x1c,0x0c,0x4e] +; CHECK: ins.h v4[1], w7 ; encoding: [0xe4,0x1c,0x06,0x4e] +; CHECK: ins.b v5[1], w8 ; encoding: [0x05,0x1d,0x03,0x4e] +; CHECK: ins.d v9[1], x2 ; encoding: [0x49,0x1c,0x18,0x4e] +; CHECK: ins.s v8[1], w3 ; encoding: [0x68,0x1c,0x0c,0x4e] +; CHECK: ins.h v7[1], w4 ; encoding: [0x87,0x1c,0x06,0x4e] +; CHECK: ins.b v6[1], w5 ; encoding: [0xa6,0x1c,0x03,0x4e] +; CHECK: ins.d v1[1], v10[1] ; encoding: [0x41,0x45,0x18,0x6e] +; CHECK: ins.s v2[1], v11[1] ; encoding: [0x62,0x25,0x0c,0x6e] +; CHECK: ins.h v7[1], v12[1] ; encoding: [0x87,0x15,0x06,0x6e] +; CHECK: ins.b v8[1], v15[1] ; encoding: [0xe8,0x0d,0x03,0x6e] +; CHECK: ins.d v2[1], v15[0] ; encoding: [0xe2,0x05,0x18,0x6e] +; CHECK: ins.s v7[3], v16[2] ; encoding: [0x07,0x46,0x1c,0x6e] +; CHECK: ins.h v8[7], v17[3] ; encoding: [0x28,0x36,0x1e,0x6e] +; CHECK: ins.b v9[10], v18[5] ; encoding: [0x49,0x2e,0x15,0x6e] + + + and.8b v0, v0, v0 + and.16b v0, v0, v0 + +; CHECK: and.8b v0, v0, v0 ; encoding: [0x00,0x1c,0x20,0x0e] +; CHECK: and.16b v0, v0, v0 ; encoding: [0x00,0x1c,0x20,0x4e] + + bic.8b v0, v0, v0 + +; CHECK: bic.8b v0, v0, v0 ; encoding: [0x00,0x1c,0x60,0x0e] + + cmeq.8b v0, v0, v0 + cmge.8b v0, v0, v0 + cmgt.8b v0, v0, v0 + cmhi.8b v0, v0, v0 + cmhs.8b v0, v0, v0 + cmtst.8b v0, v0, v0 + fabd.2s v0, v0, v0 + facge.2s v0, v0, v0 + facgt.2s v0, v0, v0 + faddp.2s v0, v0, v0 + fadd.2s v0, v0, v0 + fcmeq.2s v0, v0, v0 + fcmge.2s v0, v0, v0 + fcmgt.2s v0, v0, v0 + fdiv.2s v0, v0, v0 + fmaxnmp.2s v0, v0, v0 + fmaxnm.2s v0, v0, v0 + fmaxp.2s v0, v0, v0 + fmax.2s v0, v0, v0 + fminnmp.2s v0, v0, v0 + fminnm.2s v0, v0, v0 + fminp.2s v0, v0, v0 + fmin.2s v0, v0, v0 + fmla.2s v0, v0, v0 + fmls.2s v0, v0, v0 + fmulx.2s v0, v0, v0 + fmul.2s v0, v0, v0 + fmulx d2, d3, d1 + fmulx s2, s3, s1 + frecps.2s v0, v0, v0 + frsqrts.2s v0, v0, v0 + fsub.2s v0, v0, v0 + mla.8b v0, v0, v0 + mls.8b v0, v0, v0 + mul.8b v0, v0, v0 + pmul.8b v0, v0, v0 + saba.8b v0, v0, v0 + sabd.8b v0, v0, v0 + shadd.8b v0, v0, v0 + shsub.8b v0, v0, v0 + smaxp.8b v0, v0, v0 + smax.8b v0, v0, v0 + sminp.8b v0, v0, v0 + smin.8b v0, v0, v0 + sqadd.8b v0, v0, v0 + sqdmulh.4h v0, v0, v0 + sqrdmulh.4h v0, v0, v0 + sqrshl.8b v0, v0, v0 + sqshl.8b v0, v0, v0 + sqsub.8b v0, v0, v0 + srhadd.8b v0, v0, v0 + srshl.8b v0, v0, v0 + sshl.8b v0, v0, v0 + sub.8b v0, v0, v0 + uaba.8b v0, v0, v0 + uabd.8b v0, v0, v0 + uhadd.8b v0, v0, v0 + uhsub.8b v0, v0, v0 + umaxp.8b v0, v0, v0 + umax.8b v0, v0, v0 + uminp.8b v0, v0, v0 + umin.8b v0, v0, v0 + uqadd.8b v0, v0, v0 + uqrshl.8b v0, v0, v0 + uqshl.8b v0, v0, v0 + uqsub.8b v0, v0, v0 + urhadd.8b v0, v0, v0 + urshl.8b v0, v0, v0 + ushl.8b v0, v0, v0 + +; CHECK: cmeq.8b v0, v0, v0 ; encoding: [0x00,0x8c,0x20,0x2e] +; CHECK: cmge.8b v0, v0, v0 ; encoding: [0x00,0x3c,0x20,0x0e] +; CHECK: cmgt.8b v0, v0, v0 ; encoding: [0x00,0x34,0x20,0x0e] +; CHECK: cmhi.8b v0, v0, v0 ; encoding: [0x00,0x34,0x20,0x2e] +; CHECK: cmhs.8b v0, v0, v0 ; encoding: [0x00,0x3c,0x20,0x2e] +; CHECK: cmtst.8b v0, v0, v0 ; encoding: [0x00,0x8c,0x20,0x0e] +; CHECK: fabd.2s v0, v0, v0 ; encoding: [0x00,0xd4,0xa0,0x2e] +; CHECK: facge.2s v0, v0, v0 ; encoding: [0x00,0xec,0x20,0x2e] +; CHECK: facgt.2s v0, v0, v0 ; encoding: [0x00,0xec,0xa0,0x2e] +; CHECK: faddp.2s v0, v0, v0 ; encoding: [0x00,0xd4,0x20,0x2e] +; CHECK: fadd.2s v0, v0, v0 ; encoding: [0x00,0xd4,0x20,0x0e] +; CHECK: fcmeq.2s v0, v0, v0 ; encoding: [0x00,0xe4,0x20,0x0e] +; CHECK: fcmge.2s v0, v0, v0 ; encoding: [0x00,0xe4,0x20,0x2e] +; CHECK: fcmgt.2s v0, v0, v0 ; encoding: [0x00,0xe4,0xa0,0x2e] +; CHECK: fdiv.2s v0, v0, v0 ; encoding: [0x00,0xfc,0x20,0x2e] +; CHECK: fmaxnmp.2s v0, v0, v0 ; encoding: [0x00,0xc4,0x20,0x2e] +; CHECK: fmaxnm.2s v0, v0, v0 ; encoding: [0x00,0xc4,0x20,0x0e] +; CHECK: fmaxp.2s v0, v0, v0 ; encoding: [0x00,0xf4,0x20,0x2e] +; CHECK: fmax.2s v0, v0, v0 ; encoding: [0x00,0xf4,0x20,0x0e] +; CHECK: fminnmp.2s v0, v0, v0 ; encoding: [0x00,0xc4,0xa0,0x2e] +; CHECK: fminnm.2s v0, v0, v0 ; encoding: [0x00,0xc4,0xa0,0x0e] +; CHECK: fminp.2s v0, v0, v0 ; encoding: [0x00,0xf4,0xa0,0x2e] +; CHECK: fmin.2s v0, v0, v0 ; encoding: [0x00,0xf4,0xa0,0x0e] +; CHECK: fmla.2s v0, v0, v0 ; encoding: [0x00,0xcc,0x20,0x0e] +; CHECK: fmls.2s v0, v0, v0 ; encoding: [0x00,0xcc,0xa0,0x0e] +; CHECK: fmulx.2s v0, v0, v0 ; encoding: [0x00,0xdc,0x20,0x0e] + +; CHECK: fmul.2s v0, v0, v0 ; encoding: [0x00,0xdc,0x20,0x2e] +; CHECK: fmulx d2, d3, d1 ; encoding: [0x62,0xdc,0x61,0x5e] +; CHECK: fmulx s2, s3, s1 ; encoding: [0x62,0xdc,0x21,0x5e] +; CHECK: frecps.2s v0, v0, v0 ; encoding: [0x00,0xfc,0x20,0x0e] +; CHECK: frsqrts.2s v0, v0, v0 ; encoding: [0x00,0xfc,0xa0,0x0e] +; CHECK: fsub.2s v0, v0, v0 ; encoding: [0x00,0xd4,0xa0,0x0e] +; CHECK: mla.8b v0, v0, v0 ; encoding: [0x00,0x94,0x20,0x0e] +; CHECK: mls.8b v0, v0, v0 ; encoding: [0x00,0x94,0x20,0x2e] +; CHECK: mul.8b v0, v0, v0 ; encoding: [0x00,0x9c,0x20,0x0e] +; CHECK: pmul.8b v0, v0, v0 ; encoding: [0x00,0x9c,0x20,0x2e] +; CHECK: saba.8b v0, v0, v0 ; encoding: [0x00,0x7c,0x20,0x0e] +; CHECK: sabd.8b v0, v0, v0 ; encoding: [0x00,0x74,0x20,0x0e] +; CHECK: shadd.8b v0, v0, v0 ; encoding: [0x00,0x04,0x20,0x0e] +; CHECK: shsub.8b v0, v0, v0 ; encoding: [0x00,0x24,0x20,0x0e] +; CHECK: smaxp.8b v0, v0, v0 ; encoding: [0x00,0xa4,0x20,0x0e] +; CHECK: smax.8b v0, v0, v0 ; encoding: [0x00,0x64,0x20,0x0e] +; CHECK: sminp.8b v0, v0, v0 ; encoding: [0x00,0xac,0x20,0x0e] +; CHECK: smin.8b v0, v0, v0 ; encoding: [0x00,0x6c,0x20,0x0e] +; CHECK: sqadd.8b v0, v0, v0 ; encoding: [0x00,0x0c,0x20,0x0e] +; CHECK: sqdmulh.4h v0, v0, v0 ; encoding: [0x00,0xb4,0x60,0x0e] +; CHECK: sqrdmulh.4h v0, v0, v0 ; encoding: [0x00,0xb4,0x60,0x2e] +; CHECK: sqrshl.8b v0, v0, v0 ; encoding: [0x00,0x5c,0x20,0x0e] +; CHECK: sqshl.8b v0, v0, v0 ; encoding: [0x00,0x4c,0x20,0x0e] +; CHECK: sqsub.8b v0, v0, v0 ; encoding: [0x00,0x2c,0x20,0x0e] +; CHECK: srhadd.8b v0, v0, v0 ; encoding: [0x00,0x14,0x20,0x0e] +; CHECK: srshl.8b v0, v0, v0 ; encoding: [0x00,0x54,0x20,0x0e] +; CHECK: sshl.8b v0, v0, v0 ; encoding: [0x00,0x44,0x20,0x0e] +; CHECK: sub.8b v0, v0, v0 ; encoding: [0x00,0x84,0x20,0x2e] +; CHECK: uaba.8b v0, v0, v0 ; encoding: [0x00,0x7c,0x20,0x2e] +; CHECK: uabd.8b v0, v0, v0 ; encoding: [0x00,0x74,0x20,0x2e] +; CHECK: uhadd.8b v0, v0, v0 ; encoding: [0x00,0x04,0x20,0x2e] +; CHECK: uhsub.8b v0, v0, v0 ; encoding: [0x00,0x24,0x20,0x2e] +; CHECK: umaxp.8b v0, v0, v0 ; encoding: [0x00,0xa4,0x20,0x2e] +; CHECK: umax.8b v0, v0, v0 ; encoding: [0x00,0x64,0x20,0x2e] +; CHECK: uminp.8b v0, v0, v0 ; encoding: [0x00,0xac,0x20,0x2e] +; CHECK: umin.8b v0, v0, v0 ; encoding: [0x00,0x6c,0x20,0x2e] +; CHECK: uqadd.8b v0, v0, v0 ; encoding: [0x00,0x0c,0x20,0x2e] +; CHECK: uqrshl.8b v0, v0, v0 ; encoding: [0x00,0x5c,0x20,0x2e] +; CHECK: uqshl.8b v0, v0, v0 ; encoding: [0x00,0x4c,0x20,0x2e] +; CHECK: uqsub.8b v0, v0, v0 ; encoding: [0x00,0x2c,0x20,0x2e] +; CHECK: urhadd.8b v0, v0, v0 ; encoding: [0x00,0x14,0x20,0x2e] +; CHECK: urshl.8b v0, v0, v0 ; encoding: [0x00,0x54,0x20,0x2e] +; CHECK: ushl.8b v0, v0, v0 ; encoding: [0x00,0x44,0x20,0x2e] + + bif.8b v0, v0, v0 + bit.8b v0, v0, v0 + bsl.8b v0, v0, v0 + eor.8b v0, v0, v0 + orn.8b v0, v0, v0 + orr.8b v0, v0, v0 + +; CHECK: bif.8b v0, v0, v0 ; encoding: [0x00,0x1c,0xe0,0x2e] +; CHECK: bit.8b v0, v0, v0 ; encoding: [0x00,0x1c,0xa0,0x2e] +; CHECK: bsl.8b v0, v0, v0 ; encoding: [0x00,0x1c,0x60,0x2e] +; CHECK: eor.8b v0, v0, v0 ; encoding: [0x00,0x1c,0x20,0x2e] +; CHECK: orn.8b v0, v0, v0 ; encoding: [0x00,0x1c,0xe0,0x0e] +; CHECK: orr.8b v0, v0, v0 ; encoding: [0x00,0x1c,0xa0,0x0e] + + sadalp.4h v0, v0 + sadalp.8h v0, v0 + sadalp.2s v0, v0 + sadalp.4s v0, v0 + sadalp.1d v0, v0 + sadalp.2d v0, v0 + +; CHECK: sadalp.4h v0, v0 ; encoding: [0x00,0x68,0x20,0x0e] +; CHECK: sadalp.8h v0, v0 ; encoding: [0x00,0x68,0x20,0x4e] +; CHECK: sadalp.2s v0, v0 ; encoding: [0x00,0x68,0x60,0x0e] +; CHECK: sadalp.4s v0, v0 ; encoding: [0x00,0x68,0x60,0x4e] +; CHECK: sadalp.1d v0, v0 ; encoding: [0x00,0x68,0xa0,0x0e] +; CHECK: sadalp.2d v0, v0 ; encoding: [0x00,0x68,0xa0,0x4e] + + cls.8b v0, v0 + clz.8b v0, v0 + cnt.8b v0, v0 + fabs.2s v0, v0 + fneg.2s v0, v0 + frecpe.2s v0, v0 + frinta.2s v0, v0 + frintx.2s v0, v0 + frinti.2s v0, v0 + frintm.2s v0, v0 + frintn.2s v0, v0 + frintp.2s v0, v0 + frintz.2s v0, v0 + frsqrte.2s v0, v0 + fsqrt.2s v0, v0 + neg.8b v0, v0 + not.8b v0, v0 + rbit.8b v0, v0 + rev16.8b v0, v0 + rev32.8b v0, v0 + rev64.8b v0, v0 + sadalp.4h v0, v0 + saddlp.4h v0, v0 + scvtf.2s v0, v0 + sqabs.8b v0, v0 + sqneg.8b v0, v0 + sqxtn.8b v0, v0 + sqxtun.8b v0, v0 + suqadd.8b v0, v0 + uadalp.4h v0, v0 + uaddlp.4h v0, v0 + ucvtf.2s v0, v0 + uqxtn.8b v0, v0 + urecpe.2s v0, v0 + ursqrte.2s v0, v0 + usqadd.8b v0, v0 + xtn.8b v0, v0 + shll.8h v1, v2, #8 + shll.4s v3, v4, #16 + shll.2d v5, v6, #32 + shll2.8h v7, v8, #8 + shll2.4s v9, v10, #16 + shll2.2d v11, v12, #32 + shll v1.8h, v2.8b, #8 + shll v1.4s, v2.4h, #16 + shll v1.2d, v2.2s, #32 + shll2 v1.8h, v2.16b, #8 + shll2 v1.4s, v2.8h, #16 + shll2 v1.2d, v2.4s, #32 + +; CHECK: cls.8b v0, v0 ; encoding: [0x00,0x48,0x20,0x0e] +; CHECK: clz.8b v0, v0 ; encoding: [0x00,0x48,0x20,0x2e] +; CHECK: cnt.8b v0, v0 ; encoding: [0x00,0x58,0x20,0x0e] +; CHECK: fabs.2s v0, v0 ; encoding: [0x00,0xf8,0xa0,0x0e] +; CHECK: fneg.2s v0, v0 ; encoding: [0x00,0xf8,0xa0,0x2e] +; CHECK: frecpe.2s v0, v0 ; encoding: [0x00,0xd8,0xa1,0x0e] +; CHECK: frinta.2s v0, v0 ; encoding: [0x00,0x88,0x21,0x2e] +; CHECK: frintx.2s v0, v0 ; encoding: [0x00,0x98,0x21,0x2e] +; CHECK: frinti.2s v0, v0 ; encoding: [0x00,0x98,0xa1,0x2e] +; CHECK: frintm.2s v0, v0 ; encoding: [0x00,0x98,0x21,0x0e] +; CHECK: frintn.2s v0, v0 ; encoding: [0x00,0x88,0x21,0x0e] +; CHECK: frintp.2s v0, v0 ; encoding: [0x00,0x88,0xa1,0x0e] +; CHECK: frintz.2s v0, v0 ; encoding: [0x00,0x98,0xa1,0x0e] +; CHECK: frsqrte.2s v0, v0 ; encoding: [0x00,0xd8,0xa1,0x2e] +; CHECK: fsqrt.2s v0, v0 ; encoding: [0x00,0xf8,0xa1,0x2e] +; CHECK: neg.8b v0, v0 ; encoding: [0x00,0xb8,0x20,0x2e] +; CHECK: not.8b v0, v0 ; encoding: [0x00,0x58,0x20,0x2e] +; CHECK: rbit.8b v0, v0 ; encoding: [0x00,0x58,0x60,0x2e] +; CHECK: rev16.8b v0, v0 ; encoding: [0x00,0x18,0x20,0x0e] +; CHECK: rev32.8b v0, v0 ; encoding: [0x00,0x08,0x20,0x2e] +; CHECK: rev64.8b v0, v0 ; encoding: [0x00,0x08,0x20,0x0e] +; CHECK: sadalp.4h v0, v0 ; encoding: [0x00,0x68,0x20,0x0e] +; CHECK: saddlp.4h v0, v0 ; encoding: [0x00,0x28,0x20,0x0e] +; CHECK: scvtf.2s v0, v0 ; encoding: [0x00,0xd8,0x21,0x0e] +; CHECK: sqabs.8b v0, v0 ; encoding: [0x00,0x78,0x20,0x0e] +; CHECK: sqneg.8b v0, v0 ; encoding: [0x00,0x78,0x20,0x2e] +; CHECK: sqxtn.8b v0, v0 ; encoding: [0x00,0x48,0x21,0x0e] +; CHECK: sqxtun.8b v0, v0 ; encoding: [0x00,0x28,0x21,0x2e] +; CHECK: suqadd.8b v0, v0 ; encoding: [0x00,0x38,0x20,0x0e] +; CHECK: uadalp.4h v0, v0 ; encoding: [0x00,0x68,0x20,0x2e] +; CHECK: uaddlp.4h v0, v0 ; encoding: [0x00,0x28,0x20,0x2e] +; CHECK: ucvtf.2s v0, v0 ; encoding: [0x00,0xd8,0x21,0x2e] +; CHECK: uqxtn.8b v0, v0 ; encoding: [0x00,0x48,0x21,0x2e] +; CHECK: urecpe.2s v0, v0 ; encoding: [0x00,0xc8,0xa1,0x0e] +; CHECK: ursqrte.2s v0, v0 ; encoding: [0x00,0xc8,0xa1,0x2e] +; CHECK: usqadd.8b v0, v0 ; encoding: [0x00,0x38,0x20,0x2e] +; CHECK: xtn.8b v0, v0 ; encoding: [0x00,0x28,0x21,0x0e] +; CHECK: shll.8h v1, v2, #8 ; encoding: [0x41,0x38,0x21,0x2e] +; CHECK: shll.4s v3, v4, #16 ; encoding: [0x83,0x38,0x61,0x2e] +; CHECK: shll.2d v5, v6, #32 ; encoding: [0xc5,0x38,0xa1,0x2e] +; CHECK: shll2.8h v7, v8, #8 ; encoding: [0x07,0x39,0x21,0x6e] +; CHECK: shll2.4s v9, v10, #16 ; encoding: [0x49,0x39,0x61,0x6e] +; CHECK: shll2.2d v11, v12, #32 ; encoding: [0x8b,0x39,0xa1,0x6e] +; CHECK: shll.8h v1, v2, #8 ; encoding: [0x41,0x38,0x21,0x2e] +; CHECK: shll.4s v1, v2, #16 ; encoding: [0x41,0x38,0x61,0x2e] +; CHECK: shll.2d v1, v2, #32 ; encoding: [0x41,0x38,0xa1,0x2e] +; CHECK: shll2.8h v1, v2, #8 ; encoding: [0x41,0x38,0x21,0x6e] +; CHECK: shll2.4s v1, v2, #16 ; encoding: [0x41,0x38,0x61,0x6e] +; CHECK: shll2.2d v1, v2, #32 ; encoding: [0x41,0x38,0xa1,0x6e] + + + cmeq.8b v0, v0, #0 + cmeq.16b v0, v0, #0 + cmeq.4h v0, v0, #0 + cmeq.8h v0, v0, #0 + cmeq.2s v0, v0, #0 + cmeq.4s v0, v0, #0 + cmeq.2d v0, v0, #0 + +; CHECK: cmeq.8b v0, v0, #0 ; encoding: [0x00,0x98,0x20,0x0e] +; CHECK: cmeq.16b v0, v0, #0 ; encoding: [0x00,0x98,0x20,0x4e] +; CHECK: cmeq.4h v0, v0, #0 ; encoding: [0x00,0x98,0x60,0x0e] +; CHECK: cmeq.8h v0, v0, #0 ; encoding: [0x00,0x98,0x60,0x4e] +; CHECK: cmeq.2s v0, v0, #0 ; encoding: [0x00,0x98,0xa0,0x0e] +; CHECK: cmeq.4s v0, v0, #0 ; encoding: [0x00,0x98,0xa0,0x4e] +; CHECK: cmeq.2d v0, v0, #0 ; encoding: [0x00,0x98,0xe0,0x4e] + + cmge.8b v0, v0, #0 + cmgt.8b v0, v0, #0 + cmle.8b v0, v0, #0 + cmlt.8b v0, v0, #0 + fcmeq.2s v0, v0, #0 + fcmge.2s v0, v0, #0 + fcmgt.2s v0, v0, #0 + fcmle.2s v0, v0, #0 + fcmlt.2s v0, v0, #0 + +; ARM verbose mode aliases + cmlt v8.8b, v14.8b, #0 + cmlt v8.16b, v14.16b, #0 + cmlt v8.4h, v14.4h, #0 + cmlt v8.8h, v14.8h, #0 + cmlt v8.2s, v14.2s, #0 + cmlt v8.4s, v14.4s, #0 + cmlt v8.2d, v14.2d, #0 + +; CHECK: cmge.8b v0, v0, #0 ; encoding: [0x00,0x88,0x20,0x2e] +; CHECK: cmgt.8b v0, v0, #0 ; encoding: [0x00,0x88,0x20,0x0e] +; CHECK: cmle.8b v0, v0, #0 ; encoding: [0x00,0x98,0x20,0x2e] +; CHECK: cmlt.8b v0, v0, #0 ; encoding: [0x00,0xa8,0x20,0x0e] +; CHECK: fcmeq.2s v0, v0, #0 ; encoding: [0x00,0xd8,0xa0,0x0e] +; CHECK: fcmge.2s v0, v0, #0 ; encoding: [0x00,0xc8,0xa0,0x2e] +; CHECK: fcmgt.2s v0, v0, #0 ; encoding: [0x00,0xc8,0xa0,0x0e] +; CHECK: fcmle.2s v0, v0, #0 ; encoding: [0x00,0xd8,0xa0,0x2e] +; CHECK: fcmlt.2s v0, v0, #0 ; encoding: [0x00,0xe8,0xa0,0x0e] +; CHECK: cmlt.8b v8, v14, #0 ; encoding: [0xc8,0xa9,0x20,0x0e] +; CHECK: cmlt.16b v8, v14, #0 ; encoding: [0xc8,0xa9,0x20,0x4e] +; CHECK: cmlt.4h v8, v14, #0 ; encoding: [0xc8,0xa9,0x60,0x0e] +; CHECK: cmlt.8h v8, v14, #0 ; encoding: [0xc8,0xa9,0x60,0x4e] +; CHECK: cmlt.2s v8, v14, #0 ; encoding: [0xc8,0xa9,0xa0,0x0e] +; CHECK: cmlt.4s v8, v14, #0 ; encoding: [0xc8,0xa9,0xa0,0x4e] +; CHECK: cmlt.2d v8, v14, #0 ; encoding: [0xc8,0xa9,0xe0,0x4e] + + +;===-------------------------------------------------------------------------=== +; AdvSIMD Floating-point <-> Integer Conversions +;===-------------------------------------------------------------------------=== + + fcvtas.2s v0, v0 + fcvtas.4s v0, v0 + fcvtas.2d v0, v0 + fcvtas s0, s0 + fcvtas d0, d0 + +; CHECK: fcvtas.2s v0, v0 ; encoding: [0x00,0xc8,0x21,0x0e] +; CHECK: fcvtas.4s v0, v0 ; encoding: [0x00,0xc8,0x21,0x4e] +; CHECK: fcvtas.2d v0, v0 ; encoding: [0x00,0xc8,0x61,0x4e] +; CHECK: fcvtas s0, s0 ; encoding: [0x00,0xc8,0x21,0x5e] +; CHECK: fcvtas d0, d0 ; encoding: [0x00,0xc8,0x61,0x5e] + + fcvtau.2s v0, v0 + fcvtau.4s v0, v0 + fcvtau.2d v0, v0 + fcvtau s0, s0 + fcvtau d0, d0 + +; CHECK: fcvtau.2s v0, v0 ; encoding: [0x00,0xc8,0x21,0x2e] +; CHECK: fcvtau.4s v0, v0 ; encoding: [0x00,0xc8,0x21,0x6e] +; CHECK: fcvtau.2d v0, v0 ; encoding: [0x00,0xc8,0x61,0x6e] +; CHECK: fcvtau s0, s0 ; encoding: [0x00,0xc8,0x21,0x7e] +; CHECK: fcvtau d0, d0 ; encoding: [0x00,0xc8,0x61,0x7e] + + fcvtl v1.4s, v5.4h + fcvtl v2.2d, v6.2s + fcvtl2 v3.4s, v7.8h + fcvtl2 v4.2d, v8.4s + +; CHECK: fcvtl v1.4s, v5.4h ; encoding: [0xa1,0x78,0x21,0x0e] +; CHECK: fcvtl v2.2d, v6.2s ; encoding: [0xc2,0x78,0x61,0x0e] +; CHECK: fcvtl2 v3.4s, v7.8h ; encoding: [0xe3,0x78,0x21,0x4e] +; CHECK: fcvtl2 v4.2d, v8.4s ; encoding: [0x04,0x79,0x61,0x4e] + + fcvtms.2s v0, v0 + fcvtms.4s v0, v0 + fcvtms.2d v0, v0 + fcvtms s0, s0 + fcvtms d0, d0 + +; CHECK: fcvtms.2s v0, v0 ; encoding: [0x00,0xb8,0x21,0x0e] +; CHECK: fcvtms.4s v0, v0 ; encoding: [0x00,0xb8,0x21,0x4e] +; CHECK: fcvtms.2d v0, v0 ; encoding: [0x00,0xb8,0x61,0x4e] +; CHECK: fcvtms s0, s0 ; encoding: [0x00,0xb8,0x21,0x5e] +; CHECK: fcvtms d0, d0 ; encoding: [0x00,0xb8,0x61,0x5e] + + fcvtmu.2s v0, v0 + fcvtmu.4s v0, v0 + fcvtmu.2d v0, v0 + fcvtmu s0, s0 + fcvtmu d0, d0 + +; CHECK: fcvtmu.2s v0, v0 ; encoding: [0x00,0xb8,0x21,0x2e] +; CHECK: fcvtmu.4s v0, v0 ; encoding: [0x00,0xb8,0x21,0x6e] +; CHECK: fcvtmu.2d v0, v0 ; encoding: [0x00,0xb8,0x61,0x6e] +; CHECK: fcvtmu s0, s0 ; encoding: [0x00,0xb8,0x21,0x7e] +; CHECK: fcvtmu d0, d0 ; encoding: [0x00,0xb8,0x61,0x7e] + + fcvtns.2s v0, v0 + fcvtns.4s v0, v0 + fcvtns.2d v0, v0 + fcvtns s0, s0 + fcvtns d0, d0 + +; CHECK: fcvtns.2s v0, v0 ; encoding: [0x00,0xa8,0x21,0x0e] +; CHECK: fcvtns.4s v0, v0 ; encoding: [0x00,0xa8,0x21,0x4e] +; CHECK: fcvtns.2d v0, v0 ; encoding: [0x00,0xa8,0x61,0x4e] +; CHECK: fcvtns s0, s0 ; encoding: [0x00,0xa8,0x21,0x5e] +; CHECK: fcvtns d0, d0 ; encoding: [0x00,0xa8,0x61,0x5e] + + fcvtnu.2s v0, v0 + fcvtnu.4s v0, v0 + fcvtnu.2d v0, v0 + fcvtnu s0, s0 + fcvtnu d0, d0 + +; CHECK: fcvtnu.2s v0, v0 ; encoding: [0x00,0xa8,0x21,0x2e] +; CHECK: fcvtnu.4s v0, v0 ; encoding: [0x00,0xa8,0x21,0x6e] +; CHECK: fcvtnu.2d v0, v0 ; encoding: [0x00,0xa8,0x61,0x6e] +; CHECK: fcvtnu s0, s0 ; encoding: [0x00,0xa8,0x21,0x7e] +; CHECK: fcvtnu d0, d0 ; encoding: [0x00,0xa8,0x61,0x7e] + + fcvtn v2.4h, v4.4s + fcvtn v3.2s, v5.2d + fcvtn2 v4.8h, v6.4s + fcvtn2 v5.4s, v7.2d + fcvtxn v6.2s, v9.2d + fcvtxn2 v7.4s, v8.2d + +; CHECK: fcvtn v2.4h, v4.4s ; encoding: [0x82,0x68,0x21,0x0e] +; CHECK: fcvtn v3.2s, v5.2d ; encoding: [0xa3,0x68,0x61,0x0e] +; CHECK: fcvtn2 v4.8h, v6.4s ; encoding: [0xc4,0x68,0x21,0x4e] +; CHECK: fcvtn2 v5.4s, v7.2d ; encoding: [0xe5,0x68,0x61,0x4e] +; CHECK: fcvtxn v6.2s, v9.2d ; encoding: [0x26,0x69,0x61,0x2e] +; CHECK: fcvtxn2 v7.4s, v8.2d ; encoding: [0x07,0x69,0x61,0x6e] + + fcvtps.2s v0, v0 + fcvtps.4s v0, v0 + fcvtps.2d v0, v0 + fcvtps s0, s0 + fcvtps d0, d0 + +; CHECK: fcvtps.2s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x0e] +; CHECK: fcvtps.4s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x4e] +; CHECK: fcvtps.2d v0, v0 ; encoding: [0x00,0xa8,0xe1,0x4e] +; CHECK: fcvtps s0, s0 ; encoding: [0x00,0xa8,0xa1,0x5e] +; CHECK: fcvtps d0, d0 ; encoding: [0x00,0xa8,0xe1,0x5e] + + fcvtpu.2s v0, v0 + fcvtpu.4s v0, v0 + fcvtpu.2d v0, v0 + fcvtpu s0, s0 + fcvtpu d0, d0 + +; CHECK: fcvtpu.2s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x2e] +; CHECK: fcvtpu.4s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x6e] +; CHECK: fcvtpu.2d v0, v0 ; encoding: [0x00,0xa8,0xe1,0x6e] +; CHECK: fcvtpu s0, s0 ; encoding: [0x00,0xa8,0xa1,0x7e] +; CHECK: fcvtpu d0, d0 ; encoding: [0x00,0xa8,0xe1,0x7e] + + fcvtzs.2s v0, v0 + fcvtzs.4s v0, v0 + fcvtzs.2d v0, v0 + fcvtzs s0, s0 + fcvtzs d0, d0 + +; CHECK: fcvtzs.2s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x0e] +; CHECK: fcvtzs.4s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x4e] +; CHECK: fcvtzs.2d v0, v0 ; encoding: [0x00,0xb8,0xe1,0x4e] +; CHECK: fcvtzs s0, s0 ; encoding: [0x00,0xb8,0xa1,0x5e] +; CHECK: fcvtzs d0, d0 ; encoding: [0x00,0xb8,0xe1,0x5e] + + fcvtzu.2s v0, v0 + fcvtzu.4s v0, v0 + fcvtzu.2d v0, v0 + fcvtzu s0, s0 + fcvtzu d0, d0 + +; CHECK: fcvtzu.2s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x2e] +; CHECK: fcvtzu.4s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x6e] +; CHECK: fcvtzu.2d v0, v0 ; encoding: [0x00,0xb8,0xe1,0x6e] +; CHECK: fcvtzu s0, s0 ; encoding: [0x00,0xb8,0xa1,0x7e] +; CHECK: fcvtzu d0, d0 ; encoding: [0x00,0xb8,0xe1,0x7e] + +;===-------------------------------------------------------------------------=== +; AdvSIMD modified immediate instructions +;===-------------------------------------------------------------------------=== + + bic.2s v0, #1 + bic.2s v0, #1, lsl #0 + bic.2s v0, #1, lsl #8 + bic.2s v0, #1, lsl #16 + bic.2s v0, #1, lsl #24 + +; CHECK: bic.2s v0, #1 ; encoding: [0x20,0x14,0x00,0x2f] +; CHECK: bic.2s v0, #1 ; encoding: [0x20,0x14,0x00,0x2f] +; CHECK: bic.2s v0, #1, lsl #8 ; encoding: [0x20,0x34,0x00,0x2f] +; CHECK: bic.2s v0, #1, lsl #16 ; encoding: [0x20,0x54,0x00,0x2f] +; CHECK: bic.2s v0, #1, lsl #24 ; encoding: [0x20,0x74,0x00,0x2f] + + bic.4h v0, #1 + bic.4h v0, #1, lsl #0 + bic.4h v0, #1, lsl #8 + +; CHECK: bic.4h v0, #1 ; encoding: [0x20,0x94,0x00,0x2f] +; CHECK: bic.4h v0, #1 ; encoding: [0x20,0x94,0x00,0x2f] +; CHECK: bic.4h v0, #1, lsl #8 ; encoding: [0x20,0xb4,0x00,0x2f] + + bic.4s v0, #1 + bic.4s v0, #1, lsl #0 + bic.4s v0, #1, lsl #8 + bic.4s v0, #1, lsl #16 + bic.4s v0, #1, lsl #24 + +; CHECK: bic.4s v0, #1 ; encoding: [0x20,0x14,0x00,0x6f] +; CHECK: bic.4s v0, #1 ; encoding: [0x20,0x14,0x00,0x6f] +; CHECK: bic.4s v0, #1, lsl #8 ; encoding: [0x20,0x34,0x00,0x6f] +; CHECK: bic.4s v0, #1, lsl #16 ; encoding: [0x20,0x54,0x00,0x6f] +; CHECK: bic.4s v0, #1, lsl #24 ; encoding: [0x20,0x74,0x00,0x6f] + + bic.8h v0, #1 + bic.8h v0, #1, lsl #0 + bic.8h v0, #1, lsl #8 + +; CHECK: bic.8h v0, #1 ; encoding: [0x20,0x94,0x00,0x6f] +; CHECK: bic.8h v0, #1 ; encoding: [0x20,0x94,0x00,0x6f] +; CHECK: bic.8h v0, #1, lsl #8 ; encoding: [0x20,0xb4,0x00,0x6f] + + fmov.2d v0, #1.250000e-01 + +; CHECK: fmov.2d v0, #1.250000e-01 ; encoding: [0x00,0xf4,0x02,0x6f] + + fmov.2s v0, #1.250000e-01 + fmov.4s v0, #1.250000e-01 + +; CHECK: fmov.2s v0, #1.250000e-01 ; encoding: [0x00,0xf4,0x02,0x0f] +; CHECK: fmov.4s v0, #1.250000e-01 ; encoding: [0x00,0xf4,0x02,0x4f] + + orr.2s v0, #1 + orr.2s v0, #1, lsl #0 + orr.2s v0, #1, lsl #8 + orr.2s v0, #1, lsl #16 + orr.2s v0, #1, lsl #24 + +; CHECK: orr.2s v0, #1 ; encoding: [0x20,0x14,0x00,0x0f] +; CHECK: orr.2s v0, #1 ; encoding: [0x20,0x14,0x00,0x0f] +; CHECK: orr.2s v0, #1, lsl #8 ; encoding: [0x20,0x34,0x00,0x0f] +; CHECK: orr.2s v0, #1, lsl #16 ; encoding: [0x20,0x54,0x00,0x0f] +; CHECK: orr.2s v0, #1, lsl #24 ; encoding: [0x20,0x74,0x00,0x0f] + + orr.4h v0, #1 + orr.4h v0, #1, lsl #0 + orr.4h v0, #1, lsl #8 + +; CHECK: orr.4h v0, #1 ; encoding: [0x20,0x94,0x00,0x0f] +; CHECK: orr.4h v0, #1 ; encoding: [0x20,0x94,0x00,0x0f] +; CHECK: orr.4h v0, #1, lsl #8 ; encoding: [0x20,0xb4,0x00,0x0f] + + orr.4s v0, #1 + orr.4s v0, #1, lsl #0 + orr.4s v0, #1, lsl #8 + orr.4s v0, #1, lsl #16 + orr.4s v0, #1, lsl #24 + +; CHECK: orr.4s v0, #1 ; encoding: [0x20,0x14,0x00,0x4f] +; CHECK: orr.4s v0, #1 ; encoding: [0x20,0x14,0x00,0x4f] +; CHECK: orr.4s v0, #1, lsl #8 ; encoding: [0x20,0x34,0x00,0x4f] +; CHECK: orr.4s v0, #1, lsl #16 ; encoding: [0x20,0x54,0x00,0x4f] +; CHECK: orr.4s v0, #1, lsl #24 ; encoding: [0x20,0x74,0x00,0x4f] + + orr.8h v0, #1 + orr.8h v0, #1, lsl #0 + orr.8h v0, #1, lsl #8 + +; CHECK: orr.8h v0, #1 ; encoding: [0x20,0x94,0x00,0x4f] +; CHECK: orr.8h v0, #1 ; encoding: [0x20,0x94,0x00,0x4f] +; CHECK: orr.8h v0, #1, lsl #8 ; encoding: [0x20,0xb4,0x00,0x4f] + + movi d0, #0x000000000000ff + movi.2d v0, #0x000000000000ff + +; CHECK: movi d0, #0x000000000000ff ; encoding: [0x20,0xe4,0x00,0x2f] +; CHECK: movi.2d v0, #0x000000000000ff ; encoding: [0x20,0xe4,0x00,0x6f] + + movi.2s v0, #1 + movi.2s v0, #1, lsl #0 + movi.2s v0, #1, lsl #8 + movi.2s v0, #1, lsl #16 + movi.2s v0, #1, lsl #24 + +; CHECK: movi.2s v0, #1 ; encoding: [0x20,0x04,0x00,0x0f] +; CHECK: movi.2s v0, #1 ; encoding: [0x20,0x04,0x00,0x0f] +; CHECK: movi.2s v0, #1, lsl #8 ; encoding: [0x20,0x24,0x00,0x0f] +; CHECK: movi.2s v0, #1, lsl #16 ; encoding: [0x20,0x44,0x00,0x0f] +; CHECK: movi.2s v0, #1, lsl #24 ; encoding: [0x20,0x64,0x00,0x0f] + + movi.4s v0, #1 + movi.4s v0, #1, lsl #0 + movi.4s v0, #1, lsl #8 + movi.4s v0, #1, lsl #16 + movi.4s v0, #1, lsl #24 + +; CHECK: movi.4s v0, #1 ; encoding: [0x20,0x04,0x00,0x4f] +; CHECK: movi.4s v0, #1 ; encoding: [0x20,0x04,0x00,0x4f] +; CHECK: movi.4s v0, #1, lsl #8 ; encoding: [0x20,0x24,0x00,0x4f] +; CHECK: movi.4s v0, #1, lsl #16 ; encoding: [0x20,0x44,0x00,0x4f] +; CHECK: movi.4s v0, #1, lsl #24 ; encoding: [0x20,0x64,0x00,0x4f] + + movi.4h v0, #1 + movi.4h v0, #1, lsl #0 + movi.4h v0, #1, lsl #8 + +; CHECK: movi.4h v0, #1 ; encoding: [0x20,0x84,0x00,0x0f] +; CHECK: movi.4h v0, #1 ; encoding: [0x20,0x84,0x00,0x0f] +; CHECK: movi.4h v0, #1, lsl #8 ; encoding: [0x20,0xa4,0x00,0x0f] + + movi.8h v0, #1 + movi.8h v0, #1, lsl #0 + movi.8h v0, #1, lsl #8 + +; CHECK: movi.8h v0, #1 ; encoding: [0x20,0x84,0x00,0x4f] +; CHECK: movi.8h v0, #1 ; encoding: [0x20,0x84,0x00,0x4f] +; CHECK: movi.8h v0, #1, lsl #8 ; encoding: [0x20,0xa4,0x00,0x4f] + + movi.2s v0, #1, msl #8 + movi.2s v0, #1, msl #16 + movi.4s v0, #1, msl #8 + movi.4s v0, #1, msl #16 + +; CHECK: movi.2s v0, #1, msl #8 ; encoding: [0x20,0xc4,0x00,0x0f] +; CHECK: movi.2s v0, #1, msl #16 ; encoding: [0x20,0xd4,0x00,0x0f] +; CHECK: movi.4s v0, #1, msl #8 ; encoding: [0x20,0xc4,0x00,0x4f] +; CHECK: movi.4s v0, #1, msl #16 ; encoding: [0x20,0xd4,0x00,0x4f] + + movi.8b v0, #1 + movi.16b v0, #1 + +; CHECK: movi.8b v0, #1 ; encoding: [0x20,0xe4,0x00,0x0f] +; CHECK: movi.16b v0, #1 ; encoding: [0x20,0xe4,0x00,0x4f] + + mvni.2s v0, #1 + mvni.2s v0, #1, lsl #0 + mvni.2s v0, #1, lsl #8 + mvni.2s v0, #1, lsl #16 + mvni.2s v0, #1, lsl #24 + +; CHECK: mvni.2s v0, #1 ; encoding: [0x20,0x04,0x00,0x2f] +; CHECK: mvni.2s v0, #1 ; encoding: [0x20,0x04,0x00,0x2f] +; CHECK: mvni.2s v0, #1, lsl #8 ; encoding: [0x20,0x24,0x00,0x2f] +; CHECK: mvni.2s v0, #1, lsl #16 ; encoding: [0x20,0x44,0x00,0x2f] +; CHECK: mvni.2s v0, #1, lsl #24 ; encoding: [0x20,0x64,0x00,0x2f] + + mvni.4s v0, #1 + mvni.4s v0, #1, lsl #0 + mvni.4s v0, #1, lsl #8 + mvni.4s v0, #1, lsl #16 + mvni.4s v0, #1, lsl #24 + +; CHECK: mvni.4s v0, #1 ; encoding: [0x20,0x04,0x00,0x6f] +; CHECK: mvni.4s v0, #1 ; encoding: [0x20,0x04,0x00,0x6f] +; CHECK: mvni.4s v0, #1, lsl #8 ; encoding: [0x20,0x24,0x00,0x6f] +; CHECK: mvni.4s v0, #1, lsl #16 ; encoding: [0x20,0x44,0x00,0x6f] +; CHECK: mvni.4s v0, #1, lsl #24 ; encoding: [0x20,0x64,0x00,0x6f] + + mvni.4h v0, #1 + mvni.4h v0, #1, lsl #0 + mvni.4h v0, #1, lsl #8 + +; CHECK: mvni.4h v0, #1 ; encoding: [0x20,0x84,0x00,0x2f] +; CHECK: mvni.4h v0, #1 ; encoding: [0x20,0x84,0x00,0x2f] +; CHECK: mvni.4h v0, #1, lsl #8 ; encoding: [0x20,0xa4,0x00,0x2f] + + mvni.8h v0, #1 + mvni.8h v0, #1, lsl #0 + mvni.8h v0, #1, lsl #8 + +; CHECK: mvni.8h v0, #1 ; encoding: [0x20,0x84,0x00,0x6f] +; CHECK: mvni.8h v0, #1 ; encoding: [0x20,0x84,0x00,0x6f] +; CHECK: mvni.8h v0, #1, lsl #8 ; encoding: [0x20,0xa4,0x00,0x6f] + + mvni.2s v0, #1, msl #8 + mvni.2s v0, #1, msl #16 + mvni.4s v0, #1, msl #8 + mvni.4s v0, #1, msl #16 + +; CHECK: mvni.2s v0, #1, msl #8 ; encoding: [0x20,0xc4,0x00,0x2f] +; CHECK: mvni.2s v0, #1, msl #16 ; encoding: [0x20,0xd4,0x00,0x2f] +; CHECK: mvni.4s v0, #1, msl #8 ; encoding: [0x20,0xc4,0x00,0x6f] +; CHECK: mvni.4s v0, #1, msl #16 ; encoding: [0x20,0xd4,0x00,0x6f] + +;===-------------------------------------------------------------------------=== +; AdvSIMD scalar x index +;===-------------------------------------------------------------------------=== + + fmla.s s0, s0, v0[3] + fmla.d d0, d0, v0[1] + fmls.s s0, s0, v0[3] + fmls.d d0, d0, v0[1] + fmulx.s s0, s0, v0[3] + fmulx.d d0, d0, v0[1] + fmul.s s0, s0, v0[3] + fmul.d d0, d0, v0[1] + sqdmlal.h s0, h0, v0[7] + sqdmlal.s d0, s0, v0[3] + sqdmlsl.h s0, h0, v0[7] + sqdmulh.h h0, h0, v0[7] + sqdmulh.s s0, s0, v0[3] + sqdmull.h s0, h0, v0[7] + sqdmull.s d0, s0, v0[3] + sqrdmulh.h h0, h0, v0[7] + sqrdmulh.s s0, s0, v0[3] + +; CHECK: fmla.s s0, s0, v0[3] ; encoding: [0x00,0x18,0xa0,0x5f] +; CHECK: fmla.d d0, d0, v0[1] ; encoding: [0x00,0x18,0xc0,0x5f] +; CHECK: fmls.s s0, s0, v0[3] ; encoding: [0x00,0x58,0xa0,0x5f] +; CHECK: fmls.d d0, d0, v0[1] ; encoding: [0x00,0x58,0xc0,0x5f] +; CHECK: fmulx.s s0, s0, v0[3] ; encoding: [0x00,0x98,0xa0,0x7f] +; CHECK: fmulx.d d0, d0, v0[1] ; encoding: [0x00,0x98,0xc0,0x7f] +; CHECK: fmul.s s0, s0, v0[3] ; encoding: [0x00,0x98,0xa0,0x5f] +; CHECK: fmul.d d0, d0, v0[1] ; encoding: [0x00,0x98,0xc0,0x5f] +; CHECK: sqdmlal.h s0, h0, v0[7] ; encoding: [0x00,0x38,0x70,0x5f] +; CHECK: sqdmlal.s d0, s0, v0[3] ; encoding: [0x00,0x38,0xa0,0x5f] +; CHECK: sqdmlsl.h s0, h0, v0[7] ; encoding: [0x00,0x78,0x70,0x5f] +; CHECK: sqdmulh.h h0, h0, v0[7] ; encoding: [0x00,0xc8,0x70,0x5f] +; CHECK: sqdmulh.s s0, s0, v0[3] ; encoding: [0x00,0xc8,0xa0,0x5f] +; CHECK: sqdmull.h s0, h0, v0[7] ; encoding: [0x00,0xb8,0x70,0x5f] +; CHECK: sqdmull.s d0, s0, v0[3] ; encoding: [0x00,0xb8,0xa0,0x5f] +; CHECK: sqrdmulh.h h0, h0, v0[7] ; encoding: [0x00,0xd8,0x70,0x5f] +; CHECK: sqrdmulh.s s0, s0, v0[3] ; encoding: [0x00,0xd8,0xa0,0x5f] + +;===-------------------------------------------------------------------------=== +; AdvSIMD SMLAL +;===-------------------------------------------------------------------------=== + smlal.8h v1, v2, v3 + smlal.4s v1, v2, v3 + smlal.2d v1, v2, v3 + smlal2.8h v1, v2, v3 + smlal2.4s v1, v2, v3 + smlal2.2d v1, v2, v3 + + smlal v13.8h, v8.8b, v0.8b + smlal v13.4s, v8.4h, v0.4h + smlal v13.2d, v8.2s, v0.2s + smlal2 v13.8h, v8.16b, v0.16b + smlal2 v13.4s, v8.8h, v0.8h + smlal2 v13.2d, v8.4s, v0.4s + +; CHECK: smlal.8h v1, v2, v3 ; encoding: [0x41,0x80,0x23,0x0e] +; CHECK: smlal.4s v1, v2, v3 ; encoding: [0x41,0x80,0x63,0x0e] +; CHECK: smlal.2d v1, v2, v3 ; encoding: [0x41,0x80,0xa3,0x0e] +; CHECK: smlal2.8h v1, v2, v3 ; encoding: [0x41,0x80,0x23,0x4e] +; CHECK: smlal2.4s v1, v2, v3 ; encoding: [0x41,0x80,0x63,0x4e] +; CHECK: smlal2.2d v1, v2, v3 ; encoding: [0x41,0x80,0xa3,0x4e] +; CHECK: smlal.8h v13, v8, v0 ; encoding: [0x0d,0x81,0x20,0x0e] +; CHECK: smlal.4s v13, v8, v0 ; encoding: [0x0d,0x81,0x60,0x0e] +; CHECK: smlal.2d v13, v8, v0 ; encoding: [0x0d,0x81,0xa0,0x0e] +; CHECK: smlal2.8h v13, v8, v0 ; encoding: [0x0d,0x81,0x20,0x4e] +; CHECK: smlal2.4s v13, v8, v0 ; encoding: [0x0d,0x81,0x60,0x4e] +; CHECK: smlal2.2d v13, v8, v0 ; encoding: [0x0d,0x81,0xa0,0x4e] + + +;===-------------------------------------------------------------------------=== +; AdvSIMD scalar x index +;===-------------------------------------------------------------------------=== + + fmla.2s v0, v0, v0[0] + fmla.4s v0, v0, v0[1] + fmla.2d v0, v0, v0[1] + fmls.2s v0, v0, v0[0] + fmls.4s v0, v0, v0[1] + fmls.2d v0, v0, v0[1] + fmulx.2s v0, v0, v0[0] + fmulx.4s v0, v0, v0[1] + fmulx.2d v0, v0, v0[1] + fmul.2s v0, v0, v0[0] + fmul.4s v0, v0, v0[1] + fmul.2d v0, v0, v0[1] + mla.4h v0, v0, v0[0] + mla.8h v0, v0, v0[1] + mla.2s v0, v0, v0[2] + mla.4s v0, v0, v0[3] + mls.4h v0, v0, v0[0] + mls.8h v0, v0, v0[1] + mls.2s v0, v0, v0[2] + mls.4s v0, v0, v0[3] + mul.4h v0, v0, v0[0] + mul.8h v0, v0, v0[1] + mul.2s v0, v0, v0[2] + mul.4s v0, v0, v0[3] + smlal.4s v0, v0, v0[0] + smlal2.4s v0, v0, v0[1] + smlal.2d v0, v0, v0[2] + smlal2.2d v0, v0, v0[3] + smlsl.4s v0, v0, v0[0] + smlsl2.4s v0, v0, v0[1] + smlsl.2d v0, v0, v0[2] + smlsl2.2d v0, v0, v0[3] + smull.4s v0, v0, v0[0] + smull2.4s v0, v0, v0[1] + smull.2d v0, v0, v0[2] + smull2.2d v0, v0, v0[3] + sqdmlal.4s v0, v0, v0[0] + sqdmlal2.4s v0, v0, v0[1] + sqdmlal.2d v0, v0, v0[2] + sqdmlal2.2d v0, v0, v0[3] + sqdmlsl.4s v0, v0, v0[0] + sqdmlsl2.4s v0, v0, v0[1] + sqdmlsl.2d v0, v0, v0[2] + sqdmlsl2.2d v0, v0, v0[3] + sqdmulh.4h v0, v0, v0[0] + sqdmulh.8h v0, v0, v0[1] + sqdmulh.2s v0, v0, v0[2] + sqdmulh.4s v0, v0, v0[3] + sqdmull.4s v0, v0, v0[0] + sqdmull2.4s v0, v0, v0[1] + sqdmull.2d v0, v0, v0[2] + sqdmull2.2d v0, v0, v0[3] + sqrdmulh.4h v0, v0, v0[0] + sqrdmulh.8h v0, v0, v0[1] + sqrdmulh.2s v0, v0, v0[2] + sqrdmulh.4s v0, v0, v0[3] + umlal.4s v0, v0, v0[0] + umlal2.4s v0, v0, v0[1] + umlal.2d v0, v0, v0[2] + umlal2.2d v0, v0, v0[3] + umlsl.4s v0, v0, v0[0] + umlsl2.4s v0, v0, v0[1] + umlsl.2d v0, v0, v0[2] + umlsl2.2d v0, v0, v0[3] + umull.4s v0, v0, v0[0] + umull2.4s v0, v0, v0[1] + umull.2d v0, v0, v0[2] + umull2.2d v0, v0, v0[3] + +; CHECK: fmla.2s v0, v0, v0[0] ; encoding: [0x00,0x10,0x80,0x0f] +; CHECK: fmla.4s v0, v0, v0[1] ; encoding: [0x00,0x10,0xa0,0x4f] +; CHECK: fmla.2d v0, v0, v0[1] ; encoding: [0x00,0x18,0xc0,0x4f] +; CHECK: fmls.2s v0, v0, v0[0] ; encoding: [0x00,0x50,0x80,0x0f] +; CHECK: fmls.4s v0, v0, v0[1] ; encoding: [0x00,0x50,0xa0,0x4f] +; CHECK: fmls.2d v0, v0, v0[1] ; encoding: [0x00,0x58,0xc0,0x4f] +; CHECK: fmulx.2s v0, v0, v0[0] ; encoding: [0x00,0x90,0x80,0x2f] +; CHECK: fmulx.4s v0, v0, v0[1] ; encoding: [0x00,0x90,0xa0,0x6f] +; CHECK: fmulx.2d v0, v0, v0[1] ; encoding: [0x00,0x98,0xc0,0x6f] +; CHECK: fmul.2s v0, v0, v0[0] ; encoding: [0x00,0x90,0x80,0x0f] +; CHECK: fmul.4s v0, v0, v0[1] ; encoding: [0x00,0x90,0xa0,0x4f] +; CHECK: fmul.2d v0, v0, v0[1] ; encoding: [0x00,0x98,0xc0,0x4f] +; CHECK: mla.4h v0, v0, v0[0] ; encoding: [0x00,0x00,0x40,0x2f] +; CHECK: mla.8h v0, v0, v0[1] ; encoding: [0x00,0x00,0x50,0x6f] +; CHECK: mla.2s v0, v0, v0[2] ; encoding: [0x00,0x08,0x80,0x2f] +; CHECK: mla.4s v0, v0, v0[3] ; encoding: [0x00,0x08,0xa0,0x6f] +; CHECK: mls.4h v0, v0, v0[0] ; encoding: [0x00,0x40,0x40,0x2f] +; CHECK: mls.8h v0, v0, v0[1] ; encoding: [0x00,0x40,0x50,0x6f] +; CHECK: mls.2s v0, v0, v0[2] ; encoding: [0x00,0x48,0x80,0x2f] +; CHECK: mls.4s v0, v0, v0[3] ; encoding: [0x00,0x48,0xa0,0x6f] +; CHECK: mul.4h v0, v0, v0[0] ; encoding: [0x00,0x80,0x40,0x0f] +; CHECK: mul.8h v0, v0, v0[1] ; encoding: [0x00,0x80,0x50,0x4f] +; CHECK: mul.2s v0, v0, v0[2] ; encoding: [0x00,0x88,0x80,0x0f] +; CHECK: mul.4s v0, v0, v0[3] ; encoding: [0x00,0x88,0xa0,0x4f] +; CHECK: smlal.4s v0, v0, v0[0] ; encoding: [0x00,0x20,0x40,0x0f] +; CHECK: smlal2.4s v0, v0, v0[1] ; encoding: [0x00,0x20,0x50,0x4f] +; CHECK: smlal.2d v0, v0, v0[2] ; encoding: [0x00,0x28,0x80,0x0f] +; CHECK: smlal2.2d v0, v0, v0[3] ; encoding: [0x00,0x28,0xa0,0x4f] +; CHECK: smlsl.4s v0, v0, v0[0] ; encoding: [0x00,0x60,0x40,0x0f] +; CHECK: smlsl2.4s v0, v0, v0[1] ; encoding: [0x00,0x60,0x50,0x4f] +; CHECK: smlsl.2d v0, v0, v0[2] ; encoding: [0x00,0x68,0x80,0x0f] +; CHECK: smlsl2.2d v0, v0, v0[3] ; encoding: [0x00,0x68,0xa0,0x4f] +; CHECK: smull.4s v0, v0, v0[0] ; encoding: [0x00,0xa0,0x40,0x0f] +; CHECK: smull2.4s v0, v0, v0[1] ; encoding: [0x00,0xa0,0x50,0x4f] +; CHECK: smull.2d v0, v0, v0[2] ; encoding: [0x00,0xa8,0x80,0x0f] +; CHECK: smull2.2d v0, v0, v0[3] ; encoding: [0x00,0xa8,0xa0,0x4f] +; CHECK: sqdmlal.4s v0, v0, v0[0] ; encoding: [0x00,0x30,0x40,0x0f] +; CHECK: sqdmlal2.4s v0, v0, v0[1] ; encoding: [0x00,0x30,0x50,0x4f] +; CHECK: sqdmlal.2d v0, v0, v0[2] ; encoding: [0x00,0x38,0x80,0x0f] +; CHECK: sqdmlal2.2d v0, v0, v0[3] ; encoding: [0x00,0x38,0xa0,0x4f] +; CHECK: sqdmlsl.4s v0, v0, v0[0] ; encoding: [0x00,0x70,0x40,0x0f] +; CHECK: sqdmlsl2.4s v0, v0, v0[1] ; encoding: [0x00,0x70,0x50,0x4f] +; CHECK: sqdmlsl.2d v0, v0, v0[2] ; encoding: [0x00,0x78,0x80,0x0f] +; CHECK: sqdmlsl2.2d v0, v0, v0[3] ; encoding: [0x00,0x78,0xa0,0x4f] +; CHECK: sqdmulh.4h v0, v0, v0[0] ; encoding: [0x00,0xc0,0x40,0x0f] +; CHECK: sqdmulh.8h v0, v0, v0[1] ; encoding: [0x00,0xc0,0x50,0x4f] +; CHECK: sqdmulh.2s v0, v0, v0[2] ; encoding: [0x00,0xc8,0x80,0x0f] +; CHECK: sqdmulh.4s v0, v0, v0[3] ; encoding: [0x00,0xc8,0xa0,0x4f] +; CHECK: sqdmull.4s v0, v0, v0[0] ; encoding: [0x00,0xb0,0x40,0x0f] +; CHECK: sqdmull2.4s v0, v0, v0[1] ; encoding: [0x00,0xb0,0x50,0x4f] +; CHECK: sqdmull.2d v0, v0, v0[2] ; encoding: [0x00,0xb8,0x80,0x0f] +; CHECK: sqdmull2.2d v0, v0, v0[3] ; encoding: [0x00,0xb8,0xa0,0x4f] +; CHECK: sqrdmulh.4h v0, v0, v0[0] ; encoding: [0x00,0xd0,0x40,0x0f] +; CHECK: sqrdmulh.8h v0, v0, v0[1] ; encoding: [0x00,0xd0,0x50,0x4f] +; CHECK: sqrdmulh.2s v0, v0, v0[2] ; encoding: [0x00,0xd8,0x80,0x0f] +; CHECK: sqrdmulh.4s v0, v0, v0[3] ; encoding: [0x00,0xd8,0xa0,0x4f] +; CHECK: umlal.4s v0, v0, v0[0] ; encoding: [0x00,0x20,0x40,0x2f] +; CHECK: umlal2.4s v0, v0, v0[1] ; encoding: [0x00,0x20,0x50,0x6f] +; CHECK: umlal.2d v0, v0, v0[2] ; encoding: [0x00,0x28,0x80,0x2f] +; CHECK: umlal2.2d v0, v0, v0[3] ; encoding: [0x00,0x28,0xa0,0x6f] +; CHECK: umlsl.4s v0, v0, v0[0] ; encoding: [0x00,0x60,0x40,0x2f] +; CHECK: umlsl2.4s v0, v0, v0[1] ; encoding: [0x00,0x60,0x50,0x6f] +; CHECK: umlsl.2d v0, v0, v0[2] ; encoding: [0x00,0x68,0x80,0x2f] +; CHECK: umlsl2.2d v0, v0, v0[3] ; encoding: [0x00,0x68,0xa0,0x6f] +; CHECK: umull.4s v0, v0, v0[0] ; encoding: [0x00,0xa0,0x40,0x2f] +; CHECK: umull2.4s v0, v0, v0[1] ; encoding: [0x00,0xa0,0x50,0x6f] +; CHECK: umull.2d v0, v0, v0[2] ; encoding: [0x00,0xa8,0x80,0x2f] +; CHECK: umull2.2d v0, v0, v0[3] ; encoding: [0x00,0xa8,0xa0,0x6f] + + +;===-------------------------------------------------------------------------=== +; AdvSIMD scalar with shift +;===-------------------------------------------------------------------------=== + + fcvtzs s0, s0, #1 + fcvtzs d0, d0, #2 + fcvtzu s0, s0, #1 + fcvtzu d0, d0, #2 + shl d0, d0, #1 + sli d0, d0, #1 + sqrshrn b0, h0, #1 + sqrshrn h0, s0, #2 + sqrshrn s0, d0, #3 + sqrshrun b0, h0, #1 + sqrshrun h0, s0, #2 + sqrshrun s0, d0, #3 + sqshlu b0, b0, #1 + sqshlu h0, h0, #2 + sqshlu s0, s0, #3 + sqshlu d0, d0, #4 + sqshl b0, b0, #1 + sqshl h0, h0, #2 + sqshl s0, s0, #3 + sqshl d0, d0, #4 + sqshrn b0, h0, #1 + sqshrn h0, s0, #2 + sqshrn s0, d0, #3 + sqshrun b0, h0, #1 + sqshrun h0, s0, #2 + sqshrun s0, d0, #3 + sri d0, d0, #1 + srshr d0, d0, #1 + srsra d0, d0, #1 + sshr d0, d0, #1 + ucvtf s0, s0, #1 + ucvtf d0, d0, #2 + scvtf s0, s0, #1 + scvtf d0, d0, #2 + uqrshrn b0, h0, #1 + uqrshrn h0, s0, #2 + uqrshrn s0, d0, #3 + uqshl b0, b0, #1 + uqshl h0, h0, #2 + uqshl s0, s0, #3 + uqshl d0, d0, #4 + uqshrn b0, h0, #1 + uqshrn h0, s0, #2 + uqshrn s0, d0, #3 + urshr d0, d0, #1 + ursra d0, d0, #1 + ushr d0, d0, #1 + usra d0, d0, #1 + +; CHECK: fcvtzs s0, s0, #1 ; encoding: [0x00,0xfc,0x3f,0x5f] +; CHECK: fcvtzs d0, d0, #2 ; encoding: [0x00,0xfc,0x7e,0x5f] +; CHECK: fcvtzu s0, s0, #1 ; encoding: [0x00,0xfc,0x3f,0x7f] +; CHECK: fcvtzu d0, d0, #2 ; encoding: [0x00,0xfc,0x7e,0x7f] +; CHECK: shl d0, d0, #1 ; encoding: [0x00,0x54,0x41,0x5f] +; CHECK: sli d0, d0, #1 ; encoding: [0x00,0x54,0x41,0x7f] +; CHECK: sqrshrn b0, h0, #1 ; encoding: [0x00,0x9c,0x0f,0x5f] +; CHECK: sqrshrn h0, s0, #2 ; encoding: [0x00,0x9c,0x1e,0x5f] +; CHECK: sqrshrn s0, d0, #3 ; encoding: [0x00,0x9c,0x3d,0x5f] +; CHECK: sqrshrun b0, h0, #1 ; encoding: [0x00,0x8c,0x0f,0x7f] +; CHECK: sqrshrun h0, s0, #2 ; encoding: [0x00,0x8c,0x1e,0x7f] +; CHECK: sqrshrun s0, d0, #3 ; encoding: [0x00,0x8c,0x3d,0x7f] +; CHECK: sqshlu b0, b0, #1 ; encoding: [0x00,0x64,0x09,0x7f] +; CHECK: sqshlu h0, h0, #2 ; encoding: [0x00,0x64,0x12,0x7f] +; CHECK: sqshlu s0, s0, #3 ; encoding: [0x00,0x64,0x23,0x7f] +; CHECK: sqshlu d0, d0, #4 ; encoding: [0x00,0x64,0x44,0x7f] +; CHECK: sqshl b0, b0, #1 ; encoding: [0x00,0x74,0x09,0x5f] +; CHECK: sqshl h0, h0, #2 ; encoding: [0x00,0x74,0x12,0x5f] +; CHECK: sqshl s0, s0, #3 ; encoding: [0x00,0x74,0x23,0x5f] +; CHECK: sqshl d0, d0, #4 ; encoding: [0x00,0x74,0x44,0x5f] +; CHECK: sqshrn b0, h0, #1 ; encoding: [0x00,0x94,0x0f,0x5f] +; CHECK: sqshrn h0, s0, #2 ; encoding: [0x00,0x94,0x1e,0x5f] +; CHECK: sqshrn s0, d0, #3 ; encoding: [0x00,0x94,0x3d,0x5f] +; CHECK: sqshrun b0, h0, #1 ; encoding: [0x00,0x84,0x0f,0x7f] +; CHECK: sqshrun h0, s0, #2 ; encoding: [0x00,0x84,0x1e,0x7f] +; CHECK: sqshrun s0, d0, #3 ; encoding: [0x00,0x84,0x3d,0x7f] +; CHECK: sri d0, d0, #1 ; encoding: [0x00,0x44,0x7f,0x7f] +; CHECK: srshr d0, d0, #1 ; encoding: [0x00,0x24,0x7f,0x5f] +; CHECK: srsra d0, d0, #1 ; encoding: [0x00,0x34,0x7f,0x5f] +; CHECK: sshr d0, d0, #1 ; encoding: [0x00,0x04,0x7f,0x5f] +; CHECK: ucvtf s0, s0, #1 ; encoding: [0x00,0xe4,0x3f,0x7f] +; CHECK: ucvtf d0, d0, #2 ; encoding: [0x00,0xe4,0x7e,0x7f] +; check: scvtf s0, s0, #1 ; encoding: [0x00,0xe4,0x3f,0x5f] +; check: scvtf d0, d0, #2 ; encoding: [0x00,0xe4,0x7e,0x5f] +; CHECK: uqrshrn b0, h0, #1 ; encoding: [0x00,0x9c,0x0f,0x7f] +; CHECK: uqrshrn h0, s0, #2 ; encoding: [0x00,0x9c,0x1e,0x7f] +; CHECK: uqrshrn s0, d0, #3 ; encoding: [0x00,0x9c,0x3d,0x7f] +; CHECK: uqshl b0, b0, #1 ; encoding: [0x00,0x74,0x09,0x7f] +; CHECK: uqshl h0, h0, #2 ; encoding: [0x00,0x74,0x12,0x7f] +; CHECK: uqshl s0, s0, #3 ; encoding: [0x00,0x74,0x23,0x7f] +; CHECK: uqshl d0, d0, #4 ; encoding: [0x00,0x74,0x44,0x7f] +; CHECK: uqshrn b0, h0, #1 ; encoding: [0x00,0x94,0x0f,0x7f] +; CHECK: uqshrn h0, s0, #2 ; encoding: [0x00,0x94,0x1e,0x7f] +; CHECK: uqshrn s0, d0, #3 ; encoding: [0x00,0x94,0x3d,0x7f] +; CHECK: urshr d0, d0, #1 ; encoding: [0x00,0x24,0x7f,0x7f] +; CHECK: ursra d0, d0, #1 ; encoding: [0x00,0x34,0x7f,0x7f] +; CHECK: ushr d0, d0, #1 ; encoding: [0x00,0x04,0x7f,0x7f] +; CHECK: usra d0, d0, #1 ; encoding: [0x00,0x14,0x7f,0x7f] + + +;===-------------------------------------------------------------------------=== +; AdvSIMD vector with shift +;===-------------------------------------------------------------------------=== + + fcvtzs.2s v0, v0, #1 + fcvtzs.4s v0, v0, #2 + fcvtzs.2d v0, v0, #3 + fcvtzu.2s v0, v0, #1 + fcvtzu.4s v0, v0, #2 + fcvtzu.2d v0, v0, #3 + rshrn.8b v0, v0, #1 + rshrn2.16b v0, v0, #2 + rshrn.4h v0, v0, #3 + rshrn2.8h v0, v0, #4 + rshrn.2s v0, v0, #5 + rshrn2.4s v0, v0, #6 + scvtf.2s v0, v0, #1 + scvtf.4s v0, v0, #2 + scvtf.2d v0, v0, #3 + shl.8b v0, v0, #1 + shl.16b v0, v0, #2 + shl.4h v0, v0, #3 + shl.8h v0, v0, #4 + shl.2s v0, v0, #5 + shl.4s v0, v0, #6 + shl.2d v0, v0, #7 + shrn.8b v0, v0, #1 + shrn2.16b v0, v0, #2 + shrn.4h v0, v0, #3 + shrn2.8h v0, v0, #4 + shrn.2s v0, v0, #5 + shrn2.4s v0, v0, #6 + sli.8b v0, v0, #1 + sli.16b v0, v0, #2 + sli.4h v0, v0, #3 + sli.8h v0, v0, #4 + sli.2s v0, v0, #5 + sli.4s v0, v0, #6 + sli.2d v0, v0, #7 + sqrshrn.8b v0, v0, #1 + sqrshrn2.16b v0, v0, #2 + sqrshrn.4h v0, v0, #3 + sqrshrn2.8h v0, v0, #4 + sqrshrn.2s v0, v0, #5 + sqrshrn2.4s v0, v0, #6 + sqrshrun.8b v0, v0, #1 + sqrshrun2.16b v0, v0, #2 + sqrshrun.4h v0, v0, #3 + sqrshrun2.8h v0, v0, #4 + sqrshrun.2s v0, v0, #5 + sqrshrun2.4s v0, v0, #6 + sqshlu.8b v0, v0, #1 + sqshlu.16b v0, v0, #2 + sqshlu.4h v0, v0, #3 + sqshlu.8h v0, v0, #4 + sqshlu.2s v0, v0, #5 + sqshlu.4s v0, v0, #6 + sqshlu.2d v0, v0, #7 + sqshl.8b v0, v0, #1 + sqshl.16b v0, v0, #2 + sqshl.4h v0, v0, #3 + sqshl.8h v0, v0, #4 + sqshl.2s v0, v0, #5 + sqshl.4s v0, v0, #6 + sqshl.2d v0, v0, #7 + sqshrn.8b v0, v0, #1 + sqshrn2.16b v0, v0, #2 + sqshrn.4h v0, v0, #3 + sqshrn2.8h v0, v0, #4 + sqshrn.2s v0, v0, #5 + sqshrn2.4s v0, v0, #6 + sqshrun.8b v0, v0, #1 + sqshrun2.16b v0, v0, #2 + sqshrun.4h v0, v0, #3 + sqshrun2.8h v0, v0, #4 + sqshrun.2s v0, v0, #5 + sqshrun2.4s v0, v0, #6 + sri.8b v0, v0, #1 + sri.16b v0, v0, #2 + sri.4h v0, v0, #3 + sri.8h v0, v0, #4 + sri.2s v0, v0, #5 + sri.4s v0, v0, #6 + sri.2d v0, v0, #7 + srshr.8b v0, v0, #1 + srshr.16b v0, v0, #2 + srshr.4h v0, v0, #3 + srshr.8h v0, v0, #4 + srshr.2s v0, v0, #5 + srshr.4s v0, v0, #6 + srshr.2d v0, v0, #7 + srsra.8b v0, v0, #1 + srsra.16b v0, v0, #2 + srsra.4h v0, v0, #3 + srsra.8h v0, v0, #4 + srsra.2s v0, v0, #5 + srsra.4s v0, v0, #6 + srsra.2d v0, v0, #7 + sshll.8h v0, v0, #1 + sshll2.8h v0, v0, #2 + sshll.4s v0, v0, #3 + sshll2.4s v0, v0, #4 + sshll.2d v0, v0, #5 + sshll2.2d v0, v0, #6 + sshr.8b v0, v0, #1 + sshr.16b v0, v0, #2 + sshr.4h v0, v0, #3 + sshr.8h v0, v0, #4 + sshr.2s v0, v0, #5 + sshr.4s v0, v0, #6 + sshr.2d v0, v0, #7 + sshr.8b v0, v0, #1 + ssra.16b v0, v0, #2 + ssra.4h v0, v0, #3 + ssra.8h v0, v0, #4 + ssra.2s v0, v0, #5 + ssra.4s v0, v0, #6 + ssra.2d v0, v0, #7 + ssra d0, d0, #64 + ucvtf.2s v0, v0, #1 + ucvtf.4s v0, v0, #2 + ucvtf.2d v0, v0, #3 + uqrshrn.8b v0, v0, #1 + uqrshrn2.16b v0, v0, #2 + uqrshrn.4h v0, v0, #3 + uqrshrn2.8h v0, v0, #4 + uqrshrn.2s v0, v0, #5 + uqrshrn2.4s v0, v0, #6 + uqshl.8b v0, v0, #1 + uqshl.16b v0, v0, #2 + uqshl.4h v0, v0, #3 + uqshl.8h v0, v0, #4 + uqshl.2s v0, v0, #5 + uqshl.4s v0, v0, #6 + uqshl.2d v0, v0, #7 + uqshrn.8b v0, v0, #1 + uqshrn2.16b v0, v0, #2 + uqshrn.4h v0, v0, #3 + uqshrn2.8h v0, v0, #4 + uqshrn.2s v0, v0, #5 + uqshrn2.4s v0, v0, #6 + urshr.8b v0, v0, #1 + urshr.16b v0, v0, #2 + urshr.4h v0, v0, #3 + urshr.8h v0, v0, #4 + urshr.2s v0, v0, #5 + urshr.4s v0, v0, #6 + urshr.2d v0, v0, #7 + ursra.8b v0, v0, #1 + ursra.16b v0, v0, #2 + ursra.4h v0, v0, #3 + ursra.8h v0, v0, #4 + ursra.2s v0, v0, #5 + ursra.4s v0, v0, #6 + ursra.2d v0, v0, #7 + ushll.8h v0, v0, #1 + ushll2.8h v0, v0, #2 + ushll.4s v0, v0, #3 + ushll2.4s v0, v0, #4 + ushll.2d v0, v0, #5 + ushll2.2d v0, v0, #6 + ushr.8b v0, v0, #1 + ushr.16b v0, v0, #2 + ushr.4h v0, v0, #3 + ushr.8h v0, v0, #4 + ushr.2s v0, v0, #5 + ushr.4s v0, v0, #6 + ushr.2d v0, v0, #7 + usra.8b v0, v0, #1 + usra.16b v0, v0, #2 + usra.4h v0, v0, #3 + usra.8h v0, v0, #4 + usra.2s v0, v0, #5 + usra.4s v0, v0, #6 + usra.2d v0, v0, #7 + +; CHECK: fcvtzs.2s v0, v0, #1 ; encoding: [0x00,0xfc,0x3f,0x0f] +; CHECK: fcvtzs.4s v0, v0, #2 ; encoding: [0x00,0xfc,0x3e,0x4f] +; CHECK: fcvtzs.2d v0, v0, #3 ; encoding: [0x00,0xfc,0x7d,0x4f] +; CHECK: fcvtzu.2s v0, v0, #1 ; encoding: [0x00,0xfc,0x3f,0x2f] +; CHECK: fcvtzu.4s v0, v0, #2 ; encoding: [0x00,0xfc,0x3e,0x6f] +; CHECK: fcvtzu.2d v0, v0, #3 ; encoding: [0x00,0xfc,0x7d,0x6f] +; CHECK: rshrn.8b v0, v0, #1 ; encoding: [0x00,0x8c,0x0f,0x0f] +; CHECK: rshrn2.16b v0, v0, #2 ; encoding: [0x00,0x8c,0x0e,0x4f] +; CHECK: rshrn.4h v0, v0, #3 ; encoding: [0x00,0x8c,0x1d,0x0f] +; CHECK: rshrn2.8h v0, v0, #4 ; encoding: [0x00,0x8c,0x1c,0x4f] +; CHECK: rshrn.2s v0, v0, #5 ; encoding: [0x00,0x8c,0x3b,0x0f] +; CHECK: rshrn2.4s v0, v0, #6 ; encoding: [0x00,0x8c,0x3a,0x4f] +; CHECK: scvtf.2s v0, v0, #1 ; encoding: [0x00,0xe4,0x3f,0x0f] +; CHECK: scvtf.4s v0, v0, #2 ; encoding: [0x00,0xe4,0x3e,0x4f] +; CHECK: scvtf.2d v0, v0, #3 ; encoding: [0x00,0xe4,0x7d,0x4f] +; CHECK: shl.8b v0, v0, #1 ; encoding: [0x00,0x54,0x09,0x0f] +; CHECK: shl.16b v0, v0, #2 ; encoding: [0x00,0x54,0x0a,0x4f] +; CHECK: shl.4h v0, v0, #3 ; encoding: [0x00,0x54,0x13,0x0f] +; CHECK: shl.8h v0, v0, #4 ; encoding: [0x00,0x54,0x14,0x4f] +; CHECK: shl.2s v0, v0, #5 ; encoding: [0x00,0x54,0x25,0x0f] +; CHECK: shl.4s v0, v0, #6 ; encoding: [0x00,0x54,0x26,0x4f] +; CHECK: shl.2d v0, v0, #7 ; encoding: [0x00,0x54,0x47,0x4f] +; CHECK: shrn.8b v0, v0, #1 ; encoding: [0x00,0x84,0x0f,0x0f] +; CHECK: shrn2.16b v0, v0, #2 ; encoding: [0x00,0x84,0x0e,0x4f] +; CHECK: shrn.4h v0, v0, #3 ; encoding: [0x00,0x84,0x1d,0x0f] +; CHECK: shrn2.8h v0, v0, #4 ; encoding: [0x00,0x84,0x1c,0x4f] +; CHECK: shrn.2s v0, v0, #5 ; encoding: [0x00,0x84,0x3b,0x0f] +; CHECK: shrn2.4s v0, v0, #6 ; encoding: [0x00,0x84,0x3a,0x4f] +; CHECK: sli.8b v0, v0, #1 ; encoding: [0x00,0x54,0x09,0x2f] +; CHECK: sli.16b v0, v0, #2 ; encoding: [0x00,0x54,0x0a,0x6f] +; CHECK: sli.4h v0, v0, #3 ; encoding: [0x00,0x54,0x13,0x2f] +; CHECK: sli.8h v0, v0, #4 ; encoding: [0x00,0x54,0x14,0x6f] +; CHECK: sli.2s v0, v0, #5 ; encoding: [0x00,0x54,0x25,0x2f] +; CHECK: sli.4s v0, v0, #6 ; encoding: [0x00,0x54,0x26,0x6f] +; CHECK: sli.2d v0, v0, #7 ; encoding: [0x00,0x54,0x47,0x6f] +; CHECK: sqrshrn.8b v0, v0, #1 ; encoding: [0x00,0x9c,0x0f,0x0f] +; CHECK: sqrshrn2.16b v0, v0, #2 ; encoding: [0x00,0x9c,0x0e,0x4f] +; CHECK: sqrshrn.4h v0, v0, #3 ; encoding: [0x00,0x9c,0x1d,0x0f] +; CHECK: sqrshrn2.8h v0, v0, #4 ; encoding: [0x00,0x9c,0x1c,0x4f] +; CHECK: sqrshrn.2s v0, v0, #5 ; encoding: [0x00,0x9c,0x3b,0x0f] +; CHECK: sqrshrn2.4s v0, v0, #6 ; encoding: [0x00,0x9c,0x3a,0x4f] +; CHECK: sqrshrun.8b v0, v0, #1 ; encoding: [0x00,0x8c,0x0f,0x2f] +; CHECK: sqrshrun2.16b v0, v0, #2 ; encoding: [0x00,0x8c,0x0e,0x6f] +; CHECK: sqrshrun.4h v0, v0, #3 ; encoding: [0x00,0x8c,0x1d,0x2f] +; CHECK: sqrshrun2.8h v0, v0, #4 ; encoding: [0x00,0x8c,0x1c,0x6f] +; CHECK: sqrshrun.2s v0, v0, #5 ; encoding: [0x00,0x8c,0x3b,0x2f] +; CHECK: sqrshrun2.4s v0, v0, #6 ; encoding: [0x00,0x8c,0x3a,0x6f] +; CHECK: sqshlu.8b v0, v0, #1 ; encoding: [0x00,0x64,0x09,0x2f] +; CHECK: sqshlu.16b v0, v0, #2 ; encoding: [0x00,0x64,0x0a,0x6f] +; CHECK: sqshlu.4h v0, v0, #3 ; encoding: [0x00,0x64,0x13,0x2f] +; CHECK: sqshlu.8h v0, v0, #4 ; encoding: [0x00,0x64,0x14,0x6f] +; CHECK: sqshlu.2s v0, v0, #5 ; encoding: [0x00,0x64,0x25,0x2f] +; CHECK: sqshlu.4s v0, v0, #6 ; encoding: [0x00,0x64,0x26,0x6f] +; CHECK: sqshlu.2d v0, v0, #7 ; encoding: [0x00,0x64,0x47,0x6f] +; CHECK: sqshl.8b v0, v0, #1 ; encoding: [0x00,0x74,0x09,0x0f] +; CHECK: sqshl.16b v0, v0, #2 ; encoding: [0x00,0x74,0x0a,0x4f] +; CHECK: sqshl.4h v0, v0, #3 ; encoding: [0x00,0x74,0x13,0x0f] +; CHECK: sqshl.8h v0, v0, #4 ; encoding: [0x00,0x74,0x14,0x4f] +; CHECK: sqshl.2s v0, v0, #5 ; encoding: [0x00,0x74,0x25,0x0f] +; CHECK: sqshl.4s v0, v0, #6 ; encoding: [0x00,0x74,0x26,0x4f] +; CHECK: sqshl.2d v0, v0, #7 ; encoding: [0x00,0x74,0x47,0x4f] +; CHECK: sqshrn.8b v0, v0, #1 ; encoding: [0x00,0x94,0x0f,0x0f] +; CHECK: sqshrn2.16b v0, v0, #2 ; encoding: [0x00,0x94,0x0e,0x4f] +; CHECK: sqshrn.4h v0, v0, #3 ; encoding: [0x00,0x94,0x1d,0x0f] +; CHECK: sqshrn2.8h v0, v0, #4 ; encoding: [0x00,0x94,0x1c,0x4f] +; CHECK: sqshrn.2s v0, v0, #5 ; encoding: [0x00,0x94,0x3b,0x0f] +; CHECK: sqshrn2.4s v0, v0, #6 ; encoding: [0x00,0x94,0x3a,0x4f] +; CHECK: sqshrun.8b v0, v0, #1 ; encoding: [0x00,0x84,0x0f,0x2f] +; CHECK: sqshrun2.16b v0, v0, #2 ; encoding: [0x00,0x84,0x0e,0x6f] +; CHECK: sqshrun.4h v0, v0, #3 ; encoding: [0x00,0x84,0x1d,0x2f] +; CHECK: sqshrun2.8h v0, v0, #4 ; encoding: [0x00,0x84,0x1c,0x6f] +; CHECK: sqshrun.2s v0, v0, #5 ; encoding: [0x00,0x84,0x3b,0x2f] +; CHECK: sqshrun2.4s v0, v0, #6 ; encoding: [0x00,0x84,0x3a,0x6f] +; CHECK: sri.8b v0, v0, #1 ; encoding: [0x00,0x44,0x0f,0x2f] +; CHECK: sri.16b v0, v0, #2 ; encoding: [0x00,0x44,0x0e,0x6f] +; CHECK: sri.4h v0, v0, #3 ; encoding: [0x00,0x44,0x1d,0x2f] +; CHECK: sri.8h v0, v0, #4 ; encoding: [0x00,0x44,0x1c,0x6f] +; CHECK: sri.2s v0, v0, #5 ; encoding: [0x00,0x44,0x3b,0x2f] +; CHECK: sri.4s v0, v0, #6 ; encoding: [0x00,0x44,0x3a,0x6f] +; CHECK: sri.2d v0, v0, #7 ; encoding: [0x00,0x44,0x79,0x6f] +; CHECK: srshr.8b v0, v0, #1 ; encoding: [0x00,0x24,0x0f,0x0f] +; CHECK: srshr.16b v0, v0, #2 ; encoding: [0x00,0x24,0x0e,0x4f] +; CHECK: srshr.4h v0, v0, #3 ; encoding: [0x00,0x24,0x1d,0x0f] +; CHECK: srshr.8h v0, v0, #4 ; encoding: [0x00,0x24,0x1c,0x4f] +; CHECK: srshr.2s v0, v0, #5 ; encoding: [0x00,0x24,0x3b,0x0f] +; CHECK: srshr.4s v0, v0, #6 ; encoding: [0x00,0x24,0x3a,0x4f] +; CHECK: srshr.2d v0, v0, #7 ; encoding: [0x00,0x24,0x79,0x4f] +; CHECK: srsra.8b v0, v0, #1 ; encoding: [0x00,0x34,0x0f,0x0f] +; CHECK: srsra.16b v0, v0, #2 ; encoding: [0x00,0x34,0x0e,0x4f] +; CHECK: srsra.4h v0, v0, #3 ; encoding: [0x00,0x34,0x1d,0x0f] +; CHECK: srsra.8h v0, v0, #4 ; encoding: [0x00,0x34,0x1c,0x4f] +; CHECK: srsra.2s v0, v0, #5 ; encoding: [0x00,0x34,0x3b,0x0f] +; CHECK: srsra.4s v0, v0, #6 ; encoding: [0x00,0x34,0x3a,0x4f] +; CHECK: srsra.2d v0, v0, #7 ; encoding: [0x00,0x34,0x79,0x4f] +; CHECK: sshll.8h v0, v0, #1 ; encoding: [0x00,0xa4,0x09,0x0f] +; CHECK: sshll2.8h v0, v0, #2 ; encoding: [0x00,0xa4,0x0a,0x4f] +; CHECK: sshll.4s v0, v0, #3 ; encoding: [0x00,0xa4,0x13,0x0f] +; CHECK: sshll2.4s v0, v0, #4 ; encoding: [0x00,0xa4,0x14,0x4f] +; CHECK: sshll.2d v0, v0, #5 ; encoding: [0x00,0xa4,0x25,0x0f] +; CHECK: sshll2.2d v0, v0, #6 ; encoding: [0x00,0xa4,0x26,0x4f] +; CHECK: sshr.8b v0, v0, #1 ; encoding: [0x00,0x04,0x0f,0x0f] +; CHECK: sshr.16b v0, v0, #2 ; encoding: [0x00,0x04,0x0e,0x4f] +; CHECK: sshr.4h v0, v0, #3 ; encoding: [0x00,0x04,0x1d,0x0f] +; CHECK: sshr.8h v0, v0, #4 ; encoding: [0x00,0x04,0x1c,0x4f] +; CHECK: sshr.2s v0, v0, #5 ; encoding: [0x00,0x04,0x3b,0x0f] +; CHECK: sshr.4s v0, v0, #6 ; encoding: [0x00,0x04,0x3a,0x4f] +; CHECK: sshr.2d v0, v0, #7 ; encoding: [0x00,0x04,0x79,0x4f] +; CHECK: sshr.8b v0, v0, #1 ; encoding: [0x00,0x04,0x0f,0x0f] +; CHECK: ssra.16b v0, v0, #2 ; encoding: [0x00,0x14,0x0e,0x4f] +; CHECK: ssra.4h v0, v0, #3 ; encoding: [0x00,0x14,0x1d,0x0f] +; CHECK: ssra.8h v0, v0, #4 ; encoding: [0x00,0x14,0x1c,0x4f] +; CHECK: ssra.2s v0, v0, #5 ; encoding: [0x00,0x14,0x3b,0x0f] +; CHECK: ssra.4s v0, v0, #6 ; encoding: [0x00,0x14,0x3a,0x4f] +; CHECK: ssra.2d v0, v0, #7 ; encoding: [0x00,0x14,0x79,0x4f] +; CHECK: ssra d0, d0, #64 ; encoding: [0x00,0x14,0x40,0x5f] +; CHECK: ucvtf.2s v0, v0, #1 ; encoding: [0x00,0xe4,0x3f,0x2f] +; CHECK: ucvtf.4s v0, v0, #2 ; encoding: [0x00,0xe4,0x3e,0x6f] +; CHECK: ucvtf.2d v0, v0, #3 ; encoding: [0x00,0xe4,0x7d,0x6f] +; CHECK: uqrshrn.8b v0, v0, #1 ; encoding: [0x00,0x9c,0x0f,0x2f] +; CHECK: uqrshrn2.16b v0, v0, #2 ; encoding: [0x00,0x9c,0x0e,0x6f] +; CHECK: uqrshrn.4h v0, v0, #3 ; encoding: [0x00,0x9c,0x1d,0x2f] +; CHECK: uqrshrn2.8h v0, v0, #4 ; encoding: [0x00,0x9c,0x1c,0x6f] +; CHECK: uqrshrn.2s v0, v0, #5 ; encoding: [0x00,0x9c,0x3b,0x2f] +; CHECK: uqrshrn2.4s v0, v0, #6 ; encoding: [0x00,0x9c,0x3a,0x6f] +; CHECK: uqshl.8b v0, v0, #1 ; encoding: [0x00,0x74,0x09,0x2f] +; CHECK: uqshl.16b v0, v0, #2 ; encoding: [0x00,0x74,0x0a,0x6f] +; CHECK: uqshl.4h v0, v0, #3 ; encoding: [0x00,0x74,0x13,0x2f] +; CHECK: uqshl.8h v0, v0, #4 ; encoding: [0x00,0x74,0x14,0x6f] +; CHECK: uqshl.2s v0, v0, #5 ; encoding: [0x00,0x74,0x25,0x2f] +; CHECK: uqshl.4s v0, v0, #6 ; encoding: [0x00,0x74,0x26,0x6f] +; CHECK: uqshl.2d v0, v0, #7 ; encoding: [0x00,0x74,0x47,0x6f] +; CHECK: uqshrn.8b v0, v0, #1 ; encoding: [0x00,0x94,0x0f,0x2f] +; CHECK: uqshrn2.16b v0, v0, #2 ; encoding: [0x00,0x94,0x0e,0x6f] +; CHECK: uqshrn.4h v0, v0, #3 ; encoding: [0x00,0x94,0x1d,0x2f] +; CHECK: uqshrn2.8h v0, v0, #4 ; encoding: [0x00,0x94,0x1c,0x6f] +; CHECK: uqshrn.2s v0, v0, #5 ; encoding: [0x00,0x94,0x3b,0x2f] +; CHECK: uqshrn2.4s v0, v0, #6 ; encoding: [0x00,0x94,0x3a,0x6f] +; CHECK: urshr.8b v0, v0, #1 ; encoding: [0x00,0x24,0x0f,0x2f] +; CHECK: urshr.16b v0, v0, #2 ; encoding: [0x00,0x24,0x0e,0x6f] +; CHECK: urshr.4h v0, v0, #3 ; encoding: [0x00,0x24,0x1d,0x2f] +; CHECK: urshr.8h v0, v0, #4 ; encoding: [0x00,0x24,0x1c,0x6f] +; CHECK: urshr.2s v0, v0, #5 ; encoding: [0x00,0x24,0x3b,0x2f] +; CHECK: urshr.4s v0, v0, #6 ; encoding: [0x00,0x24,0x3a,0x6f] +; CHECK: urshr.2d v0, v0, #7 ; encoding: [0x00,0x24,0x79,0x6f] +; CHECK: ursra.8b v0, v0, #1 ; encoding: [0x00,0x34,0x0f,0x2f] +; CHECK: ursra.16b v0, v0, #2 ; encoding: [0x00,0x34,0x0e,0x6f] +; CHECK: ursra.4h v0, v0, #3 ; encoding: [0x00,0x34,0x1d,0x2f] +; CHECK: ursra.8h v0, v0, #4 ; encoding: [0x00,0x34,0x1c,0x6f] +; CHECK: ursra.2s v0, v0, #5 ; encoding: [0x00,0x34,0x3b,0x2f] +; CHECK: ursra.4s v0, v0, #6 ; encoding: [0x00,0x34,0x3a,0x6f] +; CHECK: ursra.2d v0, v0, #7 ; encoding: [0x00,0x34,0x79,0x6f] +; CHECK: ushll.8h v0, v0, #1 ; encoding: [0x00,0xa4,0x09,0x2f] +; CHECK: ushll2.8h v0, v0, #2 ; encoding: [0x00,0xa4,0x0a,0x6f] +; CHECK: ushll.4s v0, v0, #3 ; encoding: [0x00,0xa4,0x13,0x2f] +; CHECK: ushll2.4s v0, v0, #4 ; encoding: [0x00,0xa4,0x14,0x6f] +; CHECK: ushll.2d v0, v0, #5 ; encoding: [0x00,0xa4,0x25,0x2f] +; CHECK: ushll2.2d v0, v0, #6 ; encoding: [0x00,0xa4,0x26,0x6f] +; CHECK: ushr.8b v0, v0, #1 ; encoding: [0x00,0x04,0x0f,0x2f] +; CHECK: ushr.16b v0, v0, #2 ; encoding: [0x00,0x04,0x0e,0x6f] +; CHECK: ushr.4h v0, v0, #3 ; encoding: [0x00,0x04,0x1d,0x2f] +; CHECK: ushr.8h v0, v0, #4 ; encoding: [0x00,0x04,0x1c,0x6f] +; CHECK: ushr.2s v0, v0, #5 ; encoding: [0x00,0x04,0x3b,0x2f] +; CHECK: ushr.4s v0, v0, #6 ; encoding: [0x00,0x04,0x3a,0x6f] +; CHECK: ushr.2d v0, v0, #7 ; encoding: [0x00,0x04,0x79,0x6f] +; CHECK: usra.8b v0, v0, #1 ; encoding: [0x00,0x14,0x0f,0x2f] +; CHECK: usra.16b v0, v0, #2 ; encoding: [0x00,0x14,0x0e,0x6f] +; CHECK: usra.4h v0, v0, #3 ; encoding: [0x00,0x14,0x1d,0x2f] +; CHECK: usra.8h v0, v0, #4 ; encoding: [0x00,0x14,0x1c,0x6f] +; CHECK: usra.2s v0, v0, #5 ; encoding: [0x00,0x14,0x3b,0x2f] +; CHECK: usra.4s v0, v0, #6 ; encoding: [0x00,0x14,0x3a,0x6f] +; CHECK: usra.2d v0, v0, #7 ; encoding: [0x00,0x14,0x79,0x6f] + + +; ARM Verbose syntax variants. + + rshrn v9.8b, v11.8h, #1 + rshrn2 v8.16b, v9.8h, #2 + rshrn v7.4h, v8.4s, #3 + rshrn2 v6.8h, v7.4s, #4 + rshrn v5.2s, v6.2d, #5 + rshrn2 v4.4s, v5.2d, #6 + + shrn v9.8b, v11.8h, #1 + shrn2 v8.16b, v9.8h, #2 + shrn v7.4h, v8.4s, #3 + shrn2 v6.8h, v7.4s, #4 + shrn v5.2s, v6.2d, #5 + shrn2 v4.4s, v5.2d, #6 + + sqrshrn v9.8b, v11.8h, #1 + sqrshrn2 v8.16b, v9.8h, #2 + sqrshrn v7.4h, v8.4s, #3 + sqrshrn2 v6.8h, v7.4s, #4 + sqrshrn v5.2s, v6.2d, #5 + sqrshrn2 v4.4s, v5.2d, #6 + + sqshrn v9.8b, v11.8h, #1 + sqshrn2 v8.16b, v9.8h, #2 + sqshrn v7.4h, v8.4s, #3 + sqshrn2 v6.8h, v7.4s, #4 + sqshrn v5.2s, v6.2d, #5 + sqshrn2 v4.4s, v5.2d, #6 + + sqrshrun v9.8b, v11.8h, #1 + sqrshrun2 v8.16b, v9.8h, #2 + sqrshrun v7.4h, v8.4s, #3 + sqrshrun2 v6.8h, v7.4s, #4 + sqrshrun v5.2s, v6.2d, #5 + sqrshrun2 v4.4s, v5.2d, #6 + + sqshrun v9.8b, v11.8h, #1 + sqshrun2 v8.16b, v9.8h, #2 + sqshrun v7.4h, v8.4s, #3 + sqshrun2 v6.8h, v7.4s, #4 + sqshrun v5.2s, v6.2d, #5 + sqshrun2 v4.4s, v5.2d, #6 + + uqrshrn v9.8b, v11.8h, #1 + uqrshrn2 v8.16b, v9.8h, #2 + uqrshrn v7.4h, v8.4s, #3 + uqrshrn2 v6.8h, v7.4s, #4 + uqrshrn v5.2s, v6.2d, #5 + uqrshrn2 v4.4s, v5.2d, #6 + + uqshrn v9.8b, v11.8h, #1 + uqshrn2 v8.16b, v9.8h, #2 + uqshrn v7.4h, v8.4s, #3 + uqshrn2 v6.8h, v7.4s, #4 + uqshrn v5.2s, v6.2d, #5 + uqshrn2 v4.4s, v5.2d, #6 + + sshll2 v10.8h, v3.16b, #6 + sshll2 v11.4s, v4.8h, #5 + sshll2 v12.2d, v5.4s, #4 + sshll v13.8h, v6.8b, #3 + sshll v14.4s, v7.4h, #2 + sshll v15.2d, v8.2s, #7 + + ushll2 v10.8h, v3.16b, #6 + ushll2 v11.4s, v4.8h, #5 + ushll2 v12.2d, v5.4s, #4 + ushll v13.8h, v6.8b, #3 + ushll v14.4s, v7.4h, #2 + ushll v15.2d, v8.2s, #7 + + +; CHECK: rshrn.8b v9, v11, #1 ; encoding: [0x69,0x8d,0x0f,0x0f] +; CHECK: rshrn2.16b v8, v9, #2 ; encoding: [0x28,0x8d,0x0e,0x4f] +; CHECK: rshrn.4h v7, v8, #3 ; encoding: [0x07,0x8d,0x1d,0x0f] +; CHECK: rshrn2.8h v6, v7, #4 ; encoding: [0xe6,0x8c,0x1c,0x4f] +; CHECK: rshrn.2s v5, v6, #5 ; encoding: [0xc5,0x8c,0x3b,0x0f] +; CHECK: rshrn2.4s v4, v5, #6 ; encoding: [0xa4,0x8c,0x3a,0x4f] +; CHECK: shrn.8b v9, v11, #1 ; encoding: [0x69,0x85,0x0f,0x0f] +; CHECK: shrn2.16b v8, v9, #2 ; encoding: [0x28,0x85,0x0e,0x4f] +; CHECK: shrn.4h v7, v8, #3 ; encoding: [0x07,0x85,0x1d,0x0f] +; CHECK: shrn2.8h v6, v7, #4 ; encoding: [0xe6,0x84,0x1c,0x4f] +; CHECK: shrn.2s v5, v6, #5 ; encoding: [0xc5,0x84,0x3b,0x0f] +; CHECK: shrn2.4s v4, v5, #6 ; encoding: [0xa4,0x84,0x3a,0x4f] +; CHECK: sqrshrn.8b v9, v11, #1 ; encoding: [0x69,0x9d,0x0f,0x0f] +; CHECK: sqrshrn2.16b v8, v9, #2 ; encoding: [0x28,0x9d,0x0e,0x4f] +; CHECK: sqrshrn.4h v7, v8, #3 ; encoding: [0x07,0x9d,0x1d,0x0f] +; CHECK: sqrshrn2.8h v6, v7, #4 ; encoding: [0xe6,0x9c,0x1c,0x4f] +; CHECK: sqrshrn.2s v5, v6, #5 ; encoding: [0xc5,0x9c,0x3b,0x0f] +; CHECK: sqrshrn2.4s v4, v5, #6 ; encoding: [0xa4,0x9c,0x3a,0x4f] +; CHECK: sqshrn.8b v9, v11, #1 ; encoding: [0x69,0x95,0x0f,0x0f] +; CHECK: sqshrn2.16b v8, v9, #2 ; encoding: [0x28,0x95,0x0e,0x4f] +; CHECK: sqshrn.4h v7, v8, #3 ; encoding: [0x07,0x95,0x1d,0x0f] +; CHECK: sqshrn2.8h v6, v7, #4 ; encoding: [0xe6,0x94,0x1c,0x4f] +; CHECK: sqshrn.2s v5, v6, #5 ; encoding: [0xc5,0x94,0x3b,0x0f] +; CHECK: sqshrn2.4s v4, v5, #6 ; encoding: [0xa4,0x94,0x3a,0x4f] +; CHECK: sqrshrun.8b v9, v11, #1 ; encoding: [0x69,0x8d,0x0f,0x2f] +; CHECK: sqrshrun2.16b v8, v9, #2 ; encoding: [0x28,0x8d,0x0e,0x6f] +; CHECK: sqrshrun.4h v7, v8, #3 ; encoding: [0x07,0x8d,0x1d,0x2f] +; CHECK: sqrshrun2.8h v6, v7, #4 ; encoding: [0xe6,0x8c,0x1c,0x6f] +; CHECK: sqrshrun.2s v5, v6, #5 ; encoding: [0xc5,0x8c,0x3b,0x2f] +; CHECK: sqrshrun2.4s v4, v5, #6 ; encoding: [0xa4,0x8c,0x3a,0x6f] +; CHECK: sqshrun.8b v9, v11, #1 ; encoding: [0x69,0x85,0x0f,0x2f] +; CHECK: sqshrun2.16b v8, v9, #2 ; encoding: [0x28,0x85,0x0e,0x6f] +; CHECK: sqshrun.4h v7, v8, #3 ; encoding: [0x07,0x85,0x1d,0x2f] +; CHECK: sqshrun2.8h v6, v7, #4 ; encoding: [0xe6,0x84,0x1c,0x6f] +; CHECK: sqshrun.2s v5, v6, #5 ; encoding: [0xc5,0x84,0x3b,0x2f] +; CHECK: sqshrun2.4s v4, v5, #6 ; encoding: [0xa4,0x84,0x3a,0x6f] +; CHECK: uqrshrn.8b v9, v11, #1 ; encoding: [0x69,0x9d,0x0f,0x2f] +; CHECK: uqrshrn2.16b v8, v9, #2 ; encoding: [0x28,0x9d,0x0e,0x6f] +; CHECK: uqrshrn.4h v7, v8, #3 ; encoding: [0x07,0x9d,0x1d,0x2f] +; CHECK: uqrshrn2.8h v6, v7, #4 ; encoding: [0xe6,0x9c,0x1c,0x6f] +; CHECK: uqrshrn.2s v5, v6, #5 ; encoding: [0xc5,0x9c,0x3b,0x2f] +; CHECK: uqrshrn2.4s v4, v5, #6 ; encoding: [0xa4,0x9c,0x3a,0x6f] +; CHECK: uqshrn.8b v9, v11, #1 ; encoding: [0x69,0x95,0x0f,0x2f] +; CHECK: uqshrn2.16b v8, v9, #2 ; encoding: [0x28,0x95,0x0e,0x6f] +; CHECK: uqshrn.4h v7, v8, #3 ; encoding: [0x07,0x95,0x1d,0x2f] +; CHECK: uqshrn2.8h v6, v7, #4 ; encoding: [0xe6,0x94,0x1c,0x6f] +; CHECK: uqshrn.2s v5, v6, #5 ; encoding: [0xc5,0x94,0x3b,0x2f] +; CHECK: uqshrn2.4s v4, v5, #6 ; encoding: [0xa4,0x94,0x3a,0x6f] +; CHECK: sshll2.8h v10, v3, #6 ; encoding: [0x6a,0xa4,0x0e,0x4f] +; CHECK: sshll2.4s v11, v4, #5 ; encoding: [0x8b,0xa4,0x15,0x4f] +; CHECK: sshll2.2d v12, v5, #4 ; encoding: [0xac,0xa4,0x24,0x4f] +; CHECK: sshll.8h v13, v6, #3 ; encoding: [0xcd,0xa4,0x0b,0x0f] +; CHECK: sshll.4s v14, v7, #2 ; encoding: [0xee,0xa4,0x12,0x0f] +; CHECK: sshll.2d v15, v8, #7 ; encoding: [0x0f,0xa5,0x27,0x0f] +; CHECK: ushll2.8h v10, v3, #6 ; encoding: [0x6a,0xa4,0x0e,0x6f] +; CHECK: ushll2.4s v11, v4, #5 ; encoding: [0x8b,0xa4,0x15,0x6f] +; CHECK: ushll2.2d v12, v5, #4 ; encoding: [0xac,0xa4,0x24,0x6f] +; CHECK: ushll.8h v13, v6, #3 ; encoding: [0xcd,0xa4,0x0b,0x2f] +; CHECK: ushll.4s v14, v7, #2 ; encoding: [0xee,0xa4,0x12,0x2f] +; CHECK: ushll.2d v15, v8, #7 ; encoding: [0x0f,0xa5,0x27,0x2f] + + + pmull.8h v0, v0, v0 + pmull2.8h v0, v0, v0 + pmull.1q v2, v3, v4 + pmull2.1q v2, v3, v4 + pmull v2.1q, v3.1d, v4.1d + pmull2 v2.1q, v3.2d, v4.2d + +; CHECK: pmull.8h v0, v0, v0 ; encoding: [0x00,0xe0,0x20,0x0e] +; CHECK: pmull2.8h v0, v0, v0 ; encoding: [0x00,0xe0,0x20,0x4e] +; CHECK: pmull.1q v2, v3, v4 ; encoding: [0x62,0xe0,0xe4,0x0e] +; CHECK: pmull2.1q v2, v3, v4 ; encoding: [0x62,0xe0,0xe4,0x4e] +; CHECK: pmull.1q v2, v3, v4 ; encoding: [0x62,0xe0,0xe4,0x0e] +; CHECK: pmull2.1q v2, v3, v4 ; encoding: [0x62,0xe0,0xe4,0x4e] + + + faddp.2d d1, v2 + faddp.2s s3, v4 +; CHECK: faddp.2d d1, v2 ; encoding: [0x41,0xd8,0x70,0x7e] +; CHECK: faddp.2s s3, v4 ; encoding: [0x83,0xd8,0x30,0x7e] + + tbl.16b v2, {v4,v5,v6,v7}, v1 + tbl.8b v0, {v4,v5,v6,v7}, v1 + tbl.16b v2, {v5}, v1 + tbl.8b v0, {v5}, v1 + tbl.16b v2, {v5,v6,v7}, v1 + tbl.8b v0, {v5,v6,v7}, v1 + tbl.16b v2, {v6,v7}, v1 + tbl.8b v0, {v6,v7}, v1 +; CHECK: tbl.16b v2, { v4, v5, v6, v7 }, v1 ; encoding: [0x82,0x60,0x01,0x4e] +; CHECK: tbl.8b v0, { v4, v5, v6, v7 }, v1 ; encoding: [0x80,0x60,0x01,0x0e] +; CHECK: tbl.16b v2, { v5 }, v1 ; encoding: [0xa2,0x00,0x01,0x4e] +; CHECK: tbl.8b v0, { v5 }, v1 ; encoding: [0xa0,0x00,0x01,0x0e] +; CHECK: tbl.16b v2, { v5, v6, v7 }, v1 ; encoding: [0xa2,0x40,0x01,0x4e] +; CHECK: tbl.8b v0, { v5, v6, v7 }, v1 ; encoding: [0xa0,0x40,0x01,0x0e] +; CHECK: tbl.16b v2, { v6, v7 }, v1 ; encoding: [0xc2,0x20,0x01,0x4e] +; CHECK: tbl.8b v0, { v6, v7 }, v1 ; encoding: [0xc0,0x20,0x01,0x0e] + + tbl v2.16b, {v4.16b,v5.16b,v6.16b,v7.16b}, v1.16b + tbl v0.8b, {v4.16b,v5.16b,v6.16b,v7.16b}, v1.8b + tbl v2.16b, {v5.16b}, v1.16b + tbl v0.8b, {v5.16b}, v1.8b + tbl v2.16b, {v5.16b,v6.16b,v7.16b}, v1.16b + tbl v0.8b, {v5.16b,v6.16b,v7.16b}, v1.8b + tbl v2.16b, {v6.16b,v7.16b}, v1.16b + tbl v0.8b, {v6.16b,v7.16b}, v1.8b +; CHECK: tbl.16b v2, { v4, v5, v6, v7 }, v1 ; encoding: [0x82,0x60,0x01,0x4e] +; CHECK: tbl.8b v0, { v4, v5, v6, v7 }, v1 ; encoding: [0x80,0x60,0x01,0x0e] +; CHECK: tbl.16b v2, { v5 }, v1 ; encoding: [0xa2,0x00,0x01,0x4e] +; CHECK: tbl.8b v0, { v5 }, v1 ; encoding: [0xa0,0x00,0x01,0x0e] +; CHECK: tbl.16b v2, { v5, v6, v7 }, v1 ; encoding: [0xa2,0x40,0x01,0x4e] +; CHECK: tbl.8b v0, { v5, v6, v7 }, v1 ; encoding: [0xa0,0x40,0x01,0x0e] +; CHECK: tbl.16b v2, { v6, v7 }, v1 ; encoding: [0xc2,0x20,0x01,0x4e] +; CHECK: tbl.8b v0, { v6, v7 }, v1 ; encoding: [0xc0,0x20,0x01,0x0e] + + sqdmull s0, h0, h0 + sqdmull d0, s0, s0 +; CHECK: sqdmull s0, h0, h0 ; encoding: [0x00,0xd0,0x60,0x5e] +; CHECK: sqdmull d0, s0, s0 ; encoding: [0x00,0xd0,0xa0,0x5e] + + frsqrte s0, s0 + frsqrte d0, d0 +; CHECK: frsqrte s0, s0 ; encoding: [0x00,0xd8,0xa1,0x7e] +; CHECK: frsqrte d0, d0 ; encoding: [0x00,0xd8,0xe1,0x7e] + + mov.16b v0, v0 + mov.2s v0, v0 +; CHECK: orr.16b v0, v0, v0 ; encoding: [0x00,0x1c,0xa0,0x4e] +; CHECK: orr.8b v0, v0, v0 ; encoding: [0x00,0x1c,0xa0,0x0e] + + +; uadalp/sadalp verbose mode aliases. + uadalp v14.4h, v25.8b + uadalp v15.8h, v24.16b + uadalp v16.2s, v23.4h + uadalp v17.4s, v22.8h + uadalp v18.1d, v21.2s + uadalp v19.2d, v20.4s + + sadalp v1.4h, v11.8b + sadalp v2.8h, v12.16b + sadalp v3.2s, v13.4h + sadalp v4.4s, v14.8h + sadalp v5.1d, v15.2s + sadalp v6.2d, v16.4s + +; CHECK: uadalp.4h v14, v25 ; encoding: [0x2e,0x6b,0x20,0x2e] +; CHECK: uadalp.8h v15, v24 ; encoding: [0x0f,0x6b,0x20,0x6e] +; CHECK: uadalp.2s v16, v23 ; encoding: [0xf0,0x6a,0x60,0x2e] +; CHECK: uadalp.4s v17, v22 ; encoding: [0xd1,0x6a,0x60,0x6e] +; CHECK: uadalp.1d v18, v21 ; encoding: [0xb2,0x6a,0xa0,0x2e] +; CHECK: uadalp.2d v19, v20 ; encoding: [0x93,0x6a,0xa0,0x6e] +; CHECK: sadalp.4h v1, v11 ; encoding: [0x61,0x69,0x20,0x0e] +; CHECK: sadalp.8h v2, v12 ; encoding: [0x82,0x69,0x20,0x4e] +; CHECK: sadalp.2s v3, v13 ; encoding: [0xa3,0x69,0x60,0x0e] +; CHECK: sadalp.4s v4, v14 ; encoding: [0xc4,0x69,0x60,0x4e] +; CHECK: sadalp.1d v5, v15 ; encoding: [0xe5,0x69,0xa0,0x0e] +; CHECK: sadalp.2d v6, v16 ; encoding: [0x06,0x6a,0xa0,0x4e] + +; MVN is an alias for 'not'. + mvn v1.8b, v4.8b + mvn v19.16b, v17.16b + mvn.8b v10, v6 + mvn.16b v11, v7 + +; CHECK: not.8b v1, v4 ; encoding: [0x81,0x58,0x20,0x2e] +; CHECK: not.16b v19, v17 ; encoding: [0x33,0x5a,0x20,0x6e] +; CHECK: not.8b v10, v6 ; encoding: [0xca,0x58,0x20,0x2e] +; CHECK: not.16b v11, v7 ; encoding: [0xeb,0x58,0x20,0x6e] + +; sqdmull verbose mode aliases + sqdmull v10.4s, v12.4h, v12.4h + sqdmull2 v10.4s, v13.8h, v13.8h + sqdmull v10.2d, v13.2s, v13.2s + sqdmull2 v10.2d, v13.4s, v13.4s +; CHECK: sqdmull.4s v10, v12, v12 ; encoding: [0x8a,0xd1,0x6c,0x0e] +; CHECK: sqdmull2.4s v10, v13, v13 ; encoding: [0xaa,0xd1,0x6d,0x4e] +; CHECK: sqdmull.2d v10, v13, v13 ; encoding: [0xaa,0xd1,0xad,0x0e] +; CHECK: sqdmull2.2d v10, v13, v13 ; encoding: [0xaa,0xd1,0xad,0x4e] + +; xtn verbose mode aliases + xtn v14.8b, v14.8h + xtn2 v14.16b, v14.8h + xtn v14.4h, v14.4s + xtn2 v14.8h, v14.4s + xtn v14.2s, v14.2d + xtn2 v14.4s, v14.2d +; CHECK: xtn.8b v14, v14 ; encoding: [0xce,0x29,0x21,0x0e] +; CHECK: xtn2.16b v14, v14 ; encoding: [0xce,0x29,0x21,0x4e] +; CHECK: xtn.4h v14, v14 ; encoding: [0xce,0x29,0x61,0x0e] +; CHECK: xtn2.8h v14, v14 ; encoding: [0xce,0x29,0x61,0x4e] +; CHECK: xtn.2s v14, v14 ; encoding: [0xce,0x29,0xa1,0x0e] +; CHECK: xtn2.4s v14, v14 ; encoding: [0xce,0x29,0xa1,0x4e] + +; uaddl verbose mode aliases + uaddl v9.8h, v13.8b, v14.8b + uaddl2 v9.8h, v13.16b, v14.16b + uaddl v9.4s, v13.4h, v14.4h + uaddl2 v9.4s, v13.8h, v14.8h + uaddl v9.2d, v13.2s, v14.2s + uaddl2 v9.2d, v13.4s, v14.4s +; CHECK: uaddl.8h v9, v13, v14 ; encoding: [0xa9,0x01,0x2e,0x2e] +; CHECK: uaddl2.8h v9, v13, v14 ; encoding: [0xa9,0x01,0x2e,0x6e] +; CHECK: uaddl.4s v9, v13, v14 ; encoding: [0xa9,0x01,0x6e,0x2e] +; CHECK: uaddl2.4s v9, v13, v14 ; encoding: [0xa9,0x01,0x6e,0x6e] +; CHECK: uaddl.2d v9, v13, v14 ; encoding: [0xa9,0x01,0xae,0x2e] +; CHECK: uaddl2.2d v9, v13, v14 ; encoding: [0xa9,0x01,0xae,0x6e] + +; bit verbose mode aliases + bit v9.16b, v10.16b, v10.16b + bit v9.8b, v10.8b, v10.8b +; CHECK: bit.16b v9, v10, v10 ; encoding: [0x49,0x1d,0xaa,0x6e] +; CHECK: bit.8b v9, v10, v10 ; encoding: [0x49,0x1d,0xaa,0x2e] + +; pmull verbose mode aliases + pmull v8.8h, v8.8b, v8.8b + pmull2 v8.8h, v8.16b, v8.16b + pmull v8.1q, v8.1d, v8.1d + pmull2 v8.1q, v8.2d, v8.2d +; CHECK: pmull.8h v8, v8, v8 ; encoding: [0x08,0xe1,0x28,0x0e] +; CHECK: pmull2.8h v8, v8, v8 ; encoding: [0x08,0xe1,0x28,0x4e] +; CHECK: pmull.1q v8, v8, v8 ; encoding: [0x08,0xe1,0xe8,0x0e] +; CHECK: pmull2.1q v8, v8, v8 ; encoding: [0x08,0xe1,0xe8,0x4e] + +; usubl verbose mode aliases + usubl v9.8h, v13.8b, v14.8b + usubl2 v9.8h, v13.16b, v14.16b + usubl v9.4s, v13.4h, v14.4h + usubl2 v9.4s, v13.8h, v14.8h + usubl v9.2d, v13.2s, v14.2s + usubl2 v9.2d, v13.4s, v14.4s +; CHECK: usubl.8h v9, v13, v14 ; encoding: [0xa9,0x21,0x2e,0x2e] +; CHECK: usubl2.8h v9, v13, v14 ; encoding: [0xa9,0x21,0x2e,0x6e] +; CHECK: usubl.4s v9, v13, v14 ; encoding: [0xa9,0x21,0x6e,0x2e] +; CHECK: usubl2.4s v9, v13, v14 ; encoding: [0xa9,0x21,0x6e,0x6e] +; CHECK: usubl.2d v9, v13, v14 ; encoding: [0xa9,0x21,0xae,0x2e] +; CHECK: usubl2.2d v9, v13, v14 ; encoding: [0xa9,0x21,0xae,0x6e] + +; uabdl verbose mode aliases + uabdl v9.8h, v13.8b, v14.8b + uabdl2 v9.8h, v13.16b, v14.16b + uabdl v9.4s, v13.4h, v14.4h + uabdl2 v9.4s, v13.8h, v14.8h + uabdl v9.2d, v13.2s, v14.2s + uabdl2 v9.2d, v13.4s, v14.4s +; CHECK: uabdl.8h v9, v13, v14 ; encoding: [0xa9,0x71,0x2e,0x2e] +; CHECK: uabdl2.8h v9, v13, v14 ; encoding: [0xa9,0x71,0x2e,0x6e] +; CHECK: uabdl.4s v9, v13, v14 ; encoding: [0xa9,0x71,0x6e,0x2e] +; CHECK: uabdl2.4s v9, v13, v14 ; encoding: [0xa9,0x71,0x6e,0x6e] +; CHECK: uabdl.2d v9, v13, v14 ; encoding: [0xa9,0x71,0xae,0x2e] +; CHECK: uabdl2.2d v9, v13, v14 ; encoding: [0xa9,0x71,0xae,0x6e] + +; umull verbose mode aliases + umull v9.8h, v13.8b, v14.8b + umull2 v9.8h, v13.16b, v14.16b + umull v9.4s, v13.4h, v14.4h + umull2 v9.4s, v13.8h, v14.8h + umull v9.2d, v13.2s, v14.2s + umull2 v9.2d, v13.4s, v14.4s +; CHECK: umull.8h v9, v13, v14 ; encoding: [0xa9,0xc1,0x2e,0x2e] +; CHECK: umull2.8h v9, v13, v14 ; encoding: [0xa9,0xc1,0x2e,0x6e] +; CHECK: umull.4s v9, v13, v14 ; encoding: [0xa9,0xc1,0x6e,0x2e] +; CHECK: umull2.4s v9, v13, v14 ; encoding: [0xa9,0xc1,0x6e,0x6e] +; CHECK: umull.2d v9, v13, v14 ; encoding: [0xa9,0xc1,0xae,0x2e] +; CHECK: umull2.2d v9, v13, v14 ; encoding: [0xa9,0xc1,0xae,0x6e] + +; smull verbose mode aliases + smull v9.8h, v13.8b, v14.8b + smull2 v9.8h, v13.16b, v14.16b + smull v9.4s, v13.4h, v14.4h + smull2 v9.4s, v13.8h, v14.8h + smull v9.2d, v13.2s, v14.2s + smull2 v9.2d, v13.4s, v14.4s +; CHECK: smull.8h v9, v13, v14 ; encoding: [0xa9,0xc1,0x2e,0x0e] +; CHECK: smull2.8h v9, v13, v14 ; encoding: [0xa9,0xc1,0x2e,0x4e] +; CHECK: smull.4s v9, v13, v14 ; encoding: [0xa9,0xc1,0x6e,0x0e] +; CHECK: smull2.4s v9, v13, v14 ; encoding: [0xa9,0xc1,0x6e,0x4e] +; CHECK: smull.2d v9, v13, v14 ; encoding: [0xa9,0xc1,0xae,0x0e] +; CHECK: smull2.2d v9, v13, v14 ; encoding: [0xa9,0xc1,0xae,0x4e] diff --git a/test/MC/ARM64/aliases.s b/test/MC/ARM64/aliases.s new file mode 100644 index 0000000000..055edb56ec --- /dev/null +++ b/test/MC/ARM64/aliases.s @@ -0,0 +1,733 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 -show-encoding < %s | FileCheck %s + +foo: +;----------------------------------------------------------------------------- +; ADD #0 to/from SP/WSP is a MOV +;----------------------------------------------------------------------------- + add x1, sp, #0 +; CHECK: mov x1, sp + add sp, x2, #0 +; CHECK: mov sp, x2 + add w3, wsp, #0 +; CHECK: mov w3, wsp + add wsp, w4, #0 +; CHECK: mov wsp, w4 + mov x5, sp +; CHECK: mov x5, sp + mov sp, x6 +; CHECK: mov sp, x6 + mov w7, wsp +; CHECK: mov w7, wsp + mov wsp, w8 +; CHECK: mov wsp, w8 + +;----------------------------------------------------------------------------- +; ORR Rd, Rn, Rn is a MOV +;----------------------------------------------------------------------------- + orr x2, xzr, x9 +; CHECK: mov x2, x9 + orr w2, wzr, w9 +; CHECK: mov w2, w9 + mov x3, x4 +; CHECK: mov x3, x4 + mov w5, w6 +; CHECK: mov w5, w6 + +;----------------------------------------------------------------------------- +; TST Xn, #<imm> +;----------------------------------------------------------------------------- + tst w1, #3 + tst x1, #3 + tst w1, w2 + tst x1, x2 + ands wzr, w1, w2, lsl #2 + ands xzr, x1, x2, lsl #3 + tst w3, w7, lsl #31 + tst x2, x20, asr #0 + +; CHECK: tst w1, #0x3 ; encoding: [0x3f,0x04,0x00,0x72] +; CHECK: tst x1, #0x3 ; encoding: [0x3f,0x04,0x40,0xf2] +; CHECK: tst w1, w2 ; encoding: [0x3f,0x00,0x02,0x6a] +; CHECK: tst x1, x2 ; encoding: [0x3f,0x00,0x02,0xea] +; CHECK: tst w1, w2, lsl #2 ; encoding: [0x3f,0x08,0x02,0x6a] +; CHECK: tst x1, x2, lsl #3 ; encoding: [0x3f,0x0c,0x02,0xea] +; CHECK: tst w3, w7, lsl #31 ; encoding: [0x7f,0x7c,0x07,0x6a] +; CHECK: tst x2, x20, asr #0 ; encoding: [0x5f,0x00,0x94,0xea] + +;----------------------------------------------------------------------------- +; ADDS to WZR/XZR is a CMN +;----------------------------------------------------------------------------- + cmn w1, #3, lsl #0 + cmn x2, #4194304 + cmn w4, w5 + cmn x6, x7 + cmn w8, w9, asr #3 + cmn x2, x3, lsr #4 + cmn x2, w3, uxtb #1 + cmn x4, x5, uxtx #1 + +; CHECK: cmn w1, #3 ; encoding: [0x3f,0x0c,0x00,0x31] +; CHECK: cmn x2, #4194304 ; encoding: [0x5f,0x00,0x50,0xb1] +; CHECK: cmn w4, w5 ; encoding: [0x9f,0x00,0x05,0x2b] +; CHECK: cmn x6, x7 ; encoding: [0xdf,0x00,0x07,0xab] +; CHECK: cmn w8, w9, asr #3 ; encoding: [0x1f,0x0d,0x89,0x2b] +; CHECK: cmn x2, x3, lsr #4 ; encoding: [0x5f,0x10,0x43,0xab] +; CHECK: cmn x2, w3, uxtb #1 ; encoding: [0x5f,0x04,0x23,0xab] +; CHECK: cmn x4, x5, uxtx #1 ; encoding: [0x9f,0x64,0x25,0xab] + + +;----------------------------------------------------------------------------- +; SUBS to WZR/XZR is a CMP +;----------------------------------------------------------------------------- + cmp w1, #1024, lsl #12 + cmp x2, #1024 + cmp w4, w5 + cmp x6, x7 + cmp w8, w9, asr #3 + cmp x2, x3, lsr #4 + cmp x2, w3, uxth #2 + cmp x4, x5, uxtx + cmp wzr, w1 + cmp x8, w8, uxtw + cmp w9, w8, uxtw + cmp wsp, w9, lsl #0 + +; CHECK: cmp w1, #4194304 ; encoding: [0x3f,0x00,0x50,0x71] +; CHECK: cmp x2, #1024 ; encoding: [0x5f,0x00,0x10,0xf1] +; CHECK: cmp w4, w5 ; encoding: [0x9f,0x00,0x05,0x6b] +; CHECK: cmp x6, x7 ; encoding: [0xdf,0x00,0x07,0xeb] +; CHECK: cmp w8, w9, asr #3 ; encoding: [0x1f,0x0d,0x89,0x6b] +; CHECK: cmp x2, x3, lsr #4 ; encoding: [0x5f,0x10,0x43,0xeb] +; CHECK: cmp x2, w3, uxth #2 ; encoding: [0x5f,0x28,0x23,0xeb] +; CHECK: cmp x4, x5, uxtx ; encoding: [0x9f,0x60,0x25,0xeb] +; CHECK: cmp wzr, w1 ; encoding: [0xff,0x03,0x01,0x6b] +; CHECK: cmp x8, w8, uxtw ; encoding: [0x1f,0x41,0x28,0xeb] +; CHECK: cmp w9, w8, uxtw ; encoding: [0x3f,0x41,0x28,0x6b] +; CHECK: cmp wsp, w9 ; encoding: [0xff,0x63,0x29,0x6b] + + +;----------------------------------------------------------------------------- +; SUB/SUBS from WZR/XZR is a NEG +;----------------------------------------------------------------------------- + + neg w0, w1 +; CHECK: neg w0, w1 + neg w0, w1, lsl #1 +; CHECK: sub w0, wzr, w1, lsl #1 + neg x0, x1 +; CHECK: neg x0, x1 + neg x0, x1, asr #1 +; CHECK: sub x0, xzr, x1, asr #1 + negs w0, w1 +; CHECK: negs w0, w1 + negs w0, w1, lsl #1 +; CHECK: subs w0, wzr, w1, lsl #1 + negs x0, x1 +; CHECK: negs x0, x1 + negs x0, x1, asr #1 +; CHECK: subs x0, xzr, x1, asr #1 + +;----------------------------------------------------------------------------- +; MOV aliases +;----------------------------------------------------------------------------- + + mov x0, #281470681743360 + mov x0, #18446744073709486080 + +; CHECK: movz x0, #65535, lsl #32 +; CHECK: movn x0, #65535 + + mov w0, #0xffffffff + mov w0, #0xffffff00 + +; CHECK: movn w0, #0 +; CHECK: movn w0, #255 + +;----------------------------------------------------------------------------- +; MVN aliases +;----------------------------------------------------------------------------- + + mvn w4, w9 + mvn x2, x3 + orn w4, wzr, w9 + +; CHECK: mvn w4, w9 ; encoding: [0xe4,0x03,0x29,0x2a] +; CHECK: mvn x2, x3 ; encoding: [0xe2,0x03,0x23,0xaa] +; CHECK: mvn w4, w9 ; encoding: [0xe4,0x03,0x29,0x2a] + +;----------------------------------------------------------------------------- +; Bitfield aliases +;----------------------------------------------------------------------------- + + bfi w0, w0, #1, #4 + bfi x0, x0, #1, #4 + bfi w0, w0, #0, #2 + bfi x0, x0, #0, #2 + bfxil w0, w0, #2, #3 + bfxil x0, x0, #2, #3 + sbfiz w0, w0, #1, #4 + sbfiz x0, x0, #1, #4 + sbfx w0, w0, #2, #3 + sbfx x0, x0, #2, #3 + ubfiz w0, w0, #1, #4 + ubfiz x0, x0, #1, #4 + ubfx w0, w0, #2, #3 + ubfx x0, x0, #2, #3 + +; CHECK: bfm w0, w0, #31, #3 +; CHECK: bfm x0, x0, #63, #3 +; CHECK: bfm w0, w0, #0, #1 +; CHECK: bfm x0, x0, #0, #1 +; CHECK: bfm w0, w0, #2, #4 +; CHECK: bfm x0, x0, #2, #4 +; CHECK: sbfm w0, w0, #31, #3 +; CHECK: sbfm x0, x0, #63, #3 +; CHECK: sbfm w0, w0, #2, #4 +; CHECK: sbfm x0, x0, #2, #4 +; CHECK: ubfm w0, w0, #31, #3 +; CHECK: ubfm x0, x0, #63, #3 +; CHECK: ubfm w0, w0, #2, #4 +; CHECK: ubfm x0, x0, #2, #4 + +;----------------------------------------------------------------------------- +; Shift (immediate) aliases +;----------------------------------------------------------------------------- + +; CHECK: asr w1, w3, #13 +; CHECK: asr x1, x3, #13 +; CHECK: lsl w0, w0, #1 +; CHECK: lsl x0, x0, #1 +; CHECK: lsr w0, w0, #4 +; CHECK: lsr x0, x0, #4 + + sbfm w1, w3, #13, #31 + sbfm x1, x3, #13, #63 + ubfm w0, w0, #31, #30 + ubfm x0, x0, #63, #62 + ubfm w0, w0, #4, #31 + ubfm x0, x0, #4, #63 +; CHECK: extr w1, w3, w3, #5 +; CHECK: extr x1, x3, x3, #5 + ror w1, w3, #5 + ror x1, x3, #5 +; CHECK: lsl w1, wzr, #3 + lsl w1, wzr, #3 + +;----------------------------------------------------------------------------- +; Sign/Zero extend aliases +;----------------------------------------------------------------------------- + + sxtb w1, w2 + sxth w1, w2 + uxtb w1, w2 + uxth w1, w2 + +; CHECK: sxtb w1, w2 +; CHECK: sxth w1, w2 +; CHECK: uxtb w1, w2 +; CHECK: uxth w1, w2 + + sxtb x1, x2 + sxth x1, x2 + sxtw x1, x2 + uxtb x1, x2 + uxth x1, x2 + uxtw x1, x2 + +; CHECK: sxtb x1, x2 +; CHECK: sxth x1, x2 +; CHECK: sxtw x1, x2 +; CHECK: uxtb x1, x2 +; CHECK: uxth x1, x2 +; CHECK: uxtw x1, x2 + +;----------------------------------------------------------------------------- +; Negate with carry +;----------------------------------------------------------------------------- + + ngc w1, w2 + ngc x1, x2 + ngcs w1, w2 + ngcs x1, x2 + +; CHECK: ngc w1, w2 +; CHECK: ngc x1, x2 +; CHECK: ngcs w1, w2 +; CHECK: ngcs x1, x2 + +;----------------------------------------------------------------------------- +; 6.6.1 Multiply aliases +;----------------------------------------------------------------------------- + + mneg w1, w2, w3 + mneg x1, x2, x3 + mul w1, w2, w3 + mul x1, x2, x3 + smnegl x1, w2, w3 + umnegl x1, w2, w3 + smull x1, w2, w3 + umull x1, w2, w3 + +; CHECK: mneg w1, w2, w3 +; CHECK: mneg x1, x2, x3 +; CHECK: mul w1, w2, w3 +; CHECK: mul x1, x2, x3 +; CHECK: smnegl x1, w2, w3 +; CHECK: umnegl x1, w2, w3 +; CHECK: smull x1, w2, w3 +; CHECK: umull x1, w2, w3 + +;----------------------------------------------------------------------------- +; Conditional select aliases +;----------------------------------------------------------------------------- + + cset w1, eq + cset x1, eq + csetm w1, ne + csetm x1, ne + cinc w1, w2, lt + cinc x1, x2, lt + cinv w1, w2, mi + cinv x1, x2, mi + +; CHECK: csinc w1, wzr, wzr, ne +; CHECK: csinc x1, xzr, xzr, ne +; CHECK: csinv w1, wzr, wzr, eq +; CHECK: csinv x1, xzr, xzr, eq +; CHECK: csinc w1, w2, w2, ge +; CHECK: csinc x1, x2, x2, ge +; CHECK: csinv w1, w2, w2, pl +; CHECK: csinv x1, x2, x2, pl + +;----------------------------------------------------------------------------- +; SYS aliases +;----------------------------------------------------------------------------- + + sys #0, c7, c1, #0 +; CHECK: ic ialluis + sys #0, c7, c5, #0 +; CHECK: ic iallu + sys #3, c7, c5, #1 +; CHECK: ic ivau + + sys #3, c7, c4, #1 +; CHECK: dc zva + sys #0, c7, c6, #1 +; CHECK: dc ivac + sys #0, c7, c6, #2 +; CHECK: dc isw + sys #3, c7, c10, #1 +; CHECK: dc cvac + sys #0, c7, c10, #2 +; CHECK: dc csw + sys #3, c7, c11, #1 +; CHECK: dc cvau + sys #3, c7, c14, #1 +; CHECK: dc civac + sys #0, c7, c14, #2 +; CHECK: dc cisw + + sys #0, c7, c8, #0 +; CHECK: at s1e1r + sys #4, c7, c8, #0 +; CHECK: at s1e2r + sys #6, c7, c8, #0 +; CHECK: at s1e3r + sys #0, c7, c8, #1 +; CHECK: at s1e1w + sys #4, c7, c8, #1 +; CHECK: at s1e2w + sys #6, c7, c8, #1 +; CHECK: at s1e3w + sys #0, c7, c8, #2 +; CHECK: at s1e0r + sys #0, c7, c8, #3 +; CHECK: at s1e0w + sys #4, c7, c8, #4 +; CHECK: at s12e1r + sys #4, c7, c8, #5 +; CHECK: at s12e1w + sys #4, c7, c8, #6 +; CHECK: at s12e0r + sys #4, c7, c8, #7 +; CHECK: at s12e0w + + sys #0, c8, c3, #0 +; CHECK: tlbi vmalle1is + sys #4, c8, c3, #0 +; CHECK: tlbi alle2is + sys #6, c8, c3, #0 +; CHECK: tlbi alle3is + sys #0, c8, c3, #1 +; CHECK: tlbi vae1is + sys #4, c8, c3, #1 +; CHECK: tlbi vae2is + sys #6, c8, c3, #1 +; CHECK: tlbi vae3is + sys #0, c8, c3, #2 +; CHECK: tlbi aside1is + sys #0, c8, c3, #3 +; CHECK: tlbi vaae1is + sys #4, c8, c3, #4 +; CHECK: tlbi alle1is + sys #0, c8, c3, #5 +; CHECK: tlbi vale1is + sys #0, c8, c3, #7 +; CHECK: tlbi vaale1is + sys #0, c8, c7, #0 +; CHECK: tlbi vmalle1 + sys #4, c8, c7, #0 +; CHECK: tlbi alle2 + sys #4, c8, c3, #5 +; CHECK: tlbi vale2is + sys #6, c8, c3, #5 +; CHECK: tlbi vale3is + sys #6, c8, c7, #0 +; CHECK: tlbi alle3 + sys #0, c8, c7, #1 +; CHECK: tlbi vae1 + sys #4, c8, c7, #1 +; CHECK: tlbi vae2 + sys #6, c8, c7, #1 +; CHECK: tlbi vae3 + sys #0, c8, c7, #2 +; CHECK: tlbi aside1 + sys #0, c8, c7, #3 +; CHECK: tlbi vaae1 + sys #4, c8, c7, #4 +; CHECK: tlbi alle1 + sys #0, c8, c7, #5 +; CHECK: tlbi vale1 + sys #4, c8, c7, #5 +; CHECK: tlbi vale2 + sys #6, c8, c7, #5 +; CHECK: tlbi vale3 + sys #0, c8, c7, #7 +; CHECK: tlbi vaale1 + sys #4, c8, c4, #1 +; CHECK: tlbi ipas2e1 + sys #4, c8, c4, #5 +; CHECK: tlbi ipas2le1 + sys #4, c8, c7, #6 +; CHECK: tlbi vmalls12e1 + sys #4, c8, c3, #6 +; CHECK: tlbi vmalls12e1is + + ic ialluis +; CHECK: ic ialluis + ic iallu +; CHECK: ic iallu + ic ivau +; CHECK: ic ivau + + dc zva +; CHECK: dc zva + dc ivac +; CHECK: dc ivac + dc isw +; CHECK: dc isw + dc cvac +; CHECK: dc cvac + dc csw +; CHECK: dc csw + dc cvau +; CHECK: dc cvau + dc civac +; CHECK: dc civac + dc cisw +; CHECK: dc cisw + + at s1e1r +; CHECK: at s1e1r + at s1e2r +; CHECK: at s1e2r + at s1e3r +; CHECK: at s1e3r + at s1e1w +; CHECK: at s1e1w + at s1e2w +; CHECK: at s1e2w + at s1e3w +; CHECK: at s1e3w + at s1e0r +; CHECK: at s1e0r + at s1e0w +; CHECK: at s1e0w + at s12e1r +; CHECK: at s12e1r + at s12e1w +; CHECK: at s12e1w + at s12e0r +; CHECK: at s12e0r + at s12e0w +; CHECK: at s12e0w + + tlbi vmalle1is +; CHECK: tlbi vmalle1is + tlbi alle2is +; CHECK: tlbi alle2is + tlbi alle3is +; CHECK: tlbi alle3is + tlbi vae1is +; CHECK: tlbi vae1is + tlbi vae2is +; CHECK: tlbi vae2is + tlbi vae3is +; CHECK: tlbi vae3is + tlbi aside1is +; CHECK: tlbi aside1is + tlbi vaae1is +; CHECK: tlbi vaae1is + tlbi alle1is +; CHECK: tlbi alle1is + tlbi vale1is +; CHECK: tlbi vale1is + tlbi vaale1is +; CHECK: tlbi vaale1is + tlbi vmalle1 +; CHECK: tlbi vmalle1 + tlbi alle2 +; CHECK: tlbi alle2 + tlbi vale2is +; CHECK: tlbi vale2is + tlbi vale3is +; CHECK: tlbi vale3is + tlbi alle3 +; CHECK: tlbi alle3 + tlbi vae1 +; CHECK: tlbi vae1 + tlbi vae2 +; CHECK: tlbi vae2 + tlbi vae3 +; CHECK: tlbi vae3 + tlbi aside1 +; CHECK: tlbi aside1 + tlbi vaae1 +; CHECK: tlbi vaae1 + tlbi alle1 +; CHECK: tlbi alle1 + tlbi vale1 +; CHECK: tlbi vale1 + tlbi vale2 +; CHECK: tlbi vale2 + tlbi vale3 +; CHECK: tlbi vale3 + tlbi vaale1 +; CHECK: tlbi vaale1 + tlbi ipas2e1, x10 +; CHECK: tlbi ipas2e1, x10 + tlbi ipas2le1, x1 +; CHECK: tlbi ipas2le1, x1 + tlbi vmalls12e1 +; CHECK: tlbi vmalls12e1 + tlbi vmalls12e1is +; CHECK: tlbi vmalls12e1is + +;----------------------------------------------------------------------------- +; 5.8.5 Vector Arithmetic aliases +;----------------------------------------------------------------------------- + + cmls.8b v0, v2, v1 + cmls.16b v0, v2, v1 + cmls.4h v0, v2, v1 + cmls.8h v0, v2, v1 + cmls.2s v0, v2, v1 + cmls.4s v0, v2, v1 + cmls.2d v0, v2, v1 +; CHECK: cmhs.8b v0, v1, v2 +; CHECK: cmhs.16b v0, v1, v2 +; CHECK: cmhs.4h v0, v1, v2 +; CHECK: cmhs.8h v0, v1, v2 +; CHECK: cmhs.2s v0, v1, v2 +; CHECK: cmhs.4s v0, v1, v2 +; CHECK: cmhs.2d v0, v1, v2 + + cmlo.8b v0, v2, v1 + cmlo.16b v0, v2, v1 + cmlo.4h v0, v2, v1 + cmlo.8h v0, v2, v1 + cmlo.2s v0, v2, v1 + cmlo.4s v0, v2, v1 + cmlo.2d v0, v2, v1 +; CHECK: cmhi.8b v0, v1, v2 +; CHECK: cmhi.16b v0, v1, v2 +; CHECK: cmhi.4h v0, v1, v2 +; CHECK: cmhi.8h v0, v1, v2 +; CHECK: cmhi.2s v0, v1, v2 +; CHECK: cmhi.4s v0, v1, v2 +; CHECK: cmhi.2d v0, v1, v2 + + cmle.8b v0, v2, v1 + cmle.16b v0, v2, v1 + cmle.4h v0, v2, v1 + cmle.8h v0, v2, v1 + cmle.2s v0, v2, v1 + cmle.4s v0, v2, v1 + cmle.2d v0, v2, v1 +; CHECK: cmge.8b v0, v1, v2 +; CHECK: cmge.16b v0, v1, v2 +; CHECK: cmge.4h v0, v1, v2 +; CHECK: cmge.8h v0, v1, v2 +; CHECK: cmge.2s v0, v1, v2 +; CHECK: cmge.4s v0, v1, v2 +; CHECK: cmge.2d v0, v1, v2 + + cmlt.8b v0, v2, v1 + cmlt.16b v0, v2, v1 + cmlt.4h v0, v2, v1 + cmlt.8h v0, v2, v1 + cmlt.2s v0, v2, v1 + cmlt.4s v0, v2, v1 + cmlt.2d v0, v2, v1 +; CHECK: cmgt.8b v0, v1, v2 +; CHECK: cmgt.16b v0, v1, v2 +; CHECK: cmgt.4h v0, v1, v2 +; CHECK: cmgt.8h v0, v1, v2 +; CHECK: cmgt.2s v0, v1, v2 +; CHECK: cmgt.4s v0, v1, v2 +; CHECK: cmgt.2d v0, v1, v2 + + fcmle.2s v0, v2, v1 + fcmle.4s v0, v2, v1 + fcmle.2d v0, v2, v1 +; CHECK: fcmge.2s v0, v1, v2 +; CHECK: fcmge.4s v0, v1, v2 +; CHECK: fcmge.2d v0, v1, v2 + + fcmlt.2s v0, v2, v1 + fcmlt.4s v0, v2, v1 + fcmlt.2d v0, v2, v1 +; CHECK: fcmgt.2s v0, v1, v2 +; CHECK: fcmgt.4s v0, v1, v2 +; CHECK: fcmgt.2d v0, v1, v2 + + facle.2s v0, v2, v1 + facle.4s v0, v2, v1 + facle.2d v0, v2, v1 +; CHECK: facge.2s v0, v1, v2 +; CHECK: facge.4s v0, v1, v2 +; CHECK: facge.2d v0, v1, v2 + + faclt.2s v0, v2, v1 + faclt.4s v0, v2, v1 + faclt.2d v0, v2, v1 +; CHECK: facgt.2s v0, v1, v2 +; CHECK: facgt.4s v0, v1, v2 +; CHECK: facgt.2d v0, v1, v2 + +;----------------------------------------------------------------------------- +; 5.8.6 Scalar Arithmetic aliases +;----------------------------------------------------------------------------- + + cmls d0, d2, d1 +; CHECK: cmhs d0, d1, d2 + + cmle d0, d2, d1 +; CHECK: cmge d0, d1, d2 + + cmlo d0, d2, d1 +; CHECK: cmhi d0, d1, d2 + + cmlt d0, d2, d1 +; CHECK: cmgt d0, d1, d2 + + fcmle s0, s2, s1 + fcmle d0, d2, d1 +; CHECK: fcmge s0, s1, s2 +; CHECK: fcmge d0, d1, d2 + + fcmlt s0, s2, s1 + fcmlt d0, d2, d1 +; CHECK: fcmgt s0, s1, s2 +; CHECK: fcmgt d0, d1, d2 + + facle s0, s2, s1 + facle d0, d2, d1 +; CHECK: facge s0, s1, s2 +; CHECK: facge d0, d1, d2 + + faclt s0, s2, s1 + faclt d0, d2, d1 +; CHECK: facgt s0, s1, s2 +; CHECK: facgt d0, d1, d2 + +;----------------------------------------------------------------------------- +; 5.8.14 Vector Shift (immediate) +;----------------------------------------------------------------------------- + sxtl v1.8h, v2.8b +; CHECK: sshll.8h v1, v2, #0 + sxtl.8h v1, v2 +; CHECK: sshll.8h v1, v2, #0 + + sxtl v1.4s, v2.4h +; CHECK: sshll.4s v1, v2, #0 + sxtl.4s v1, v2 +; CHECK: sshll.4s v1, v2, #0 + + sxtl v1.2d, v2.2s +; CHECK: sshll.2d v1, v2, #0 + sxtl.2d v1, v2 +; CHECK: sshll.2d v1, v2, #0 + + sxtl2 v1.8h, v2.16b +; CHECK: sshll2.8h v1, v2, #0 + sxtl2.8h v1, v2 +; CHECK: sshll2.8h v1, v2, #0 + + sxtl2 v1.4s, v2.8h +; CHECK: sshll2.4s v1, v2, #0 + sxtl2.4s v1, v2 +; CHECK: sshll2.4s v1, v2, #0 + + sxtl2 v1.2d, v2.4s +; CHECK: sshll2.2d v1, v2, #0 + sxtl2.2d v1, v2 +; CHECK: sshll2.2d v1, v2, #0 + + uxtl v1.8h, v2.8b +; CHECK: ushll.8h v1, v2, #0 + uxtl.8h v1, v2 +; CHECK: ushll.8h v1, v2, #0 + + uxtl v1.4s, v2.4h +; CHECK: ushll.4s v1, v2, #0 + uxtl.4s v1, v2 +; CHECK: ushll.4s v1, v2, #0 + + uxtl v1.2d, v2.2s +; CHECK: ushll.2d v1, v2, #0 + uxtl.2d v1, v2 +; CHECK: ushll.2d v1, v2, #0 + + uxtl2 v1.8h, v2.16b +; CHECK: ushll2.8h v1, v2, #0 + uxtl2.8h v1, v2 +; CHECK: ushll2.8h v1, v2, #0 + + uxtl2 v1.4s, v2.8h +; CHECK: ushll2.4s v1, v2, #0 + uxtl2.4s v1, v2 +; CHECK: ushll2.4s v1, v2, #0 + + uxtl2 v1.2d, v2.4s +; CHECK: ushll2.2d v1, v2, #0 + uxtl2.2d v1, v2 +; CHECK: ushll2.2d v1, v2, #0 + + +;----------------------------------------------------------------------------- +; MOVI verbose syntax with shift operand omitted. +;----------------------------------------------------------------------------- + movi v4.16b, #0x00 + movi v4.16B, #0x01 + movi v4.8b, #0x02 + movi v4.8B, #0x03 + movi v1.2d, #0x000000000000ff + movi v2.2D, #0x000000000000ff + +; CHECK: movi.16b v4, #0 ; encoding: [0x04,0xe4,0x00,0x4f] +; CHECK: movi.16b v4, #1 ; encoding: [0x24,0xe4,0x00,0x4f] +; CHECK: movi.8b v4, #2 ; encoding: [0x44,0xe4,0x00,0x0f] +; CHECK: movi.8b v4, #3 ; encoding: [0x64,0xe4,0x00,0x0f] +; CHECK: movi.2d v1, #0x000000000000ff ; encoding: [0x21,0xe4,0x00,0x6f] +; CHECK: movi.2d v2, #0x000000000000ff ; encoding: [0x22,0xe4,0x00,0x6f] diff --git a/test/MC/ARM64/arithmetic-encoding.s b/test/MC/ARM64/arithmetic-encoding.s new file mode 100644 index 0000000000..7c89244b72 --- /dev/null +++ b/test/MC/ARM64/arithmetic-encoding.s @@ -0,0 +1,631 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s + +foo: +;==---------------------------------------------------------------------------== +; Add/Subtract with carry/borrow +;==---------------------------------------------------------------------------== + + adc w1, w2, w3 + adc x1, x2, x3 + adcs w5, w4, w3 + adcs x5, x4, x3 + +; CHECK: adc w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x1a] +; CHECK: adc x1, x2, x3 ; encoding: [0x41,0x00,0x03,0x9a] +; CHECK: adcs w5, w4, w3 ; encoding: [0x85,0x00,0x03,0x3a] +; CHECK: adcs x5, x4, x3 ; encoding: [0x85,0x00,0x03,0xba] + + sbc w1, w2, w3 + sbc x1, x2, x3 + sbcs w1, w2, w3 + sbcs x1, x2, x3 + +; CHECK: sbc w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x5a] +; CHECK: sbc x1, x2, x3 ; encoding: [0x41,0x00,0x03,0xda] +; CHECK: sbcs w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x7a] +; CHECK: sbcs x1, x2, x3 ; encoding: [0x41,0x00,0x03,0xfa] + +;==---------------------------------------------------------------------------== +; Add/Subtract with (optionally shifted) immediate +;==---------------------------------------------------------------------------== + + add w3, w4, #1024 + add w3, w4, #1024, lsl #0 + add x3, x4, #1024 + add x3, x4, #1024, lsl #0 + +; CHECK: add w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x11] +; CHECK: add w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x11] +; CHECK: add x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0x91] +; CHECK: add x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0x91] + + add w3, w4, #1024, lsl #12 + add w3, w4, #4194304 + add w3, w4, #0, lsl #12 + add x3, x4, #1024, lsl #12 + add x3, x4, #4194304 + add x3, x4, #0, lsl #12 + add sp, sp, #32 + +; CHECK: add w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x11] +; CHECK: add w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x11] +; CHECK: add w3, w4, #0, lsl #12 ; encoding: [0x83,0x00,0x40,0x11] +; CHECK: add x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0x91] +; CHECK: add x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0x91] +; CHECK: add x3, x4, #0, lsl #12 ; encoding: [0x83,0x00,0x40,0x91] +; CHECK: add sp, sp, #32 ; encoding: [0xff,0x83,0x00,0x91] + + adds w3, w4, #1024 + adds w3, w4, #1024, lsl #0 + adds w3, w4, #1024, lsl #12 + adds x3, x4, #1024 + adds x3, x4, #1024, lsl #0 + adds x3, x4, #1024, lsl #12 + +; CHECK: adds w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x31] +; CHECK: adds w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x31] +; CHECK: adds w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x31] +; CHECK: adds x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xb1] +; CHECK: adds x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xb1] +; CHECK: adds x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xb1] + + sub w3, w4, #1024 + sub w3, w4, #1024, lsl #0 + sub w3, w4, #1024, lsl #12 + sub x3, x4, #1024 + sub x3, x4, #1024, lsl #0 + sub x3, x4, #1024, lsl #12 + sub sp, sp, #32 + +; CHECK: sub w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x51] +; CHECK: sub w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x51] +; CHECK: sub w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x51] +; CHECK: sub x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xd1] +; CHECK: sub x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xd1] +; CHECK: sub x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xd1] +; CHECK: sub sp, sp, #32 ; encoding: [0xff,0x83,0x00,0xd1] + + subs w3, w4, #1024 + subs w3, w4, #1024, lsl #0 + subs w3, w4, #1024, lsl #12 + subs x3, x4, #1024 + subs x3, x4, #1024, lsl #0 + subs x3, x4, #1024, lsl #12 + +; CHECK: subs w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x71] +; CHECK: subs w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x71] +; CHECK: subs w3, w4, #4194304 ; encoding: [0x83,0x00,0x50,0x71] +; CHECK: subs x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xf1] +; CHECK: subs x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xf1] +; CHECK: subs x3, x4, #4194304 ; encoding: [0x83,0x00,0x50,0xf1] + +;==---------------------------------------------------------------------------== +; Add/Subtract register with (optional) shift +;==---------------------------------------------------------------------------== + + add w12, w13, w14 + add x12, x13, x14 + add w12, w13, w14, lsl #12 + add x12, x13, x14, lsl #12 + add w12, w13, w14, lsr #42 + add x12, x13, x14, lsr #42 + add w12, w13, w14, asr #39 + add x12, x13, x14, asr #39 + +; CHECK: add w12, w13, w14 ; encoding: [0xac,0x01,0x0e,0x0b] +; CHECK: add x12, x13, x14 ; encoding: [0xac,0x01,0x0e,0x8b] +; CHECK: add w12, w13, w14, lsl #12 ; encoding: [0xac,0x31,0x0e,0x0b] +; CHECK: add x12, x13, x14, lsl #12 ; encoding: [0xac,0x31,0x0e,0x8b] +; CHECK: add w12, w13, w14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0x0b] +; CHECK: add x12, x13, x14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0x8b] +; CHECK: add w12, w13, w14, asr #39 ; encoding: [0xac,0x9d,0x8e,0x0b] +; CHECK: add x12, x13, x14, asr #39 ; encoding: [0xac,0x9d,0x8e,0x8b] + + sub w12, w13, w14 + sub x12, x13, x14 + sub w12, w13, w14, lsl #12 + sub x12, x13, x14, lsl #12 + sub w12, w13, w14, lsr #42 + sub x12, x13, x14, lsr #42 + sub w12, w13, w14, asr #39 + sub x12, x13, x14, asr #39 + +; CHECK: sub w12, w13, w14 ; encoding: [0xac,0x01,0x0e,0x4b] +; CHECK: sub x12, x13, x14 ; encoding: [0xac,0x01,0x0e,0xcb] +; CHECK: sub w12, w13, w14, lsl #12 ; encoding: [0xac,0x31,0x0e,0x4b] +; CHECK: sub x12, x13, x14, lsl #12 ; encoding: [0xac,0x31,0x0e,0xcb] +; CHECK: sub w12, w13, w14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0x4b] +; CHECK: sub x12, x13, x14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0xcb] +; CHECK: sub w12, w13, w14, asr #39 ; encoding: [0xac,0x9d,0x8e,0x4b] +; CHECK: sub x12, x13, x14, asr #39 ; encoding: [0xac,0x9d,0x8e,0xcb] + + adds w12, w13, w14 + adds x12, x13, x14 + adds w12, w13, w14, lsl #12 + adds x12, x13, x14, lsl #12 + adds w12, w13, w14, lsr #42 + adds x12, x13, x14, lsr #42 + adds w12, w13, w14, asr #39 + adds x12, x13, x14, asr #39 + +; CHECK: adds w12, w13, w14 ; encoding: [0xac,0x01,0x0e,0x2b] +; CHECK: adds x12, x13, x14 ; encoding: [0xac,0x01,0x0e,0xab] +; CHECK: adds w12, w13, w14, lsl #12 ; encoding: [0xac,0x31,0x0e,0x2b] +; CHECK: adds x12, x13, x14, lsl #12 ; encoding: [0xac,0x31,0x0e,0xab] +; CHECK: adds w12, w13, w14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0x2b] +; CHECK: adds x12, x13, x14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0xab] +; CHECK: adds w12, w13, w14, asr #39 ; encoding: [0xac,0x9d,0x8e,0x2b] +; CHECK: adds x12, x13, x14, asr #39 ; encoding: [0xac,0x9d,0x8e,0xab] + + subs w12, w13, w14 + subs x12, x13, x14 + subs w12, w13, w14, lsl #12 + subs x12, x13, x14, lsl #12 + subs w12, w13, w14, lsr #42 + subs x12, x13, x14, lsr #42 + subs w12, w13, w14, asr #39 + subs x12, x13, x14, asr #39 + +; CHECK: subs w12, w13, w14 ; encoding: [0xac,0x01,0x0e,0x6b] +; CHECK: subs x12, x13, x14 ; encoding: [0xac,0x01,0x0e,0xeb] +; CHECK: subs w12, w13, w14, lsl #12 ; encoding: [0xac,0x31,0x0e,0x6b] +; CHECK: subs x12, x13, x14, lsl #12 ; encoding: [0xac,0x31,0x0e,0xeb] +; CHECK: subs w12, w13, w14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0x6b] +; CHECK: subs x12, x13, x14, lsr #42 ; encoding: [0xac,0xa9,0x4e,0xeb] +; CHECK: subs w12, w13, w14, asr #39 ; encoding: [0xac,0x9d,0x8e,0x6b] +; CHECK: subs x12, x13, x14, asr #39 ; encoding: [0xac,0x9d,0x8e,0xeb] + +; Check use of upper case register names rdar://14354073 + add X2, X2, X2 +; CHECK: add x2, x2, x2 ; encoding: [0x42,0x00,0x02,0x8b] + +;==---------------------------------------------------------------------------== +; Add/Subtract with (optional) extend +;==---------------------------------------------------------------------------== + + add w1, w2, w3, uxtb + add w1, w2, w3, uxth + add w1, w2, w3, uxtw + add w1, w2, w3, uxtx + add w1, w2, w3, sxtb + add w1, w2, w3, sxth + add w1, w2, w3, sxtw + add w1, w2, w3, sxtx + +; CHECK: add w1, w2, w3, uxtb ; encoding: [0x41,0x00,0x23,0x0b] +; CHECK: add w1, w2, w3, uxth ; encoding: [0x41,0x20,0x23,0x0b] +; CHECK: add w1, w2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x0b] +; CHECK: add w1, w2, w3, uxtx ; encoding: [0x41,0x60,0x23,0x0b] +; CHECK: add w1, w2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x0b] +; CHECK: add w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x0b] +; CHECK: add w1, w2, w3, sxtw ; encoding: [0x41,0xc0,0x23,0x0b] +; CHECK: add w1, w2, w3, sxtx ; encoding: [0x41,0xe0,0x23,0x0b] + + add x1, x2, w3, uxtb + add x1, x2, w3, uxth + add x1, x2, w3, uxtw + add x1, x2, w3, sxtb + add x1, x2, w3, sxth + add x1, x2, w3, sxtw + +; CHECK: add x1, x2, w3, uxtb ; encoding: [0x41,0x00,0x23,0x8b] +; CHECK: add x1, x2, w3, uxth ; encoding: [0x41,0x20,0x23,0x8b] +; CHECK: add x1, x2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x8b] +; CHECK: add x1, x2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x8b] +; CHECK: add x1, x2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x8b] +; CHECK: add x1, x2, w3, sxtw ; encoding: [0x41,0xc0,0x23,0x8b] + + add w1, wsp, w3 + add w1, wsp, w3, uxtw #0 + add w2, wsp, w3, lsl #1 + add sp, x2, x3 + add sp, x2, x3, uxtx #0 + +; CHECK: add w1, wsp, w3 ; encoding: [0xe1,0x43,0x23,0x0b] +; CHECK: add w1, wsp, w3 ; encoding: [0xe1,0x43,0x23,0x0b] +; CHECK: add w2, wsp, w3, lsl #1 ; encoding: [0xe2,0x67,0x23,0x0b] +; CHECK: add sp, x2, x3 ; encoding: [0x5f,0x60,0x23,0x8b] +; CHECK: add sp, x2, x3 ; encoding: [0x5f,0x60,0x23,0x8b] + + sub w1, w2, w3, uxtb + sub w1, w2, w3, uxth + sub w1, w2, w3, uxtw + sub w1, w2, w3, uxtx + sub w1, w2, w3, sxtb + sub w1, w2, w3, sxth + sub w1, w2, w3, sxtw + sub w1, w2, w3, sxtx + +; CHECK: sub w1, w2, w3, uxtb ; encoding: [0x41,0x00,0x23,0x4b] +; CHECK: sub w1, w2, w3, uxth ; encoding: [0x41,0x20,0x23,0x4b] +; CHECK: sub w1, w2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x4b] +; CHECK: sub w1, w2, w3, uxtx ; encoding: [0x41,0x60,0x23,0x4b] +; CHECK: sub w1, w2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x4b] +; CHECK: sub w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x4b] +; CHECK: sub w1, w2, w3, sxtw ; encoding: [0x41,0xc0,0x23,0x4b] +; CHECK: sub w1, w2, w3, sxtx ; encoding: [0x41,0xe0,0x23,0x4b] + + sub x1, x2, w3, uxtb + sub x1, x2, w3, uxth + sub x1, x2, w3, uxtw + sub x1, x2, w3, sxtb + sub x1, x2, w3, sxth + sub x1, x2, w3, sxtw + +; CHECK: sub x1, x2, w3, uxtb ; encoding: [0x41,0x00,0x23,0xcb] +; CHECK: sub x1, x2, w3, uxth ; encoding: [0x41,0x20,0x23,0xcb] +; CHECK: sub x1, x2, w3, uxtw ; encoding: [0x41,0x40,0x23,0xcb] +; CHECK: sub x1, x2, w3, sxtb ; encoding: [0x41,0x80,0x23,0xcb] +; CHECK: sub x1, x2, w3, sxth ; encoding: [0x41,0xa0,0x23,0xcb] +; CHECK: sub x1, x2, w3, sxtw ; encoding: [0x41,0xc0,0x23,0xcb] + + sub w1, wsp, w3 + sub w1, wsp, w3, uxtw #0 + sub sp, x2, x3 + sub sp, x2, x3, uxtx #0 + sub sp, x3, x7, lsl #4 + +; CHECK: sub w1, wsp, w3 ; encoding: [0xe1,0x43,0x23,0x4b] +; CHECK: sub w1, wsp, w3 ; encoding: [0xe1,0x43,0x23,0x4b] +; CHECK: sub sp, x2, x3 ; encoding: [0x5f,0x60,0x23,0xcb] +; CHECK: sub sp, x2, x3 ; encoding: [0x5f,0x60,0x23,0xcb] +; CHECK: sp, x3, x7, lsl #4 ; encoding: [0x7f,0x70,0x27,0xcb] + + adds w1, w2, w3, uxtb + adds w1, w2, w3, uxth + adds w1, w2, w3, uxtw + adds w1, w2, w3, uxtx + adds w1, w2, w3, sxtb + adds w1, w2, w3, sxth + adds w1, w2, w3, sxtw + adds w1, w2, w3, sxtx + +; CHECK: adds w1, w2, w3, uxtb ; encoding: [0x41,0x00,0x23,0x2b] +; CHECK: adds w1, w2, w3, uxth ; encoding: [0x41,0x20,0x23,0x2b] +; CHECK: adds w1, w2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x2b] +; CHECK: adds w1, w2, w3, uxtx ; encoding: [0x41,0x60,0x23,0x2b] +; CHECK: adds w1, w2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x2b] +; CHECK: adds w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x2b] +; CHECK: adds w1, w2, w3, sxtw ; encoding: [0x41,0xc0,0x23,0x2b] +; CHECK: adds w1, w2, w3, sxtx ; encoding: [0x41,0xe0,0x23,0x2b] + + adds x1, x2, w3, uxtb + adds x1, x2, w3, uxth + adds x1, x2, w3, uxtw + adds x1, x2, w3, uxtx + adds x1, x2, w3, sxtb + adds x1, x2, w3, sxth + adds x1, x2, w3, sxtw + adds x1, x2, w3, sxtx + +; CHECK: adds x1, x2, w3, uxtb ; encoding: [0x41,0x00,0x23,0xab] +; CHECK: adds x1, x2, w3, uxth ; encoding: [0x41,0x20,0x23,0xab] +; CHECK: adds x1, x2, w3, uxtw ; encoding: [0x41,0x40,0x23,0xab] +; CHECK: adds x1, x2, w3, uxtx ; encoding: [0x41,0x60,0x23,0xab] +; CHECK: adds x1, x2, w3, sxtb ; encoding: [0x41,0x80,0x23,0xab] +; CHECK: adds x1, x2, w3, sxth ; encoding: [0x41,0xa0,0x23,0xab] +; CHECK: adds x1, x2, w3, sxtw ; encoding: [0x41,0xc0,0x23,0xab] +; CHECK: adds x1, x2, w3, sxtx ; encoding: [0x41,0xe0,0x23,0xab] + + adds w1, wsp, w3 + adds w1, wsp, w3, uxtw #0 + adds wzr, wsp, w3, lsl #4 + +; CHECK: adds w1, wsp, w3 ; encoding: [0xe1,0x43,0x23,0x2b] +; CHECK: adds w1, wsp, w3 ; encoding: [0xe1,0x43,0x23,0x2b] +; CHECK: adds wzr, wsp, w3, lsl #4 ; encoding: [0xff,0x73,0x23,0x2b] + + subs w1, w2, w3, uxtb + subs w1, w2, w3, uxth + subs w1, w2, w3, uxtw + subs w1, w2, w3, uxtx + subs w1, w2, w3, sxtb + subs w1, w2, w3, sxth + subs w1, w2, w3, sxtw + subs w1, w2, w3, sxtx + +; CHECK: subs w1, w2, w3, uxtb ; encoding: [0x41,0x00,0x23,0x6b] +; CHECK: subs w1, w2, w3, uxth ; encoding: [0x41,0x20,0x23,0x6b] +; CHECK: subs w1, w2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x6b] +; CHECK: subs w1, w2, w3, uxtx ; encoding: [0x41,0x60,0x23,0x6b] +; CHECK: subs w1, w2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x6b] +; CHECK: subs w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x6b] +; CHECK: subs w1, w2, w3, sxtw ; encoding: [0x41,0xc0,0x23,0x6b] +; CHECK: subs w1, w2, w3, sxtx ; encoding: [0x41,0xe0,0x23,0x6b] + + subs x1, x2, w3, uxtb + subs x1, x2, w3, uxth + subs x1, x2, w3, uxtw + subs x1, x2, w3, uxtx + subs x1, x2, w3, sxtb + subs x1, x2, w3, sxth + subs x1, x2, w3, sxtw + subs x1, x2, w3, sxtx + +; CHECK: subs x1, x2, w3, uxtb ; encoding: [0x41,0x00,0x23,0xeb] +; CHECK: subs x1, x2, w3, uxth ; encoding: [0x41,0x20,0x23,0xeb] +; CHECK: subs x1, x2, w3, uxtw ; encoding: [0x41,0x40,0x23,0xeb] +; CHECK: subs x1, x2, w3, uxtx ; encoding: [0x41,0x60,0x23,0xeb] +; CHECK: subs x1, x2, w3, sxtb ; encoding: [0x41,0x80,0x23,0xeb] +; CHECK: subs x1, x2, w3, sxth ; encoding: [0x41,0xa0,0x23,0xeb] +; CHECK: subs x1, x2, w3, sxtw ; encoding: [0x41,0xc0,0x23,0xeb] +; CHECK: subs x1, x2, w3, sxtx ; encoding: [0x41,0xe0,0x23,0xeb] + + subs w1, wsp, w3 + subs w1, wsp, w3, uxtw #0 + +; CHECK: subs w1, wsp, w3 ; encoding: [0xe1,0x43,0x23,0x6b] +; CHECK: subs w1, wsp, w3 ; encoding: [0xe1,0x43,0x23,0x6b] + + cmp wsp, w9, lsl #0 + subs x3, sp, x9, lsl #2 + cmp wsp, w8, uxtw + subs wzr, wsp, w8, uxtw + cmp sp, w8, uxtw + subs xzr, sp, w8, uxtw + +; CHECK: cmp wsp, w9 ; encoding: [0xff,0x63,0x29,0x6b] +; CHECK: subs x3, sp, x9, lsl #2 ; encoding: [0xe3,0x6b,0x29,0xeb] +; CHECK: cmp wsp, w8 ; encoding: [0xff,0x43,0x28,0x6b] +; CHECK: cmp wsp, w8 ; encoding: [0xff,0x43,0x28,0x6b] +; CHECK: cmp sp, w8 ; encoding: [0xff,0x43,0x28,0xeb] +; CHECK: cmp sp, w8 ; encoding: [0xff,0x43,0x28,0xeb] + + sub wsp, w9, w8, uxtw + sub w1, wsp, w8, uxtw + sub wsp, wsp, w8, uxtw + sub sp, x9, w8, uxtw + sub x1, sp, w8, uxtw + sub sp, sp, w8, uxtw + subs w1, wsp, w8, uxtw + subs x1, sp, w8, uxtw + +; CHECK: sub wsp, w9, w8 ; encoding: [0x3f,0x41,0x28,0x4b] +; CHECK: sub w1, wsp, w8 ; encoding: [0xe1,0x43,0x28,0x4b] +; CHECK: sub wsp, wsp, w8 ; encoding: [0xff,0x43,0x28,0x4b] +; CHECK: sub sp, x9, w8 ; encoding: [0x3f,0x41,0x28,0xcb] +; CHECK: sub x1, sp, w8 ; encoding: [0xe1,0x43,0x28,0xcb] +; CHECK: sub sp, sp, w8 ; encoding: [0xff,0x43,0x28,0xcb] +; CHECK: subs w1, wsp, w8 ; encoding: [0xe1,0x43,0x28,0x6b] +; CHECK: subs x1, sp, w8 ; encoding: [0xe1,0x43,0x28,0xeb] + +;==---------------------------------------------------------------------------== +; Signed/Unsigned divide +;==---------------------------------------------------------------------------== + + sdiv w1, w2, w3 + sdiv x1, x2, x3 + udiv w1, w2, w3 + udiv x1, x2, x3 + +; CHECK: sdiv w1, w2, w3 ; encoding: [0x41,0x0c,0xc3,0x1a] +; CHECK: sdiv x1, x2, x3 ; encoding: [0x41,0x0c,0xc3,0x9a] +; CHECK: udiv w1, w2, w3 ; encoding: [0x41,0x08,0xc3,0x1a] +; CHECK: udiv x1, x2, x3 ; encoding: [0x41,0x08,0xc3,0x9a] + +;==---------------------------------------------------------------------------== +; Variable shifts +;==---------------------------------------------------------------------------== + + asrv w1, w2, w3 + asrv x1, x2, x3 + asr w1, w2, w3 + asr x1, x2, x3 + lslv w1, w2, w3 + lslv x1, x2, x3 + lsl w1, w2, w3 + lsl x1, x2, x3 + lsrv w1, w2, w3 + lsrv x1, x2, x3 + lsr w1, w2, w3 + lsr x1, x2, x3 + rorv w1, w2, w3 + rorv x1, x2, x3 + ror w1, w2, w3 + ror x1, x2, x3 + +; CHECK: encoding: [0x41,0x28,0xc3,0x1a] +; CHECK: encoding: [0x41,0x28,0xc3,0x9a] +; CHECK: encoding: [0x41,0x28,0xc3,0x1a] +; CHECK: encoding: [0x41,0x28,0xc3,0x9a] +; CHECK: encoding: [0x41,0x20,0xc3,0x1a] +; CHECK: encoding: [0x41,0x20,0xc3,0x9a] +; CHECK: encoding: [0x41,0x20,0xc3,0x1a] +; CHECK: encoding: [0x41,0x20,0xc3,0x9a] +; CHECK: encoding: [0x41,0x24,0xc3,0x1a] +; CHECK: encoding: [0x41,0x24,0xc3,0x9a] +; CHECK: encoding: [0x41,0x24,0xc3,0x1a] +; CHECK: encoding: [0x41,0x24,0xc3,0x9a] +; CHECK: encoding: [0x41,0x2c,0xc3,0x1a] +; CHECK: encoding: [0x41,0x2c,0xc3,0x9a] +; CHECK: encoding: [0x41,0x2c,0xc3,0x1a] +; CHECK: encoding: [0x41,0x2c,0xc3,0x9a] + +;==---------------------------------------------------------------------------== +; One operand instructions +;==---------------------------------------------------------------------------== + + cls w1, w2 + cls x1, x2 + clz w1, w2 + clz x1, x2 + rbit w1, w2 + rbit x1, x2 + rev w1, w2 + rev x1, x2 + rev16 w1, w2 + rev16 x1, x2 + rev32 x1, x2 + +; CHECK: encoding: [0x41,0x14,0xc0,0x5a] +; CHECK: encoding: [0x41,0x14,0xc0,0xda] +; CHECK: encoding: [0x41,0x10,0xc0,0x5a] +; CHECK: encoding: [0x41,0x10,0xc0,0xda] +; CHECK: encoding: [0x41,0x00,0xc0,0x5a] +; CHECK: encoding: [0x41,0x00,0xc0,0xda] +; CHECK: encoding: [0x41,0x08,0xc0,0x5a] +; CHECK: encoding: [0x41,0x0c,0xc0,0xda] +; CHECK: encoding: [0x41,0x04,0xc0,0x5a] +; CHECK: encoding: [0x41,0x04,0xc0,0xda] +; CHECK: encoding: [0x41,0x08,0xc0,0xda] + +;==---------------------------------------------------------------------------== +; 6.6.1 Multiply-add instructions +;==---------------------------------------------------------------------------== + + madd w1, w2, w3, w4 + madd x1, x2, x3, x4 + msub w1, w2, w3, w4 + msub x1, x2, x3, x4 + smaddl x1, w2, w3, x4 + smsubl x1, w2, w3, x4 + umaddl x1, w2, w3, x4 + umsubl x1, w2, w3, x4 + +; CHECK: madd w1, w2, w3, w4 ; encoding: [0x41,0x10,0x03,0x1b] +; CHECK: madd x1, x2, x3, x4 ; encoding: [0x41,0x10,0x03,0x9b] +; CHECK: msub w1, w2, w3, w4 ; encoding: [0x41,0x90,0x03,0x1b] +; CHECK: msub x1, x2, x3, x4 ; encoding: [0x41,0x90,0x03,0x9b] +; CHECK: smaddl x1, w2, w3, x4 ; encoding: [0x41,0x10,0x23,0x9b] +; CHECK: smsubl x1, w2, w3, x4 ; encoding: [0x41,0x90,0x23,0x9b] +; CHECK: umaddl x1, w2, w3, x4 ; encoding: [0x41,0x10,0xa3,0x9b] +; CHECK: umsubl x1, w2, w3, x4 ; encoding: [0x41,0x90,0xa3,0x9b] + +;==---------------------------------------------------------------------------== +; Multiply-high instructions +;==---------------------------------------------------------------------------== + + smulh x1, x2, x3 + umulh x1, x2, x3 + +; CHECK: smulh x1, x2, x3 ; encoding: [0x41,0x7c,0x43,0x9b] +; CHECK: umulh x1, x2, x3 ; encoding: [0x41,0x7c,0xc3,0x9b] + +;==---------------------------------------------------------------------------== +; Move immediate instructions +;==---------------------------------------------------------------------------== + + movz w0, #1 + movz x0, #1 + movz w0, #1, lsl #16 + movz x0, #1, lsl #16 + +; CHECK: movz w0, #1 ; encoding: [0x20,0x00,0x80,0x52] +; CHECK: movz x0, #1 ; encoding: [0x20,0x00,0x80,0xd2] +; CHECK: movz w0, #1, lsl #16 ; encoding: [0x20,0x00,0xa0,0x52] +; CHECK: movz x0, #1, lsl #16 ; encoding: [0x20,0x00,0xa0,0xd2] + + movn w0, #2 + movn x0, #2 + movn w0, #2, lsl #16 + movn x0, #2, lsl #16 + +; CHECK: movn w0, #2 ; encoding: [0x40,0x00,0x80,0x12] +; CHECK: movn x0, #2 ; encoding: [0x40,0x00,0x80,0x92] +; CHECK: movn w0, #2, lsl #16 ; encoding: [0x40,0x00,0xa0,0x12] +; CHECK: movn x0, #2, lsl #16 ; encoding: [0x40,0x00,0xa0,0x92] + + movk w0, #1 + movk x0, #1 + movk w0, #1, lsl #16 + movk x0, #1, lsl #16 + +; CHECK: movk w0, #1 ; encoding: [0x20,0x00,0x80,0x72] +; CHECK: movk x0, #1 ; encoding: [0x20,0x00,0x80,0xf2] +; CHECK: movk w0, #1, lsl #16 ; encoding: [0x20,0x00,0xa0,0x72] +; CHECK: movk x0, #1, lsl #16 ; encoding: [0x20,0x00,0xa0,0xf2] + +;==---------------------------------------------------------------------------== +; Conditionally set flags instructions +;==---------------------------------------------------------------------------== + + ccmn w1, #2, #3, eq + ccmn x1, #2, #3, eq + ccmp w1, #2, #3, eq + ccmp x1, #2, #3, eq + +; CHECK: encoding: [0x23,0x08,0x42,0x3a] +; CHECK: encoding: [0x23,0x08,0x42,0xba] +; CHECK: encoding: [0x23,0x08,0x42,0x7a] +; CHECK: encoding: [0x23,0x08,0x42,0xfa] + + ccmn w1, w2, #3, eq + ccmn x1, x2, #3, eq + ccmp w1, w2, #3, eq + ccmp x1, x2, #3, eq + +; CHECK: encoding: [0x23,0x00,0x42,0x3a] +; CHECK: encoding: [0x23,0x00,0x42,0xba] +; CHECK: encoding: [0x23,0x00,0x42,0x7a] +; CHECK: encoding: [0x23,0x00,0x42,0xfa] + +;==---------------------------------------------------------------------------== +; Conditional select instructions +;==---------------------------------------------------------------------------== + + csel w1, w2, w3, eq + csel x1, x2, x3, eq + csinc w1, w2, w3, eq + csinc x1, x2, x3, eq + csinv w1, w2, w3, eq + csinv x1, x2, x3, eq + csneg w1, w2, w3, eq + csneg x1, x2, x3, eq + +; CHECK: encoding: [0x41,0x00,0x83,0x1a] +; CHECK: encoding: [0x41,0x00,0x83,0x9a] +; CHECK: encoding: [0x41,0x04,0x83,0x1a] +; CHECK: encoding: [0x41,0x04,0x83,0x9a] +; CHECK: encoding: [0x41,0x00,0x83,0x5a] +; CHECK: encoding: [0x41,0x00,0x83,0xda] +; CHECK: encoding: [0x41,0x04,0x83,0x5a] +; CHECK: encoding: [0x41,0x04,0x83,0xda] + +; Make sure we handle upper case, too. In particular, condition codes. + CSEL W16, W7, W27, EQ + CSEL W15, W6, W26, NE + CSEL W14, W5, W25, CS + CSEL W13, W4, W24, HS + csel w12, w3, w23, CC + csel w11, w2, w22, LO + csel w10, w1, w21, MI + csel x9, x9, x1, PL + csel x8, x8, x2, VS + CSEL X7, X7, X3, VC + CSEL X6, X7, X4, HI + CSEL X5, X6, X5, LS + CSEL X4, X5, X6, GE + csel x3, x4, x7, LT + csel x2, x3, x8, GT + csel x1, x2, x9, LE + csel x10, x1, x20, AL + +; CHECK: csel w16, w7, w27, eq ; encoding: [0xf0,0x00,0x9b,0x1a] +; CHECK: csel w15, w6, w26, ne ; encoding: [0xcf,0x10,0x9a,0x1a] +; CHECK: csel w14, w5, w25, cs ; encoding: [0xae,0x20,0x99,0x1a] +; CHECK: csel w13, w4, w24, cs ; encoding: [0x8d,0x20,0x98,0x1a] +; CHECK: csel w12, w3, w23, cc ; encoding: [0x6c,0x30,0x97,0x1a] +; CHECK: csel w11, w2, w22, cc ; encoding: [0x4b,0x30,0x96,0x1a] +; CHECK: csel w10, w1, w21, mi ; encoding: [0x2a,0x40,0x95,0x1a] +; CHECK: csel x9, x9, x1, pl ; encoding: [0x29,0x51,0x81,0x9a] +; CHECK: csel x8, x8, x2, vs ; encoding: [0x08,0x61,0x82,0x9a] +; CHECK: csel x7, x7, x3, vc ; encoding: [0xe7,0x70,0x83,0x9a] +; CHECK: csel x6, x7, x4, hi ; encoding: [0xe6,0x80,0x84,0x9a] +; CHECK: csel x5, x6, x5, ls ; encoding: [0xc5,0x90,0x85,0x9a] +; CHECK: csel x4, x5, x6, ge ; encoding: [0xa4,0xa0,0x86,0x9a] +; CHECK: csel x3, x4, x7, lt ; encoding: [0x83,0xb0,0x87,0x9a] +; CHECK: csel x2, x3, x8, gt ; encoding: [0x62,0xc0,0x88,0x9a] +; CHECK: csel x1, x2, x9, le ; encoding: [0x41,0xd0,0x89,0x9a] +; CHECK: csel x10, x1, x20, al ; encoding: [0x2a,0xe0,0x94,0x9a] + + +;==---------------------------------------------------------------------------== +; Scalar saturating arithmetic +;==---------------------------------------------------------------------------== + uqxtn b4, h2 + uqxtn h2, s3 + uqxtn s9, d2 + +; CHECK: uqxtn b4, h2 ; encoding: [0x44,0x48,0x21,0x7e] +; CHECK: uqxtn h2, s3 ; encoding: [0x62,0x48,0x61,0x7e] +; CHECK: uqxtn s9, d2 ; encoding: [0x49,0x48,0xa1,0x7e] diff --git a/test/MC/ARM64/arm64-fixup.s b/test/MC/ARM64/arm64-fixup.s new file mode 100644 index 0000000000..eae6f68390 --- /dev/null +++ b/test/MC/ARM64/arm64-fixup.s @@ -0,0 +1,10 @@ +; RUN: llvm-mc < %s -triple arm64-apple-darwin --show-encoding | FileCheck %s + +foo: + adr x3, Lbar +; CHECK: adr x3, Lbar ; encoding: [0x03'A',A,A,0x10'A'] +; CHECK: fixup A - offset: 0, value: Lbar, kind: fixup_arm64_pcrel_adr_imm21 +Lbar: + adrp x3, _printf@page +; CHECK: adrp x3, _printf@PAGE ; encoding: [0x03'A',A,A,0x90'A'] +; CHECK: fixup A - offset: 0, value: _printf@PAGE, kind: fixup_arm64_pcrel_adrp_imm21 diff --git a/test/MC/ARM64/basic-a64-instructions.s b/test/MC/ARM64/basic-a64-instructions.s new file mode 100644 index 0000000000..99b438d64b --- /dev/null +++ b/test/MC/ARM64/basic-a64-instructions.s @@ -0,0 +1,18 @@ +// RUN: llvm-mc -triple arm64 -show-encoding < %s | FileCheck %s + + crc32b w5, w7, w20 + crc32h w28, wzr, w30 + crc32w w0, w1, w2 + crc32x w7, w9, x20 + crc32cb w9, w5, w4 + crc32ch w13, w17, w25 + crc32cw wzr, w3, w5 + crc32cx w18, w16, xzr +// CHECK: crc32b w5, w7, w20 // encoding: [0xe5,0x40,0xd4,0x1a] +// CHECK: crc32h w28, wzr, w30 // encoding: [0xfc,0x47,0xde,0x1a] +// CHECK: crc32w w0, w1, w2 // encoding: [0x20,0x48,0xc2,0x1a] +// CHECK: crc32x w7, w9, x20 // encoding: [0x27,0x4d,0xd4,0x9a] +// CHECK: crc32cb w9, w5, w4 // encoding: [0xa9,0x50,0xc4,0x1a] +// CHECK: crc32ch w13, w17, w25 // encoding: [0x2d,0x56,0xd9,0x1a] +// CHECK: crc32cw wzr, w3, w5 // encoding: [0x7f,0x58,0xc5,0x1a] +// CHECK: crc32cx w18, w16, xzr // encoding: [0x12,0x5e,0xdf,0x9a] diff --git a/test/MC/ARM64/bitfield-encoding.s b/test/MC/ARM64/bitfield-encoding.s new file mode 100644 index 0000000000..cdbac0848a --- /dev/null +++ b/test/MC/ARM64/bitfield-encoding.s @@ -0,0 +1,30 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s + +foo: +;==---------------------------------------------------------------------------== +; 5.4.4 Bitfield Operations +;==---------------------------------------------------------------------------== + + bfm w1, w2, #1, #15 + bfm x1, x2, #1, #15 + sbfm w1, w2, #1, #15 + sbfm x1, x2, #1, #15 + ubfm w1, w2, #1, #15 + ubfm x1, x2, #1, #15 + +; CHECK: bfm w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x33] +; CHECK: bfm x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0xb3] +; CHECK: sbfm w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x13] +; CHECK: sbfm x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0x93] +; CHECK: ubfm w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x53] +; CHECK: ubfm x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0xd3] + +;==---------------------------------------------------------------------------== +; 5.4.5 Extract (immediate) +;==---------------------------------------------------------------------------== + + extr w1, w2, w3, #15 + extr x2, x3, x4, #1 + +; CHECK: extr w1, w2, w3, #15 ; encoding: [0x41,0x3c,0x83,0x13] +; CHECK: extr x2, x3, x4, #1 ; encoding: [0x62,0x04,0xc4,0x93] diff --git a/test/MC/ARM64/branch-encoding.s b/test/MC/ARM64/branch-encoding.s new file mode 100644 index 0000000000..7857feaa61 --- /dev/null +++ b/test/MC/ARM64/branch-encoding.s @@ -0,0 +1,159 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s + +foo: + +;----------------------------------------------------------------------------- +; Unconditional branch (register) instructions. +;----------------------------------------------------------------------------- + + ret +; CHECK: encoding: [0xc0,0x03,0x5f,0xd6] + ret x1 +; CHECK: encoding: [0x20,0x00,0x5f,0xd6] + drps +; CHECK: encoding: [0xe0,0x03,0xbf,0xd6] + eret +; CHECK: encoding: [0xe0,0x03,0x9f,0xd6] + br x5 +; CHECK: encoding: [0xa0,0x00,0x1f,0xd6] + blr x9 +; CHECK: encoding: [0x20,0x01,0x3f,0xd6] + bl L1 +; CHECK: bl L1 ; encoding: [A,A,A,0b100101AA] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_call26 + +;----------------------------------------------------------------------------- +; Contitional branch instructions. +;----------------------------------------------------------------------------- + + b L1 +; CHECK: b L1 ; encoding: [A,A,A,0b000101AA] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_branch26 + b.eq L1 +; CHECK: b.eq L1 ; encoding: [0bAAA00000,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.ne L1 +; CHECK: b.ne L1 ; encoding: [0bAAA00001,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.cs L1 +; CHECK: b.cs L1 ; encoding: [0bAAA00010,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.cc L1 +; CHECK: b.cc L1 ; encoding: [0bAAA00011,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.mi L1 +; CHECK: b.mi L1 ; encoding: [0bAAA00100,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.pl L1 +; CHECK: b.pl L1 ; encoding: [0bAAA00101,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.vs L1 +; CHECK: b.vs L1 ; encoding: [0bAAA00110,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.vc L1 +; CHECK: b.vc L1 ; encoding: [0bAAA00111,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.hi L1 +; CHECK: b.hi L1 ; encoding: [0bAAA01000,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.ls L1 +; CHECK: b.ls L1 ; encoding: [0bAAA01001,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.ge L1 +; CHECK: b.ge L1 ; encoding: [0bAAA01010,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.lt L1 +; CHECK: b.lt L1 ; encoding: [0bAAA01011,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.gt L1 +; CHECK: b.gt L1 ; encoding: [0bAAA01100,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.le L1 +; CHECK: b.le L1 ; encoding: [0bAAA01101,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 + b.al L1 +; CHECK: b L1 ; encoding: [0bAAA01110,A,A,0x54] +; CHECK: fixup A - offset: 0, value: L1, kind: fixup_arm64_pcrel_imm19 +L1: + b #28 +; CHECK: b #28 + b.lt #28 +; CHECK: b.lt #28 + b.cc #1048572 +; CHECK: b.cc #1048572 ; encoding: [0xe3,0xff,0x7f,0x54] + b #134217724 +; CHECK: b #134217724 ; encoding: [0xff,0xff,0xff,0x15] + b #-134217728 +; CHECK: b #-134217728 ; encoding: [0x00,0x00,0x00,0x16] + +;----------------------------------------------------------------------------- +; Compare-and-branch instructions. +;----------------------------------------------------------------------------- + + cbz w1, foo +; CHECK: encoding: [0bAAA00001,A,A,0x34] + cbz x1, foo +; CHECK: encoding: [0bAAA00001,A,A,0xb4] + cbnz w2, foo +; CHECK: encoding: [0bAAA00010,A,A,0x35] + cbnz x2, foo +; CHECK: encoding: [0bAAA00010,A,A,0xb5] + cbz w1, #28 +; CHECK: cbz w1, #28 + cbz w20, #1048572 +; CHECK: cbz w20, #1048572 ; encoding: [0xf4,0xff,0x7f,0x34] + cbnz x2, #-1048576 +; CHECK: cbnz x2, #-1048576 ; encoding: [0x02,0x00,0x80,0xb5] + + +;----------------------------------------------------------------------------- +; Bit-test-and-branch instructions. +;----------------------------------------------------------------------------- + + tbz x1, #3, foo +; CHECK: encoding: [0bAAA00001,A,0b00011AAA,0x36] + tbnz x1, #63, foo +; CHECK: encoding: [0bAAA00001,A,0b11111AAA,0xb7] + + tbz w1, #3, foo +; CHECK: encoding: [0bAAA00001,A,0b00011AAA,0x36] + tbnz w1, #31, foo +; CHECK: encoding: [0bAAA00001,A,0b11111AAA,0x37] + + tbz w1, #3, #28 +; CHECK: tbz w1, #3, #28 + tbz w3, #5, #32764 +; CHECK: tbz w3, #5, #32764 ; encoding: [0xe3,0xff,0x2b,0x36] + tbnz x3, #8, #-32768 +; CHECK: tbnz w3, #8, #-32768 ; encoding: [0x03,0x00,0x44,0x37] + +;----------------------------------------------------------------------------- +; Exception generation instructions. +;----------------------------------------------------------------------------- + + brk #1 +; CHECK: encoding: [0x20,0x00,0x20,0xd4] + dcps1 #2 +; CHECK: encoding: [0x41,0x00,0xa0,0xd4] + dcps2 #3 +; CHECK: encoding: [0x62,0x00,0xa0,0xd4] + dcps3 #4 +; CHECK: encoding: [0x83,0x00,0xa0,0xd4] + hlt #5 +; CHECK: encoding: [0xa0,0x00,0x40,0xd4] + hvc #6 +; CHECK: encoding: [0xc2,0x00,0x00,0xd4] + smc #7 +; CHECK: encoding: [0xe3,0x00,0x00,0xd4] + svc #8 +; CHECK: encoding: [0x01,0x01,0x00,0xd4] + +; The immediate defaults to zero for DCPSn + dcps1 + dcps2 + dcps3 + +; CHECK: dcps1 ; encoding: [0x01,0x00,0xa0,0xd4] +; CHECK: dcps2 ; encoding: [0x02,0x00,0xa0,0xd4] +; CHECK: dcps3 ; encoding: [0x03,0x00,0xa0,0xd4] + diff --git a/test/MC/ARM64/crypto.s b/test/MC/ARM64/crypto.s new file mode 100644 index 0000000000..d7c4ec3df4 --- /dev/null +++ b/test/MC/ARM64/crypto.s @@ -0,0 +1,66 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding -output-asm-variant=1 < %s | FileCheck %s + +foo: + aese.16b v0, v1 + aesd.16b v0, v1 + aesmc.16b v0, v1 + aesimc.16b v0, v1 + + sha1c.4s q0, s1, v2 + sha1p.4s q0, s1, v2 + sha1m.4s q0, s1, v2 + sha1su0.4s v0, v1, v2 + sha256h.4s q0, q1, v2 + sha256h2.4s q0, q1, v2 + sha256su1.4s v0, v1, v2 + sha1h s0, s1 + sha1su1.4s v0, v1 + sha256su0.4s v0, v1 + +; CHECK: aese.16b v0, v1 ; encoding: [0x20,0x48,0x28,0x4e] +; CHECK: aesd.16b v0, v1 ; encoding: [0x20,0x58,0x28,0x4e] +; CHECK: aesmc.16b v0, v1 ; encoding: [0x20,0x68,0x28,0x4e] +; CHECK: aesimc.16b v0, v1 ; encoding: [0x20,0x78,0x28,0x4e] + +; CHECK: sha1c.4s q0, s1, v2 ; encoding: [0x20,0x00,0x02,0x5e] +; CHECK: sha1p.4s q0, s1, v2 ; encoding: [0x20,0x10,0x02,0x5e] +; CHECK: sha1m.4s q0, s1, v2 ; encoding: [0x20,0x20,0x02,0x5e] +; CHECK: sha1su0.4s v0, v1, v2 ; encoding: [0x20,0x30,0x02,0x5e] +; CHECK: sha256h.4s q0, q1, v2 ; encoding: [0x20,0x40,0x02,0x5e] +; CHECK: sha256h2.4s q0, q1, v2 ; encoding: [0x20,0x50,0x02,0x5e] +; CHECK: sha256su1.4s v0, v1, v2 ; encoding: [0x20,0x60,0x02,0x5e] +; CHECK: sha1h s0, s1 ; encoding: [0x20,0x08,0x28,0x5e] +; CHECK: sha1su1.4s v0, v1 ; encoding: [0x20,0x18,0x28,0x5e] +; CHECK: sha256su0.4s v0, v1 ; encoding: [0x20,0x28,0x28,0x5e] + + aese v2.16b, v3.16b + aesd v5.16b, v7.16b + aesmc v11.16b, v13.16b + aesimc v17.16b, v19.16b + +; CHECK: aese.16b v2, v3 ; encoding: [0x62,0x48,0x28,0x4e] +; CHECK: aesd.16b v5, v7 ; encoding: [0xe5,0x58,0x28,0x4e] +; CHECK: aesmc.16b v11, v13 ; encoding: [0xab,0x69,0x28,0x4e] +; CHECK: aesimc.16b v17, v19 ; encoding: [0x71,0x7a,0x28,0x4e] + + sha1c q23, s29, v3.4s + sha1p q14, s15, v9.4s + sha1m q2, s6, v5.4s + sha1su0 v3.4s, v5.4s, v9.4s + sha256h q2, q7, v18.4s + sha256h2 q28, q18, v28.4s + sha256su1 v4.4s, v5.4s, v9.4s + sha1h s30, s0 + sha1su1 v10.4s, v21.4s + sha256su0 v2.4s, v31.4s + +; CHECK: sha1c.4s q23, s29, v3 ; encoding: [0xb7,0x03,0x03,0x5e] +; CHECK: sha1p.4s q14, s15, v9 ; encoding: [0xee,0x11,0x09,0x5e] +; CHECK: sha1m.4s q2, s6, v5 ; encoding: [0xc2,0x20,0x05,0x5e] +; CHECK: sha1su0.4s v3, v5, v9 ; encoding: [0xa3,0x30,0x09,0x5e] +; CHECK: sha256h.4s q2, q7, v18 ; encoding: [0xe2,0x40,0x12,0x5e] +; CHECK: sha256h2.4s q28, q18, v28 ; encoding: [0x5c,0x52,0x1c,0x5e] +; CHECK: sha256su1.4s v4, v5, v9 ; encoding: [0xa4,0x60,0x09,0x5e] +; CHECK: sha1h s30, s0 ; encoding: [0x1e,0x08,0x28,0x5e] +; CHECK: sha1su1.4s v10, v21 ; encoding: [0xaa,0x1a,0x28,0x5e] +; CHECK: sha256su0.4s v2, v31 ; encoding: [0xe2,0x2b,0x28,0x5e] diff --git a/test/MC/ARM64/diags.s b/test/MC/ARM64/diags.s new file mode 100644 index 0000000000..d857fe124c --- /dev/null +++ b/test/MC/ARM64/diags.s @@ -0,0 +1,242 @@ +; RUN: not llvm-mc -triple arm64-apple-darwin -show-encoding < %s 2> %t | FileCheck %s +; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s + +foo: + +; The first should encode as an expression. The second should error expecting +; a register. + ldr x3, (foo + 4) + ldr x3, [foo + 4] +; CHECK: ldr x3, foo+4 ; encoding: [0bAAA00011,A,A,0x58] +; CHECK: ; fixup A - offset: 0, value: foo+4, kind: fixup_arm64_pcrel_imm19 +; CHECK-ERRORS: error: register expected + +; The last argument should be flagged as an error. rdar://9576009 + ld4.8b {v0, v1, v2, v3}, [x0], #33 +; CHECK-ERRORS: error: invalid operand for instruction +; CHECK-ERRORS: ld4.8b {v0, v1, v2, v3}, [x0], #33 + + + ldr x0, [x0, #804] + ldr w0, [x0, #802] + ldr x0, [x0, #804]! + ldr w0, [w0, #301]! + ldr x0, [x0], #804 + ldr w0, [w0], #301 + + ldp w3, w4, [x5, #11]! + ldp x3, x4, [x5, #12]! + ldp q3, q4, [x5, #12]! + ldp w3, w4, [x5], #11 + ldp x3, x4, [x5], #12 + ldp q3, q4, [x5], #12 + + ldur x0, [x1, #-257] + +; CHECK-ERRORS: error: index must be a multiple of 8 in range [0,32760]. +; CHECK-ERRORS: ldr x0, [x0, #804] +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be a multiple of 4 in range [0,16380]. +; CHECK-ERRORS: ldr w0, [x0, #802] +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be an integer in range [-256,255]. +; CHECK-ERRORS: ldr x0, [x0, #804]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be an integer in range [-256,255]. +; CHECK-ERRORS: ldr w0, [w0, #301]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be an integer in range [-256,255]. +; CHECK-ERRORS: ldr x0, [x0], #804 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be an integer in range [-256,255]. +; CHECK-ERRORS: ldr w0, [w0], #301 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256,252]. +; CHECK-ERRORS: ldp w3, w4, [x5, #11]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504]. +; CHECK-ERRORS: ldp x3, x4, [x5, #12]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be a multiple of 16 in range [-1024,1008]. +; CHECK-ERRORS: ldp q3, q4, [x5, #12]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256,252]. +; CHECK-ERRORS: ldp w3, w4, [x5], #11 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504]. +; CHECK-ERRORS: ldp x3, x4, [x5], #12 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504]. +; CHECK-ERRORS: ldp q3, q4, [x5], #12 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: index must be an integer in range [-256,255]. +; CHECK-ERRORS: ldur x0, [x1, #-257] +; CHECK-ERRORS: ^ + + + +; Shift immediates range checking. + sqrshrn b4, h9, #10 + rshrn v9.8b, v11.8h, #17 + sqrshrn v7.4h, v8.4s, #39 + uqshrn2 v4.4s, v5.2d, #67 + +; CHECK-ERRORS: error: immediate must be an integer in range [1,8]. +; CHECK-ERRORS: sqrshrn b4, h9, #10 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: immediate must be an integer in range [1,8]. +; CHECK-ERRORS: rshrn v9.8b, v11.8h, #17 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: immediate must be an integer in range [1,16]. +; CHECK-ERRORS: sqrshrn v7.4h, v8.4s, #39 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: immediate must be an integer in range [1,32]. +; CHECK-ERRORS: uqshrn2 v4.4s, v5.2d, #67 +; CHECK-ERRORS: ^ + + + st1.s4 {v14, v15}, [x2], #32 +; CHECK-ERRORS: error: invalid type suffix for instruction +; CHECK-ERRORS: st1.s4 {v14, v15}, [x2], #32 +; CHECK-ERRORS: ^ + + + +; Load pair instructions where Rt==Rt2 and writeback load/store instructions +; where Rt==Rn or Rt2==Rn are unpredicatable. + ldp x1, x2, [x2], #16 + ldp x2, x2, [x2], #16 + ldp w1, w2, [x2], #16 + ldp w2, w2, [x2], #16 + ldp x1, x1, [x2] + + ldr x2, [x2], #8 + ldr x2, [x2, #8]! + ldr w2, [x2], #8 + ldr w2, [x2, #8]! + + str x2, [x2], #8 + str x2, [x2, #8]! + str w2, [x2], #8 + str w2, [x2, #8]! + +; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination +; CHECK-ERRORS: ldp x1, x2, [x2], #16 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination +; CHECK-ERRORS: ldp x2, x2, [x2], #16 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination +; CHECK-ERRORS: ldp w1, w2, [x2], #16 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination +; CHECK-ERRORS: ldp w2, w2, [x2], #16 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt +; CHECK-ERRORS: ldp x1, x1, [x2] +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source +; CHECK-ERRORS: ldr x2, [x2], #8 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source +; CHECK-ERRORS: ldr x2, [x2, #8]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source +; CHECK-ERRORS: ldr w2, [x2], #8 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source +; CHECK-ERRORS: ldr w2, [x2, #8]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source +; CHECK-ERRORS: str x2, [x2], #8 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source +; CHECK-ERRORS: str x2, [x2, #8]! +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source +; CHECK-ERRORS: str w2, [x2], #8 +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source +; CHECK-ERRORS: str w2, [x2, #8]! +; CHECK-ERRORS: ^ + +; The validity checking for shifted-immediate operands. rdar://13174476 +; Where the immediate is out of range. + add w1, w2, w3, lsr #75 + +; CHECK-ERRORS: error: immediate value too large for shifter operand +; CHECK-ERRORS: add w1, w2, w3, lsr #75 +; CHECK-ERRORS: ^ + +; logical instructions on 32-bit regs with shift > 31 is not legal +orr w0, w0, w0, lsl #32 +; CHECK-ERRORS: error: shift value out of range +; CHECK-ERRORS: orr w0, w0, w0, lsl #32 +; CHECK-ERRORS: ^ +eor w0, w0, w0, lsl #32 +; CHECK-ERRORS: error: shift value out of range +; CHECK-ERRORS: eor w0, w0, w0, lsl #32 +; CHECK-ERRORS: ^ +and w0, w0, w0, lsl #32 +; CHECK-ERRORS: error: shift value out of range +; CHECK-ERRORS: and w0, w0, w0, lsl #32 +; CHECK-ERRORS: ^ +ands w0, w0, w0, lsl #32 +; CHECK-ERRORS: error: shift value out of range +; CHECK-ERRORS: ands w0, w0, w0, lsl #32 +; CHECK-ERRORS: ^ + +; Relocated expressions should not be accepted for 32-bit adds or sub (imm) +add w3, w5, sym@PAGEOFF +; CHECK-ERRORS: error: invalid immediate expression +; CHECK-ERRORS: add w3, w5, sym@PAGEOFF +; CHECK-ERRORS: ^ + +adds w3, w5, sym@PAGEOFF +adds x9, x12, sym@PAGEOFF +; CHECK-ERRORS: error: invalid immediate expression +; CHECK-ERRORS: adds w3, w5, sym@PAGEOFF +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: invalid immediate expression +; CHECK-ERRORS: adds x9, x12, sym@PAGEOFF +; CHECK-ERRORS: ^ + +sub x3, x5, sym@PAGEOFF +sub w20, w30, sym@PAGEOFF +; CHECK-ERRORS: error: invalid immediate expression +; CHECK-ERRORS: sub x3, x5, sym@PAGEOFF +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: invalid immediate expression +; CHECK-ERRORS: sub w20, w30, sym@PAGEOFF +; CHECK-ERRORS: ^ + +subs w9, w10, sym@PAGEOFF +subs x20, x30, sym@PAGEOFF +; CHECK-ERRORS: error: invalid immediate expression +; CHECK-ERRORS: subs w9, w10, sym@PAGEOFF +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: invalid immediate expression +; CHECK-ERRORS: subs x20, x30, sym@PAGEOFF +; CHECK-ERRORS: ^ + +tbl v0.8b, { v1 }, v0.8b +tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b +tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b +tbx v2.8b, { v0 }, v6.8b +; CHECK-ERRORS: error: invalid operand for instruction +; CHECK-ERRORS: tbl v0.8b, { v1 }, v0.8b +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: invalid operand for instruction +; CHECK-ERRORS: tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: invalid operand for instruction +; CHECK-ERRORS: tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: invalid operand for instruction +; CHECK-ERRORS: tbx v2.8b, { v0 }, v6.8b +; CHECK-ERRORS: ^ + +b.c #0x4 +; CHECK-ERRORS: error: invalid condition code +; CHECK-ERRORS: b.c #0x4 +; CHECK-ERRORS: ^ diff --git a/test/MC/ARM64/directive_loh.s b/test/MC/ARM64/directive_loh.s new file mode 100644 index 0000000000..76d2d7f218 --- /dev/null +++ b/test/MC/ARM64/directive_loh.s @@ -0,0 +1,93 @@ +# RUN: not llvm-mc -triple arm64-apple-darwin < %s 2> %t | FileCheck %s +# RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s + +.globl _fct1 +_fct1: + L1: + L2: + L3: + L4: + ret lr; + +# Known LOHs with: +# - Regular syntax. +# - Alternative syntax. + +# CHECK: .loh AdrpAdrp L1, L2 +# CHECK: .loh AdrpAdrp L1, L2 +.loh AdrpAdrp L1, L2 +.loh 1 L1, L2 + +# CHECK: .loh AdrpLdr L1, L2 +# CHECK: .loh AdrpLdr L1, L2 +.loh AdrpLdr L1, L2 +.loh 2 L1, L2 + +# CHECK: .loh AdrpAddLdr L1, L2, L3 +# CHECK: .loh AdrpAddLdr L1, L2, L3 +.loh AdrpAddLdr L1, L2, L3 +.loh 3 L1, L2, L3 + +# CHECK: .loh AdrpLdrGotLdr L1, L2, L3 +# CHECK: .loh AdrpLdrGotLdr L1, L2, L3 +.loh AdrpLdrGotLdr L1, L2, L3 +.loh 4 L1, L2, L3 + +# CHECK: .loh AdrpAddStr L1, L2, L3 +# CHECK: .loh AdrpAddStr L1, L2, L3 +.loh AdrpAddStr L1, L2, L3 +.loh 5 L1, L2, L3 + +# CHECK: .loh AdrpLdrGotStr L1, L2, L3 +# CHECK: .loh AdrpLdrGotStr L1, L2, L3 +.loh AdrpLdrGotStr L1, L2, L3 +.loh 6 L1, L2, L3 + +# CHECK: .loh AdrpAdd L1, L2 +# CHECK: .loh AdrpAdd L1, L2 +.loh AdrpAdd L1, L2 +.loh 7 L1, L2 + +# CHECK: .loh AdrpLdrGot L1, L2 +# CHECK: .loh AdrpLdrGot L1, L2 +.loh AdrpLdrGot L1, L2 +.loh 8 L1, L2 + +# End Known LOHs. + +### Errors Check #### + +# Unknown textual identifier. +# CHECK-ERRORS: error: invalid identifier in directive +# CHECK-ERRORS-NEXT: .loh Unknown +# CHECK-ERRORS-NEXT: ^ +.loh Unknown +# Unknown numeric identifier. +# CHECK-ERRORS: error: invalid numeric identifier in directive +# CHECK-ERRORS-NEXT: .loh 153, L1 +# CHECK-ERRORS-NEXT: ^ +.loh 153, L1 + +# Too much arguments. +# CHECK-ERRORS: error: unexpected token in '.loh' directive +# CHECK-ERRORS-NEXT: .loh AdrpAdrp L1, L2, L3 +# CHECK-ERRORS-NEXT: ^ +.loh AdrpAdrp L1, L2, L3 + +# Too much arguments with alternative syntax. +# CHECK-ERRORS: error: unexpected token in '.loh' directive +# CHECK-ERRORS-NEXT: .loh 1 L1, L2, L3 +# CHECK-ERRORS-NEXT: ^ +.loh 1 L1, L2, L3 + +# Too few argumets. +# CHECK-ERRORS: error: unexpected token in '.loh' directive +# CHECK-ERRORS-NEXT: .loh AdrpAdrp L1 +# CHECK-ERRORS-NEXT: ^ +.loh AdrpAdrp L1 + +# Too few argumets with alternative syntax. +# CHECK-ERRORS: error: unexpected token in '.loh' directive +# CHECK-ERRORS-NEXT: .loh 1 L1 +# CHECK-ERRORS-NEXT: ^ +.loh 1 L1 diff --git a/test/MC/ARM64/elf-relocs.s b/test/MC/ARM64/elf-relocs.s new file mode 100644 index 0000000000..31446ff969 --- /dev/null +++ b/test/MC/ARM64/elf-relocs.s @@ -0,0 +1,249 @@ +// RUN: llvm-mc -triple=arm64-linux-gnu -o - < %s | FileCheck %s +// RUN: llvm-mc -triple=arm64-linux-gnu -filetype=obj < %s | llvm-objdump -triple=arm64-linux-gnu - -r | FileCheck %s --check-prefix=CHECK-OBJ + + add x0, x2, #:lo12:sym +// CHECK: add x0, x2, :lo12:sym +// CHECK-OBJ: 0 R_AARCH64_ADD_ABS_LO12_NC sym + + add x5, x7, #:dtprel_lo12:sym +// CHECK: add x5, x7, :dtprel_lo12:sym +// CHECK-OBJ: 4 R_AARCH64_TLSLD_ADD_DTPREL_LO12 sym + + add x9, x12, #:dtprel_lo12_nc:sym +// CHECK: add x9, x12, :dtprel_lo12_nc:sym +// CHECK-OBJ: 8 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC sym + + add x20, x30, #:tprel_lo12:sym +// CHECK: add x20, lr, :tprel_lo12:sym +// CHECK-OBJ: c R_AARCH64_TLSLE_ADD_TPREL_LO12 sym + + add x9, x12, #:tprel_lo12_nc:sym +// CHECK: add x9, x12, :tprel_lo12_nc:sym +// CHECK-OBJ: 10 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC sym + + add x5, x0, #:tlsdesc_lo12:sym +// CHECK: add x5, x0, :tlsdesc_lo12:sym +// CHECK-OBJ: 14 R_AARCH64_TLSDESC_ADD_LO12_NC sym + + add x0, x2, #:lo12:sym+8 +// CHECK: add x0, x2, :lo12:sym +// CHECK-OBJ: 18 R_AARCH64_ADD_ABS_LO12_NC sym+8 + + add x5, x7, #:dtprel_lo12:sym+1 +// CHECK: add x5, x7, :dtprel_lo12:sym+1 +// CHECK-OBJ: 1c R_AARCH64_TLSLD_ADD_DTPREL_LO12 sym+1 + + add x9, x12, #:dtprel_lo12_nc:sym+2 +// CHECK: add x9, x12, :dtprel_lo12_nc:sym+2 +// CHECK-OBJ:20 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC sym+2 + + add x20, x30, #:tprel_lo12:sym+12 +// CHECK: add x20, lr, :tprel_lo12:sym+12 +// CHECK-OBJ: 24 R_AARCH64_TLSLE_ADD_TPREL_LO12 sym+12 + + add x9, x12, #:tprel_lo12_nc:sym+54 +// CHECK: add x9, x12, :tprel_lo12_nc:sym+54 +// CHECK-OBJ: 28 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC sym+54 + + add x5, x0, #:tlsdesc_lo12:sym+70 +// CHECK: add x5, x0, :tlsdesc_lo12:sym+70 +// CHECK-OBJ: 2c R_AARCH64_TLSDESC_ADD_LO12_NC sym+70 + + .hword sym + 4 - . +// CHECK-OBJ: 30 R_AARCH64_PREL16 sym+4 + .word sym - . + 8 +// CHECK-OBJ: 32 R_AARCH64_PREL32 sym+8 + .xword sym-. +// CHECK-OBJ: 36 R_AARCH64_PREL64 sym{{$}} + + .hword sym +// CHECK-OBJ: 3e R_AARCH64_ABS16 sym + .word sym+1 +// CHECK-OBJ: 40 R_AARCH64_ABS32 sym+1 + .xword sym+16 +// CHECK-OBJ: 44 R_AARCH64_ABS64 sym+16 + + adrp x0, sym +// CHECK: adrp x0, sym +// CHECK-OBJ: 4c R_AARCH64_ADR_PREL_PG_HI21 sym + + adrp x15, :got:sym +// CHECK: adrp x15, :got:sym +// CHECK-OBJ: 50 R_AARCH64_ADR_GOT_PAGE sym + + adrp x29, :gottprel:sym +// CHECK: adrp fp, :gottprel:sym +// CHECK-OBJ: 54 R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 sym + + adrp x2, :tlsdesc:sym +// CHECK: adrp x2, :tlsdesc:sym +// CHECK-OBJ: 58 R_AARCH64_TLSDESC_ADR_PAGE sym + + // LLVM is not competent enough to do this relocation because the + // page boundary could occur anywhere after linking. A relocation + // is needed. + adrp x3, trickQuestion + .global trickQuestion +trickQuestion: +// CHECK: adrp x3, trickQuestion +// CHECK-OBJ: 5c R_AARCH64_ADR_PREL_PG_HI21 trickQuestion + + ldrb w2, [x3, #:lo12:sym] + ldrsb w5, [x7, #:lo12:sym] + ldrsb x11, [x13, #:lo12:sym] + ldr b17, [x19, #:lo12:sym] +// CHECK: ldrb w2, [x3, :lo12:sym] +// CHECK: ldrsb w5, [x7, :lo12:sym] +// CHECK: ldrsb x11, [x13, :lo12:sym] +// CHECK: ldr b17, [x19, :lo12:sym] +// CHECK-OBJ: R_AARCH64_LDST8_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST8_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST8_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST8_ABS_LO12_NC sym + + ldrb w23, [x29, #:dtprel_lo12_nc:sym] + ldrsb w23, [x19, #:dtprel_lo12:sym] + ldrsb x17, [x13, #:dtprel_lo12_nc:sym] + ldr b11, [x7, #:dtprel_lo12:sym] +// CHECK: ldrb w23, [fp, :dtprel_lo12_nc:sym] +// CHECK: ldrsb w23, [x19, :dtprel_lo12:sym] +// CHECK: ldrsb x17, [x13, :dtprel_lo12_nc:sym] +// CHECK: ldr b11, [x7, :dtprel_lo12:sym] +// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 sym + + ldrb w1, [x2, #:tprel_lo12:sym] + ldrsb w3, [x4, #:tprel_lo12_nc:sym] + ldrsb x5, [x6, #:tprel_lo12:sym] + ldr b7, [x8, #:tprel_lo12_nc:sym] +// CHECK: ldrb w1, [x2, :tprel_lo12:sym] +// CHECK: ldrsb w3, [x4, :tprel_lo12_nc:sym] +// CHECK: ldrsb x5, [x6, :tprel_lo12:sym] +// CHECK: ldr b7, [x8, :tprel_lo12_nc:sym] +// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC sym + + ldrh w2, [x3, #:lo12:sym] + ldrsh w5, [x7, #:lo12:sym] + ldrsh x11, [x13, #:lo12:sym] + ldr h17, [x19, #:lo12:sym] +// CHECK: ldrh w2, [x3, :lo12:sym] +// CHECK: ldrsh w5, [x7, :lo12:sym] +// CHECK: ldrsh x11, [x13, :lo12:sym] +// CHECK: ldr h17, [x19, :lo12:sym] +// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST16_ABS_LO12_NC sym + + ldrh w23, [x29, #:dtprel_lo12_nc:sym] + ldrsh w23, [x19, #:dtprel_lo12:sym] + ldrsh x17, [x13, #:dtprel_lo12_nc:sym] + ldr h11, [x7, #:dtprel_lo12:sym] +// CHECK: ldrh w23, [fp, :dtprel_lo12_nc:sym] +// CHECK: ldrsh w23, [x19, :dtprel_lo12:sym] +// CHECK: ldrsh x17, [x13, :dtprel_lo12_nc:sym] +// CHECK: ldr h11, [x7, :dtprel_lo12:sym] +// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST16_DTPREL_LO12 sym + + ldrh w1, [x2, #:tprel_lo12:sym] + ldrsh w3, [x4, #:tprel_lo12_nc:sym] + ldrsh x5, [x6, #:tprel_lo12:sym] + ldr h7, [x8, #:tprel_lo12_nc:sym] +// CHECK: ldrh w1, [x2, :tprel_lo12:sym] +// CHECK: ldrsh w3, [x4, :tprel_lo12_nc:sym] +// CHECK: ldrsh x5, [x6, :tprel_lo12:sym] +// CHECK: ldr h7, [x8, :tprel_lo12_nc:sym] +// CHECK-OBJ: R_AARCH64_TLSLE_LDST16_TPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST16_TPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC sym + + ldr w1, [x2, #:lo12:sym] + ldrsw x3, [x4, #:lo12:sym] + ldr s4, [x5, #:lo12:sym] +// CHECK: ldr w1, [x2, :lo12:sym] +// CHECK: ldrsw x3, [x4, :lo12:sym] +// CHECK: ldr s4, [x5, :lo12:sym] +// CHECK-OBJ: R_AARCH64_LDST32_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST32_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST32_ABS_LO12_NC sym + + ldr w1, [x2, #:dtprel_lo12:sym] + ldrsw x3, [x4, #:dtprel_lo12_nc:sym] + ldr s4, [x5, #:dtprel_lo12_nc:sym] +// CHECK: ldr w1, [x2, :dtprel_lo12:sym] +// CHECK: ldrsw x3, [x4, :dtprel_lo12_nc:sym] +// CHECK: ldr s4, [x5, :dtprel_lo12_nc:sym] +// CHECK-OBJ: R_AARCH64_TLSLD_LDST32_DTPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC sym + + + ldr w1, [x2, #:tprel_lo12:sym] + ldrsw x3, [x4, #:tprel_lo12_nc:sym] + ldr s4, [x5, #:tprel_lo12_nc:sym] +// CHECK: ldr w1, [x2, :tprel_lo12:sym] +// CHECK: ldrsw x3, [x4, :tprel_lo12_nc:sym] +// CHECK: ldr s4, [x5, :tprel_lo12_nc:sym] +// CHECK-OBJ: R_AARCH64_TLSLE_LDST32_TPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC sym + + ldr x28, [x27, #:lo12:sym] + ldr d26, [x25, #:lo12:sym] +// CHECK: ldr x28, [x27, :lo12:sym] +// CHECK: ldr d26, [x25, :lo12:sym] +// CHECK-OBJ: R_AARCH64_LDST64_ABS_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LDST64_ABS_LO12_NC sym + + ldr x24, [x23, #:got_lo12:sym] + ldr d22, [x21, #:got_lo12:sym] +// CHECK: ldr x24, [x23, :got_lo12:sym] +// CHECK: ldr d22, [x21, :got_lo12:sym] +// CHECK-OBJ: R_AARCH64_LD64_GOT_LO12_NC sym +// CHECK-OBJ: R_AARCH64_LD64_GOT_LO12_NC sym + + ldr x24, [x23, #:dtprel_lo12_nc:sym] + ldr d22, [x21, #:dtprel_lo12:sym] +// CHECK: ldr x24, [x23, :dtprel_lo12_nc:sym] +// CHECK: ldr d22, [x21, :dtprel_lo12:sym] +// CHECK-OBJ: R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSLD_LDST64_DTPREL_LO12 sym + + ldr x24, [x23, #:tprel_lo12:sym] + ldr d22, [x21, #:tprel_lo12_nc:sym] +// CHECK: ldr x24, [x23, :tprel_lo12:sym] +// CHECK: ldr d22, [x21, :tprel_lo12_nc:sym] +// CHECK-OBJ: R_AARCH64_TLSLE_LDST64_TPREL_LO12 sym +// CHECK-OBJ: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC sym + + ldr x24, [x23, #:gottprel_lo12:sym] + ldr d22, [x21, #:gottprel_lo12:sym] +// CHECK: ldr x24, [x23, :gottprel_lo12:sym] +// CHECK: ldr d22, [x21, :gottprel_lo12:sym] +// CHECK-OBJ: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC sym + + ldr x24, [x23, #:tlsdesc_lo12:sym] + ldr d22, [x21, #:tlsdesc_lo12:sym] +// CHECK: ldr x24, [x23, :tlsdesc_lo12:sym] +// CHECK: ldr d22, [x21, :tlsdesc_lo12:sym] +// CHECK-OBJ: R_AARCH64_TLSDESC_LD64_LO12_NC sym +// CHECK-OBJ: R_AARCH64_TLSDESC_LD64_LO12_NC sym + + ldr q20, [x19, #:lo12:sym] +// CHECK: ldr q20, [x19, :lo12:sym] +// CHECK-OBJ: R_AARCH64_LDST128_ABS_LO12_NC sym + +// Since relocated instructions print without a '#', that syntax should +// certainly be accepted when assembling. + add x3, x5, :lo12:imm +// CHECK: add x3, x5, :lo12:imm diff --git a/test/MC/ARM64/fp-encoding.s b/test/MC/ARM64/fp-encoding.s new file mode 100644 index 0000000000..25474c1153 --- /dev/null +++ b/test/MC/ARM64/fp-encoding.s @@ -0,0 +1,507 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s + +foo: +;----------------------------------------------------------------------------- +; Floating-point arithmetic +;----------------------------------------------------------------------------- + + fabs s1, s2 + fabs d1, d2 + +; CHECK: fabs s1, s2 ; encoding: [0x41,0xc0,0x20,0x1e] +; CHECK: fabs d1, d2 ; encoding: [0x41,0xc0,0x60,0x1e] + + fadd s1, s2, s3 + fadd d1, d2, d3 + +; CHECK: fadd s1, s2, s3 ; encoding: [0x41,0x28,0x23,0x1e] +; CHECK: fadd d1, d2, d3 ; encoding: [0x41,0x28,0x63,0x1e] + + fdiv s1, s2, s3 + fdiv d1, d2, d3 + +; CHECK: fdiv s1, s2, s3 ; encoding: [0x41,0x18,0x23,0x1e] +; CHECK: fdiv d1, d2, d3 ; encoding: [0x41,0x18,0x63,0x1e] + + fmadd s1, s2, s3, s4 + fmadd d1, d2, d3, d4 + +; CHECK: fmadd s1, s2, s3, s4 ; encoding: [0x41,0x10,0x03,0x1f] +; CHECK: fmadd d1, d2, d3, d4 ; encoding: [0x41,0x10,0x43,0x1f] + + fmax s1, s2, s3 + fmax d1, d2, d3 + fmaxnm s1, s2, s3 + fmaxnm d1, d2, d3 + +; CHECK: fmax s1, s2, s3 ; encoding: [0x41,0x48,0x23,0x1e] +; CHECK: fmax d1, d2, d3 ; encoding: [0x41,0x48,0x63,0x1e] +; CHECK: fmaxnm s1, s2, s3 ; encoding: [0x41,0x68,0x23,0x1e] +; CHECK: fmaxnm d1, d2, d3 ; encoding: [0x41,0x68,0x63,0x1e] + + fmin s1, s2, s3 + fmin d1, d2, d3 + fminnm s1, s2, s3 + fminnm d1, d2, d3 + +; CHECK: fmin s1, s2, s3 ; encoding: [0x41,0x58,0x23,0x1e] +; CHECK: fmin d1, d2, d3 ; encoding: [0x41,0x58,0x63,0x1e] +; CHECK: fminnm s1, s2, s3 ; encoding: [0x41,0x78,0x23,0x1e] +; CHECK: fminnm d1, d2, d3 ; encoding: [0x41,0x78,0x63,0x1e] + + fmsub s1, s2, s3, s4 + fmsub d1, d2, d3, d4 + +; CHECK: fmsub s1, s2, s3, s4 ; encoding: [0x41,0x90,0x03,0x1f] +; CHECK: fmsub d1, d2, d3, d4 ; encoding: [0x41,0x90,0x43,0x1f] + + fmul s1, s2, s3 + fmul d1, d2, d3 + +; CHECK: fmul s1, s2, s3 ; encoding: [0x41,0x08,0x23,0x1e] +; CHECK: fmul d1, d2, d3 ; encoding: [0x41,0x08,0x63,0x1e] + + fneg s1, s2 + fneg d1, d2 + +; CHECK: fneg s1, s2 ; encoding: [0x41,0x40,0x21,0x1e] +; CHECK: fneg d1, d2 ; encoding: [0x41,0x40,0x61,0x1e] + + fnmadd s1, s2, s3, s4 + fnmadd d1, d2, d3, d4 + +; CHECK: fnmadd s1, s2, s3, s4 ; encoding: [0x41,0x10,0x23,0x1f] +; CHECK: fnmadd d1, d2, d3, d4 ; encoding: [0x41,0x10,0x63,0x1f] + + fnmsub s1, s2, s3, s4 + fnmsub d1, d2, d3, d4 + +; CHECK: fnmsub s1, s2, s3, s4 ; encoding: [0x41,0x90,0x23,0x1f] +; CHECK: fnmsub d1, d2, d3, d4 ; encoding: [0x41,0x90,0x63,0x1f] + + fnmul s1, s2, s3 + fnmul d1, d2, d3 + +; CHECK: fnmul s1, s2, s3 ; encoding: [0x41,0x88,0x23,0x1e] +; CHECK: fnmul d1, d2, d3 ; encoding: [0x41,0x88,0x63,0x1e] + + fsqrt s1, s2 + fsqrt d1, d2 + +; CHECK: fsqrt s1, s2 ; encoding: [0x41,0xc0,0x21,0x1e] +; CHECK: fsqrt d1, d2 ; encoding: [0x41,0xc0,0x61,0x1e] + + fsub s1, s2, s3 + fsub d1, d2, d3 + +; CHECK: fsub s1, s2, s3 ; encoding: [0x41,0x38,0x23,0x1e] +; CHECK: fsub d1, d2, d3 ; encoding: [0x41,0x38,0x63,0x1e] + +;----------------------------------------------------------------------------- +; Floating-point comparison +;----------------------------------------------------------------------------- + + fccmp s1, s2, #0, eq + fccmp d1, d2, #0, eq + fccmpe s1, s2, #0, eq + fccmpe d1, d2, #0, eq + +; CHECK: fccmp s1, s2, #0, eq ; encoding: [0x20,0x04,0x22,0x1e] +; CHECK: fccmp d1, d2, #0, eq ; encoding: [0x20,0x04,0x62,0x1e] +; CHECK: fccmpe s1, s2, #0, eq ; encoding: [0x30,0x04,0x22,0x1e] +; CHECK: fccmpe d1, d2, #0, eq ; encoding: [0x30,0x04,0x62,0x1e] + + fcmp s1, s2 + fcmp d1, d2 + fcmp s1, #0.0 + fcmp d1, #0.0 + fcmpe s1, s2 + fcmpe d1, d2 + fcmpe s1, #0.0 + fcmpe d1, #0.0 + +; CHECK: fcmp s1, s2 ; encoding: [0x20,0x20,0x22,0x1e] +; CHECK: fcmp d1, d2 ; encoding: [0x20,0x20,0x62,0x1e] +; CHECK: fcmp s1, #0.0 ; encoding: [0x28,0x20,0x20,0x1e] +; CHECK: fcmp d1, #0.0 ; encoding: [0x28,0x20,0x60,0x1e] +; CHECK: fcmpe s1, s2 ; encoding: [0x30,0x20,0x22,0x1e] +; CHECK: fcmpe d1, d2 ; encoding: [0x30,0x20,0x62,0x1e] +; CHECK: fcmpe s1, #0.0 ; encoding: [0x38,0x20,0x20,0x1e] +; CHECK: fcmpe d1, #0.0 ; encoding: [0x38,0x20,0x60,0x1e] + +;----------------------------------------------------------------------------- +; Floating-point conditional select +;----------------------------------------------------------------------------- + + fcsel s1, s2, s3, eq + fcsel d1, d2, d3, eq + +; CHECK: fcsel s1, s2, s3, eq ; encoding: [0x41,0x0c,0x23,0x1e] +; CHECK: fcsel d1, d2, d3, eq ; encoding: [0x41,0x0c,0x63,0x1e] + +;----------------------------------------------------------------------------- +; Floating-point convert +;----------------------------------------------------------------------------- + + fcvt h1, d2 + fcvt s1, d2 + fcvt d1, h2 + fcvt s1, h2 + fcvt d1, s2 + fcvt h1, s2 + +; CHECK: fcvt h1, d2 ; encoding: [0x41,0xc0,0x63,0x1e] +; CHECK: fcvt s1, d2 ; encoding: [0x41,0x40,0x62,0x1e] +; CHECK: fcvt d1, h2 ; encoding: [0x41,0xc0,0xe2,0x1e] +; CHECK: fcvt s1, h2 ; encoding: [0x41,0x40,0xe2,0x1e] +; CHECK: fcvt d1, s2 ; encoding: [0x41,0xc0,0x22,0x1e] +; CHECK: fcvt h1, s2 ; encoding: [0x41,0xc0,0x23,0x1e] + + fcvtas w1, d2 + fcvtas w1, d2, #1 + fcvtas x1, d2 + fcvtas x1, d2, #1 + fcvtas w1, s2 + fcvtas w1, s2, #1 + fcvtas x1, s2 + fcvtas x1, s2, #1 + +; CHECK: fcvtas w1, d2 ; encoding: [0x41,0x00,0x64,0x1e] +; CHECK: fcvtas w1, d2, #1 ; encoding: [0x41,0xfc,0x44,0x1e] +; CHECK: fcvtas x1, d2 ; encoding: [0x41,0x00,0x64,0x9e] +; CHECK: fcvtas x1, d2, #1 ; encoding: [0x41,0xfc,0x44,0x9e] +; CHECK: fcvtas w1, s2 ; encoding: [0x41,0x00,0x24,0x1e] +; CHECK: fcvtas w1, s2, #1 ; encoding: [0x41,0xfc,0x04,0x1e] +; CHECK: fcvtas x1, s2 ; encoding: [0x41,0x00,0x24,0x9e] +; CHECK: fcvtas x1, s2, #1 ; encoding: [0x41,0xfc,0x04,0x9e] + + fcvtau w1, s2 + fcvtau w1, s2, #1 + fcvtau w1, d2 + fcvtau w1, d2, #1 + fcvtau x1, s2 + fcvtau x1, s2, #1 + fcvtau x1, d2 + fcvtau x1, d2, #1 + +; CHECK: fcvtau w1, s2 ; encoding: [0x41,0x00,0x25,0x1e] +; CHECK: fcvtau w1, s2, #1 ; encoding: [0x41,0xfc,0x05,0x1e] +; CHECK: fcvtau w1, d2 ; encoding: [0x41,0x00,0x65,0x1e] +; CHECK: fcvtau w1, d2, #1 ; encoding: [0x41,0xfc,0x45,0x1e] +; CHECK: fcvtau x1, s2 ; encoding: [0x41,0x00,0x25,0x9e] +; CHECK: fcvtau x1, s2, #1 ; encoding: [0x41,0xfc,0x05,0x9e] +; CHECK: fcvtau x1, d2 ; encoding: [0x41,0x00,0x65,0x9e] +; CHECK: fcvtau x1, d2, #1 ; encoding: [0x41,0xfc,0x45,0x9e] + + fcvtms w1, s2 + fcvtms w1, s2, #1 + fcvtms w1, d2 + fcvtms w1, d2, #1 + fcvtms x1, s2 + fcvtms x1, s2, #1 + fcvtms x1, d2 + fcvtms x1, d2, #1 + +; CHECK: fcvtms w1, s2 ; encoding: [0x41,0x00,0x30,0x1e] +; CHECK: fcvtms w1, s2, #1 ; encoding: [0x41,0xfc,0x10,0x1e] +; CHECK: fcvtms w1, d2 ; encoding: [0x41,0x00,0x70,0x1e] +; CHECK: fcvtms w1, d2, #1 ; encoding: [0x41,0xfc,0x50,0x1e] +; CHECK: fcvtms x1, s2 ; encoding: [0x41,0x00,0x30,0x9e] +; CHECK: fcvtms x1, s2, #1 ; encoding: [0x41,0xfc,0x10,0x9e] +; CHECK: fcvtms x1, d2 ; encoding: [0x41,0x00,0x70,0x9e] +; CHECK: fcvtms x1, d2, #1 ; encoding: [0x41,0xfc,0x50,0x9e] + + fcvtmu w1, s2 + fcvtmu w1, s2, #1 + fcvtmu w1, d2 + fcvtmu w1, d2, #1 + fcvtmu x1, s2 + fcvtmu x1, s2, #1 + fcvtmu x1, d2 + fcvtmu x1, d2, #1 + +; CHECK: fcvtmu w1, s2 ; encoding: [0x41,0x00,0x31,0x1e] +; CHECK: fcvtmu w1, s2, #1 ; encoding: [0x41,0xfc,0x11,0x1e] +; CHECK: fcvtmu w1, d2 ; encoding: [0x41,0x00,0x71,0x1e] +; CHECK: fcvtmu w1, d2, #1 ; encoding: [0x41,0xfc,0x51,0x1e] +; CHECK: fcvtmu x1, s2 ; encoding: [0x41,0x00,0x31,0x9e] +; CHECK: fcvtmu x1, s2, #1 ; encoding: [0x41,0xfc,0x11,0x9e] +; CHECK: fcvtmu x1, d2 ; encoding: [0x41,0x00,0x71,0x9e] +; CHECK: fcvtmu x1, d2, #1 ; encoding: [0x41,0xfc,0x51,0x9e] + + fcvtns w1, s2 + fcvtns w1, s2, #1 + fcvtns w1, d2 + fcvtns w1, d2, #1 + fcvtns x1, s2 + fcvtns x1, s2, #1 + fcvtns x1, d2 + fcvtns x1, d2, #1 + +; CHECK: fcvtns w1, s2 ; encoding: [0x41,0x00,0x20,0x1e] +; CHECK: fcvtns w1, s2, #1 ; encoding: [0x41,0xfc,0x00,0x1e] +; CHECK: fcvtns w1, d2 ; encoding: [0x41,0x00,0x60,0x1e] +; CHECK: fcvtns w1, d2, #1 ; encoding: [0x41,0xfc,0x40,0x1e] +; CHECK: fcvtns x1, s2 ; encoding: [0x41,0x00,0x20,0x9e] +; CHECK: fcvtns x1, s2, #1 ; encoding: [0x41,0xfc,0x00,0x9e] +; CHECK: fcvtns x1, d2 ; encoding: [0x41,0x00,0x60,0x9e] +; CHECK: fcvtns x1, d2, #1 ; encoding: [0x41,0xfc,0x40,0x9e] + + fcvtnu w1, s2 + fcvtnu w1, s2, #1 + fcvtnu w1, d2 + fcvtnu w1, d2, #1 + fcvtnu x1, s2 + fcvtnu x1, s2, #1 + fcvtnu x1, d2 + fcvtnu x1, d2, #1 + +; CHECK: fcvtnu w1, s2 ; encoding: [0x41,0x00,0x21,0x1e] +; CHECK: fcvtnu w1, s2, #1 ; encoding: [0x41,0xfc,0x01,0x1e] +; CHECK: fcvtnu w1, d2 ; encoding: [0x41,0x00,0x61,0x1e] +; CHECK: fcvtnu w1, d2, #1 ; encoding: [0x41,0xfc,0x41,0x1e] +; CHECK: fcvtnu x1, s2 ; encoding: [0x41,0x00,0x21,0x9e] +; CHECK: fcvtnu x1, s2, #1 ; encoding: [0x41,0xfc,0x01,0x9e] +; CHECK: fcvtnu x1, d2 ; encoding: [0x41,0x00,0x61,0x9e] +; CHECK: fcvtnu x1, d2, #1 ; encoding: [0x41,0xfc,0x41,0x9e] + + fcvtps w1, s2 + fcvtps w1, s2, #1 + fcvtps w1, d2 + fcvtps w1, d2, #1 + fcvtps x1, s2 + fcvtps x1, s2, #1 + fcvtps x1, d2 + fcvtps x1, d2, #1 + +; CHECK: fcvtps w1, s2 ; encoding: [0x41,0x00,0x28,0x1e] +; CHECK: fcvtps w1, s2, #1 ; encoding: [0x41,0xfc,0x08,0x1e] +; CHECK: fcvtps w1, d2 ; encoding: [0x41,0x00,0x68,0x1e] +; CHECK: fcvtps w1, d2, #1 ; encoding: [0x41,0xfc,0x48,0x1e] +; CHECK: fcvtps x1, s2 ; encoding: [0x41,0x00,0x28,0x9e] +; CHECK: fcvtps x1, s2, #1 ; encoding: [0x41,0xfc,0x08,0x9e] +; CHECK: fcvtps x1, d2 ; encoding: [0x41,0x00,0x68,0x9e] +; CHECK: fcvtps x1, d2, #1 ; encoding: [0x41,0xfc,0x48,0x9e] + + fcvtpu w1, s2 + fcvtpu w1, s2, #1 + fcvtpu w1, d2 + fcvtpu w1, d2, #1 + fcvtpu x1, s2 + fcvtpu x1, s2, #1 + fcvtpu x1, d2 + fcvtpu x1, d2, #1 + +; CHECK: fcvtpu w1, s2 ; encoding: [0x41,0x00,0x29,0x1e] +; CHECK: fcvtpu w1, s2, #1 ; encoding: [0x41,0xfc,0x09,0x1e] +; CHECK: fcvtpu w1, d2 ; encoding: [0x41,0x00,0x69,0x1e] +; CHECK: fcvtpu w1, d2, #1 ; encoding: [0x41,0xfc,0x49,0x1e] +; CHECK: fcvtpu x1, s2 ; encoding: [0x41,0x00,0x29,0x9e] +; CHECK: fcvtpu x1, s2, #1 ; encoding: [0x41,0xfc,0x09,0x9e] +; CHECK: fcvtpu x1, d2 ; encoding: [0x41,0x00,0x69,0x9e] +; CHECK: fcvtpu x1, d2, #1 ; encoding: [0x41,0xfc,0x49,0x9e] + + fcvtzs w1, s2 + fcvtzs w1, s2, #1 + fcvtzs w1, d2 + fcvtzs w1, d2, #1 + fcvtzs x1, s2 + fcvtzs x1, s2, #1 + fcvtzs x1, d2 + fcvtzs x1, d2, #1 + +; CHECK: fcvtzs w1, s2 ; encoding: [0x41,0x00,0x38,0x1e] +; CHECK: fcvtzs w1, s2, #1 ; encoding: [0x41,0xfc,0x18,0x1e] +; CHECK: fcvtzs w1, d2 ; encoding: [0x41,0x00,0x78,0x1e] +; CHECK: fcvtzs w1, d2, #1 ; encoding: [0x41,0xfc,0x58,0x1e] +; CHECK: fcvtzs x1, s2 ; encoding: [0x41,0x00,0x38,0x9e] +; CHECK: fcvtzs x1, s2, #1 ; encoding: [0x41,0xfc,0x18,0x9e] +; CHECK: fcvtzs x1, d2 ; encoding: [0x41,0x00,0x78,0x9e] +; CHECK: fcvtzs x1, d2, #1 ; encoding: [0x41,0xfc,0x58,0x9e] + + fcvtzu w1, s2 + fcvtzu w1, s2, #1 + fcvtzu w1, d2 + fcvtzu w1, d2, #1 + fcvtzu x1, s2 + fcvtzu x1, s2, #1 + fcvtzu x1, d2 + fcvtzu x1, d2, #1 + +; CHECK: fcvtzu w1, s2 ; encoding: [0x41,0x00,0x39,0x1e] +; CHECK: fcvtzu w1, s2, #1 ; encoding: [0x41,0xfc,0x19,0x1e] +; CHECK: fcvtzu w1, d2 ; encoding: [0x41,0x00,0x79,0x1e] +; CHECK: fcvtzu w1, d2, #1 ; encoding: [0x41,0xfc,0x59,0x1e] +; CHECK: fcvtzu x1, s2 ; encoding: [0x41,0x00,0x39,0x9e] +; CHECK: fcvtzu x1, s2, #1 ; encoding: [0x41,0xfc,0x19,0x9e] +; CHECK: fcvtzu x1, d2 ; encoding: [0x41,0x00,0x79,0x9e] +; CHECK: fcvtzu x1, d2, #1 ; encoding: [0x41,0xfc,0x59,0x9e] + + scvtf s1, w2 + scvtf s1, w2, #1 + scvtf d1, w2 + scvtf d1, w2, #1 + scvtf s1, x2 + scvtf s1, x2, #1 + scvtf d1, x2 + scvtf d1, x2, #1 + +; CHECK: scvtf s1, w2 ; encoding: [0x41,0x00,0x22,0x1e] +; CHECK: scvtf s1, w2, #1 ; encoding: [0x41,0xfc,0x02,0x1e] +; CHECK: scvtf d1, w2 ; encoding: [0x41,0x00,0x62,0x1e] +; CHECK: scvtf d1, w2, #1 ; encoding: [0x41,0xfc,0x42,0x1e] +; CHECK: scvtf s1, x2 ; encoding: [0x41,0x00,0x22,0x9e] +; CHECK: scvtf s1, x2, #1 ; encoding: [0x41,0xfc,0x02,0x9e] +; CHECK: scvtf d1, x2 ; encoding: [0x41,0x00,0x62,0x9e] +; CHECK: scvtf d1, x2, #1 ; encoding: [0x41,0xfc,0x42,0x9e] + + ucvtf s1, w2 + ucvtf s1, w2, #1 + ucvtf d1, w2 + ucvtf d1, w2, #1 + ucvtf s1, x2 + ucvtf s1, x2, #1 + ucvtf d1, x2 + ucvtf d1, x2, #1 + +; CHECK: ucvtf s1, w2 ; encoding: [0x41,0x00,0x23,0x1e] +; CHECK: ucvtf s1, w2, #1 ; encoding: [0x41,0xfc,0x03,0x1e] +; CHECK: ucvtf d1, w2 ; encoding: [0x41,0x00,0x63,0x1e] +; CHECK: ucvtf d1, w2, #1 ; encoding: [0x41,0xfc,0x43,0x1e] +; CHECK: ucvtf s1, x2 ; encoding: [0x41,0x00,0x23,0x9e] +; CHECK: ucvtf s1, x2, #1 ; encoding: [0x41,0xfc,0x03,0x9e] +; CHECK: ucvtf d1, x2 ; encoding: [0x41,0x00,0x63,0x9e] +; CHECK: ucvtf d1, x2, #1 ; encoding: [0x41,0xfc,0x43,0x9e] + +;----------------------------------------------------------------------------- +; Floating-point move +;----------------------------------------------------------------------------- + + fmov s1, w2 + fmov w1, s2 + fmov d1, x2 + fmov x1, d2 + +; CHECK: fmov s1, w2 ; encoding: [0x41,0x00,0x27,0x1e] +; CHECK: fmov w1, s2 ; encoding: [0x41,0x00,0x26,0x1e] +; CHECK: fmov d1, x2 ; encoding: [0x41,0x00,0x67,0x9e] +; CHECK: fmov x1, d2 ; encoding: [0x41,0x00,0x66,0x9e] + + fmov s1, #0.125 + fmov s1, #0x40 + fmov d1, #0.125 + fmov d1, #0x40 + fmov d1, #-4.843750e-01 + fmov d1, #4.843750e-01 + fmov d3, #3 + fmov s2, #0.0 + fmov d2, #0.0 + +; CHECK: fmov s1, #1.250000e-01 ; encoding: [0x01,0x10,0x28,0x1e] +; CHECK: fmov s1, #1.250000e-01 ; encoding: [0x01,0x10,0x28,0x1e] +; CHECK: fmov d1, #1.250000e-01 ; encoding: [0x01,0x10,0x68,0x1e] +; CHECK: fmov d1, #1.250000e-01 ; encoding: [0x01,0x10,0x68,0x1e] +; CHECK: fmov d1, #-4.843750e-01 ; encoding: [0x01,0xf0,0x7b,0x1e] +; CHECK: fmov d1, #4.843750e-01 ; encoding: [0x01,0xf0,0x6b,0x1e] +; CHECK: fmov d3, #3.000000e+00 ; encoding: [0x03,0x10,0x61,0x1e] +; CHECK: fmov s2, wzr ; encoding: [0xe2,0x03,0x27,0x1e] +; CHECK: fmov d2, xzr ; encoding: [0xe2,0x03,0x67,0x9e] + + fmov s1, s2 + fmov d1, d2 + +; CHECK: fmov s1, s2 ; encoding: [0x41,0x40,0x20,0x1e] +; CHECK: fmov d1, d2 ; encoding: [0x41,0x40,0x60,0x1e] + + + fmov x2, v5.d[1] + fmov.d x9, v7[1] + fmov v1.d[1], x1 + fmov.d v8[1], x6 + +; CHECK: fmov.d x2, v5[1] ; encoding: [0xa2,0x00,0xae,0x9e] +; CHECK: fmov.d x9, v7[1] ; encoding: [0xe9,0x00,0xae,0x9e] +; CHECK: fmov.d v1[1], x1 ; encoding: [0x21,0x00,0xaf,0x9e] +; CHECK: fmov.d v8[1], x6 ; encoding: [0xc8,0x00,0xaf,0x9e] + + +;----------------------------------------------------------------------------- +; Floating-point round to integral +;----------------------------------------------------------------------------- + + frinta s1, s2 + frinta d1, d2 + +; CHECK: frinta s1, s2 ; encoding: [0x41,0x40,0x26,0x1e] +; CHECK: frinta d1, d2 ; encoding: [0x41,0x40,0x66,0x1e] + + frinti s1, s2 + frinti d1, d2 + +; CHECK: frinti s1, s2 ; encoding: [0x41,0xc0,0x27,0x1e] +; CHECK: frinti d1, d2 ; encoding: [0x41,0xc0,0x67,0x1e] + + frintm s1, s2 + frintm d1, d2 + +; CHECK: frintm s1, s2 ; encoding: [0x41,0x40,0x25,0x1e] +; CHECK: frintm d1, d2 ; encoding: [0x41,0x40,0x65,0x1e] + + frintn s1, s2 + frintn d1, d2 + +; CHECK: frintn s1, s2 ; encoding: [0x41,0x40,0x24,0x1e] +; CHECK: frintn d1, d2 ; encoding: [0x41,0x40,0x64,0x1e] + + frintp s1, s2 + frintp d1, d2 + +; CHECK: frintp s1, s2 ; encoding: [0x41,0xc0,0x24,0x1e] +; CHECK: frintp d1, d2 ; encoding: [0x41,0xc0,0x64,0x1e] + + frintx s1, s2 + frintx d1, d2 + +; CHECK: frintx s1, s2 ; encoding: [0x41,0x40,0x27,0x1e] +; CHECK: frintx d1, d2 ; encoding: [0x41,0x40,0x67,0x1e] + + frintz s1, s2 + frintz d1, d2 + +; CHECK: frintz s1, s2 ; encoding: [0x41,0xc0,0x25,0x1e] +; CHECK: frintz d1, d2 ; encoding: [0x41,0xc0,0x65,0x1e] + + cmhs d0, d0, d0 + cmtst d0, d0, d0 + +; CHECK: cmhs d0, d0, d0 ; encoding: [0x00,0x3c,0xe0,0x7e] +; CHECK: cmtst d0, d0, d0 ; encoding: [0x00,0x8c,0xe0,0x5e] + + + +;----------------------------------------------------------------------------- +; Floating-point extract and narrow +;----------------------------------------------------------------------------- + sqxtn b4, h2 + sqxtn h2, s3 + sqxtn s9, d2 + +; CHECK: sqxtn b4, h2 ; encoding: [0x44,0x48,0x21,0x5e] +; CHECK: sqxtn h2, s3 ; encoding: [0x62,0x48,0x61,0x5e] +; CHECK: sqxtn s9, d2 ; encoding: [0x49,0x48,0xa1,0x5e] + + sqxtun b4, h2 + sqxtun h2, s3 + sqxtun s9, d2 + +; CHECK: sqxtun b4, h2 ; encoding: [0x44,0x28,0x21,0x7e] +; CHECK: sqxtun h2, s3 ; encoding: [0x62,0x28,0x61,0x7e] +; CHECK: sqxtun s9, d2 ; encoding: [0x49,0x28,0xa1,0x7e] + + uqxtn b4, h2 + uqxtn h2, s3 + uqxtn s9, d2 + +; CHECK: uqxtn b4, h2 ; encoding: [0x44,0x48,0x21,0x7e] +; CHECK: uqxtn h2, s3 ; encoding: [0x62,0x48,0x61,0x7e] +; CHECK: uqxtn s9, d2 ; encoding: [0x49,0x48,0xa1,0x7e] diff --git a/test/MC/ARM64/large-relocs.s b/test/MC/ARM64/large-relocs.s new file mode 100644 index 0000000000..348ceb6db5 --- /dev/null +++ b/test/MC/ARM64/large-relocs.s @@ -0,0 +1,38 @@ +// RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -o - %s | FileCheck %s +// RUN: llvm-mc -triple=arm64-linux-gnu -show-encoding -filetype=obj -o - %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-OBJ %s + + movz x2, #:abs_g0:sym + movk w3, #:abs_g0_nc:sym +// CHECK: movz x2, #:abs_g0:sym // encoding: [0bAAA00010,A,0b100AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g0:sym, kind: fixup_arm64_movw +// CHECK: movk w3, #:abs_g0_nc:sym // encoding: [0bAAA00011,A,0b100AAAAA,0x72] +// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g0_nc:sym, kind: fixup_arm64_movw + +// CHECK-OBJ: 0 R_AARCH64_MOVW_UABS_G0 sym +// CHECK-OBJ: 4 R_AARCH64_MOVW_UABS_G0_NC sym + + movz x4, #:abs_g1:sym + movk w5, #:abs_g1_nc:sym +// CHECK: movz x4, #:abs_g1:sym // encoding: [0bAAA00100,A,0b101AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g1:sym, kind: fixup_arm64_movw +// CHECK: movk w5, #:abs_g1_nc:sym // encoding: [0bAAA00101,A,0b101AAAAA,0x72] +// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g1_nc:sym, kind: fixup_arm64_movw + +// CHECK-OBJ: 8 R_AARCH64_MOVW_UABS_G1 sym +// CHECK-OBJ: c R_AARCH64_MOVW_UABS_G1_NC sym + + movz x6, #:abs_g2:sym + movk x7, #:abs_g2_nc:sym +// CHECK: movz x6, #:abs_g2:sym // encoding: [0bAAA00110,A,0b110AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g2:sym, kind: fixup_arm64_movw +// CHECK: movk x7, #:abs_g2_nc:sym // encoding: [0bAAA00111,A,0b110AAAAA,0xf2] +// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g2_nc:sym, kind: fixup_arm64_movw + +// CHECK-OBJ: 10 R_AARCH64_MOVW_UABS_G2 sym +// CHECK-OBJ: 14 R_AARCH64_MOVW_UABS_G2_NC sym + + movz x8, #:abs_g3:sym +// CHECK: movz x8, #:abs_g3:sym // encoding: [0bAAA01000,A,0b111AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :abs_g3:sym, kind: fixup_arm64_movw + +// CHECK-OBJ: 18 R_AARCH64_MOVW_UABS_G3 sym diff --git a/test/MC/ARM64/lit.local.cfg b/test/MC/ARM64/lit.local.cfg new file mode 100644 index 0000000000..49447af369 --- /dev/null +++ b/test/MC/ARM64/lit.local.cfg @@ -0,0 +1,6 @@ +config.suffixes = ['.ll', '.c', '.cpp', '.s'] + +targets = set(config.root.targets_to_build.split()) +if not 'ARM64' in targets: + config.unsupported = True + diff --git a/test/MC/ARM64/logical-encoding.s b/test/MC/ARM64/logical-encoding.s new file mode 100644 index 0000000000..e5f1436d1a --- /dev/null +++ b/test/MC/ARM64/logical-encoding.s @@ -0,0 +1,224 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s + +foo: +;==---------------------------------------------------------------------------== +; 5.4.2 Logical (immediate) +;==---------------------------------------------------------------------------== + + and w0, w0, #1 + and x0, x0, #1 + and w1, w2, #15 + and x1, x2, #15 + and sp, x5, #~15 + ands w0, w0, #1 + ands x0, x0, #1 + ands w1, w2, #15 + ands x1, x2, #15 + +; CHECK: and w0, w0, #0x1 ; encoding: [0x00,0x00,0x00,0x12] +; CHECK: and x0, x0, #0x1 ; encoding: [0x00,0x00,0x40,0x92] +; CHECK: and w1, w2, #0xf ; encoding: [0x41,0x0c,0x00,0x12] +; CHECK: and x1, x2, #0xf ; encoding: [0x41,0x0c,0x40,0x92] +; CHECK: and sp, x5, #0xfffffffffffffff0 ; encoding: [0xbf,0xec,0x7c,0x92] +; CHECK: ands w0, w0, #0x1 ; encoding: [0x00,0x00,0x00,0x72] +; CHECK: ands x0, x0, #0x1 ; encoding: [0x00,0x00,0x40,0xf2] +; CHECK: ands w1, w2, #0xf ; encoding: [0x41,0x0c,0x00,0x72] +; CHECK: ands x1, x2, #0xf ; encoding: [0x41,0x0c,0x40,0xf2] + + eor w1, w2, #0x4000 + eor x1, x2, #0x8000 + +; CHECK: eor w1, w2, #0x4000 ; encoding: [0x41,0x00,0x12,0x52] +; CHECK: eor x1, x2, #0x8000 ; encoding: [0x41,0x00,0x71,0xd2] + + orr w1, w2, #0x4000 + orr x1, x2, #0x8000 + +; CHECK: orr w1, w2, #0x4000 ; encoding: [0x41,0x00,0x12,0x32] +; CHECK: orr x1, x2, #0x8000 ; encoding: [0x41,0x00,0x71,0xb2] + + orr w8, wzr, #0x1 + orr x8, xzr, #0x1 + +; CHECK: orr w8, wzr, #0x1 ; encoding: [0xe8,0x03,0x00,0x32] +; CHECK: orr x8, xzr, #0x1 ; encoding: [0xe8,0x03,0x40,0xb2] + +;==---------------------------------------------------------------------------== +; 5.5.3 Logical (shifted register) +;==---------------------------------------------------------------------------== + + and w1, w2, w3 + and x1, x2, x3 + and w1, w2, w3, lsl #2 + and x1, x2, x3, lsl #2 + and w1, w2, w3, lsr #2 + and x1, x2, x3, lsr #2 + and w1, w2, w3, asr #2 + and x1, x2, x3, asr #2 + and w1, w2, w3, ror #2 + and x1, x2, x3, ror #2 + +; CHECK: and w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x0a] +; CHECK: and x1, x2, x3 ; encoding: [0x41,0x00,0x03,0x8a] +; CHECK: and w1, w2, w3, lsl #2 ; encoding: [0x41,0x08,0x03,0x0a] +; CHECK: and x1, x2, x3, lsl #2 ; encoding: [0x41,0x08,0x03,0x8a] +; CHECK: and w1, w2, w3, lsr #2 ; encoding: [0x41,0x08,0x43,0x0a] +; CHECK: and x1, x2, x3, lsr #2 ; encoding: [0x41,0x08,0x43,0x8a] +; CHECK: and w1, w2, w3, asr #2 ; encoding: [0x41,0x08,0x83,0x0a] +; CHECK: and x1, x2, x3, asr #2 ; encoding: [0x41,0x08,0x83,0x8a] +; CHECK: and w1, w2, w3, ror #2 ; encoding: [0x41,0x08,0xc3,0x0a] +; CHECK: and x1, x2, x3, ror #2 ; encoding: [0x41,0x08,0xc3,0x8a] + + ands w1, w2, w3 + ands x1, x2, x3 + ands w1, w2, w3, lsl #2 + ands x1, x2, x3, lsl #2 + ands w1, w2, w3, lsr #2 + ands x1, x2, x3, lsr #2 + ands w1, w2, w3, asr #2 + ands x1, x2, x3, asr #2 + ands w1, w2, w3, ror #2 + ands x1, x2, x3, ror #2 + +; CHECK: ands w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x6a] +; CHECK: ands x1, x2, x3 ; encoding: [0x41,0x00,0x03,0xea] +; CHECK: ands w1, w2, w3, lsl #2 ; encoding: [0x41,0x08,0x03,0x6a] +; CHECK: ands x1, x2, x3, lsl #2 ; encoding: [0x41,0x08,0x03,0xea] +; CHECK: ands w1, w2, w3, lsr #2 ; encoding: [0x41,0x08,0x43,0x6a] +; CHECK: ands x1, x2, x3, lsr #2 ; encoding: [0x41,0x08,0x43,0xea] +; CHECK: ands w1, w2, w3, asr #2 ; encoding: [0x41,0x08,0x83,0x6a] +; CHECK: ands x1, x2, x3, asr #2 ; encoding: [0x41,0x08,0x83,0xea] +; CHECK: ands w1, w2, w3, ror #2 ; encoding: [0x41,0x08,0xc3,0x6a] +; CHECK: ands x1, x2, x3, ror #2 ; encoding: [0x41,0x08,0xc3,0xea] + + bic w1, w2, w3 + bic x1, x2, x3 + bic w1, w2, w3, lsl #3 + bic x1, x2, x3, lsl #3 + bic w1, w2, w3, lsr #3 + bic x1, x2, x3, lsr #3 + bic w1, w2, w3, asr #3 + bic x1, x2, x3, asr #3 + bic w1, w2, w3, ror #3 + bic x1, x2, x3, ror #3 + +; CHECK: bic w1, w2, w3 ; encoding: [0x41,0x00,0x23,0x0a] +; CHECK: bic x1, x2, x3 ; encoding: [0x41,0x00,0x23,0x8a] +; CHECK: bic w1, w2, w3, lsl #3 ; encoding: [0x41,0x0c,0x23,0x0a] +; CHECK: bic x1, x2, x3, lsl #3 ; encoding: [0x41,0x0c,0x23,0x8a] +; CHECK: bic w1, w2, w3, lsr #3 ; encoding: [0x41,0x0c,0x63,0x0a] +; CHECK: bic x1, x2, x3, lsr #3 ; encoding: [0x41,0x0c,0x63,0x8a] +; CHECK: bic w1, w2, w3, asr #3 ; encoding: [0x41,0x0c,0xa3,0x0a] +; CHECK: bic x1, x2, x3, asr #3 ; encoding: [0x41,0x0c,0xa3,0x8a] +; CHECK: bic w1, w2, w3, ror #3 ; encoding: [0x41,0x0c,0xe3,0x0a] +; CHECK: bic x1, x2, x3, ror #3 ; encoding: [0x41,0x0c,0xe3,0x8a] + + bics w1, w2, w3 + bics x1, x2, x3 + bics w1, w2, w3, lsl #3 + bics x1, x2, x3, lsl #3 + bics w1, w2, w3, lsr #3 + bics x1, x2, x3, lsr #3 + bics w1, w2, w3, asr #3 + bics x1, x2, x3, asr #3 + bics w1, w2, w3, ror #3 + bics x1, x2, x3, ror #3 + +; CHECK: bics w1, w2, w3 ; encoding: [0x41,0x00,0x23,0x6a] +; CHECK: bics x1, x2, x3 ; encoding: [0x41,0x00,0x23,0xea] +; CHECK: bics w1, w2, w3, lsl #3 ; encoding: [0x41,0x0c,0x23,0x6a] +; CHECK: bics x1, x2, x3, lsl #3 ; encoding: [0x41,0x0c,0x23,0xea] +; CHECK: bics w1, w2, w3, lsr #3 ; encoding: [0x41,0x0c,0x63,0x6a] +; CHECK: bics x1, x2, x3, lsr #3 ; encoding: [0x41,0x0c,0x63,0xea] +; CHECK: bics w1, w2, w3, asr #3 ; encoding: [0x41,0x0c,0xa3,0x6a] +; CHECK: bics x1, x2, x3, asr #3 ; encoding: [0x41,0x0c,0xa3,0xea] +; CHECK: bics w1, w2, w3, ror #3 ; encoding: [0x41,0x0c,0xe3,0x6a] +; CHECK: bics x1, x2, x3, ror #3 ; encoding: [0x41,0x0c,0xe3,0xea] + + eon w1, w2, w3 + eon x1, x2, x3 + eon w1, w2, w3, lsl #4 + eon x1, x2, x3, lsl #4 + eon w1, w2, w3, lsr #4 + eon x1, x2, x3, lsr #4 + eon w1, w2, w3, asr #4 + eon x1, x2, x3, asr #4 + eon w1, w2, w3, ror #4 + eon x1, x2, x3, ror #4 + +; CHECK: eon w1, w2, w3 ; encoding: [0x41,0x00,0x23,0x4a] +; CHECK: eon x1, x2, x3 ; encoding: [0x41,0x00,0x23,0xca] +; CHECK: eon w1, w2, w3, lsl #4 ; encoding: [0x41,0x10,0x23,0x4a] +; CHECK: eon x1, x2, x3, lsl #4 ; encoding: [0x41,0x10,0x23,0xca] +; CHECK: eon w1, w2, w3, lsr #4 ; encoding: [0x41,0x10,0x63,0x4a] +; CHECK: eon x1, x2, x3, lsr #4 ; encoding: [0x41,0x10,0x63,0xca] +; CHECK: eon w1, w2, w3, asr #4 ; encoding: [0x41,0x10,0xa3,0x4a] +; CHECK: eon x1, x2, x3, asr #4 ; encoding: [0x41,0x10,0xa3,0xca] +; CHECK: eon w1, w2, w3, ror #4 ; encoding: [0x41,0x10,0xe3,0x4a] +; CHECK: eon x1, x2, x3, ror #4 ; encoding: [0x41,0x10,0xe3,0xca] + + eor w1, w2, w3 + eor x1, x2, x3 + eor w1, w2, w3, lsl #5 + eor x1, x2, x3, lsl #5 + eor w1, w2, w3, lsr #5 + eor x1, x2, x3, lsr #5 + eor w1, w2, w3, asr #5 + eor x1, x2, x3, asr #5 + eor w1, w2, w3, ror #5 + eor x1, x2, x3, ror #5 + +; CHECK: eor w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x4a] +; CHECK: eor x1, x2, x3 ; encoding: [0x41,0x00,0x03,0xca] +; CHECK: eor w1, w2, w3, lsl #5 ; encoding: [0x41,0x14,0x03,0x4a] +; CHECK: eor x1, x2, x3, lsl #5 ; encoding: [0x41,0x14,0x03,0xca] +; CHECK: eor w1, w2, w3, lsr #5 ; encoding: [0x41,0x14,0x43,0x4a] +; CHECK: eor x1, x2, x3, lsr #5 ; encoding: [0x41,0x14,0x43,0xca] +; CHECK: eor w1, w2, w3, asr #5 ; encoding: [0x41,0x14,0x83,0x4a] +; CHECK: eor x1, x2, x3, asr #5 ; encoding: [0x41,0x14,0x83,0xca] +; CHECK: eor w1, w2, w3, ror #5 ; encoding: [0x41,0x14,0xc3,0x4a] +; CHECK: eor x1, x2, x3, ror #5 ; encoding: [0x41,0x14,0xc3,0xca] + + orr w1, w2, w3 + orr x1, x2, x3 + orr w1, w2, w3, lsl #6 + orr x1, x2, x3, lsl #6 + orr w1, w2, w3, lsr #6 + orr x1, x2, x3, lsr #6 + orr w1, w2, w3, asr #6 + orr x1, x2, x3, asr #6 + orr w1, w2, w3, ror #6 + orr x1, x2, x3, ror #6 + +; CHECK: orr w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x2a] +; CHECK: orr x1, x2, x3 ; encoding: [0x41,0x00,0x03,0xaa] +; CHECK: orr w1, w2, w3, lsl #6 ; encoding: [0x41,0x18,0x03,0x2a] +; CHECK: orr x1, x2, x3, lsl #6 ; encoding: [0x41,0x18,0x03,0xaa] +; CHECK: orr w1, w2, w3, lsr #6 ; encoding: [0x41,0x18,0x43,0x2a] +; CHECK: orr x1, x2, x3, lsr #6 ; encoding: [0x41,0x18,0x43,0xaa] +; CHECK: orr w1, w2, w3, asr #6 ; encoding: [0x41,0x18,0x83,0x2a] +; CHECK: orr x1, x2, x3, asr #6 ; encoding: [0x41,0x18,0x83,0xaa] +; CHECK: orr w1, w2, w3, ror #6 ; encoding: [0x41,0x18,0xc3,0x2a] +; CHECK: orr x1, x2, x3, ror #6 ; encoding: [0x41,0x18,0xc3,0xaa] + + orn w1, w2, w3 + orn x1, x2, x3 + orn w1, w2, w3, lsl #7 + orn x1, x2, x3, lsl #7 + orn w1, w2, w3, lsr #7 + orn x1, x2, x3, lsr #7 + orn w1, w2, w3, asr #7 + orn x1, x2, x3, asr #7 + orn w1, w2, w3, ror #7 + orn x1, x2, x3, ror #7 + +; CHECK: orn w1, w2, w3 ; encoding: [0x41,0x00,0x23,0x2a] +; CHECK: orn x1, x2, x3 ; encoding: [0x41,0x00,0x23,0xaa] +; CHECK: orn w1, w2, w3, lsl #7 ; encoding: [0x41,0x1c,0x23,0x2a] +; CHECK: orn x1, x2, x3, lsl #7 ; encoding: [0x41,0x1c,0x23,0xaa] +; CHECK: orn w1, w2, w3, lsr #7 ; encoding: [0x41,0x1c,0x63,0x2a] +; CHECK: orn x1, x2, x3, lsr #7 ; encoding: [0x41,0x1c,0x63,0xaa] +; CHECK: orn w1, w2, w3, asr #7 ; encoding: [0x41,0x1c,0xa3,0x2a] +; CHECK: orn x1, x2, x3, asr #7 ; encoding: [0x41,0x1c,0xa3,0xaa] +; CHECK: orn w1, w2, w3, ror #7 ; encoding: [0x41,0x1c,0xe3,0x2a] +; CHECK: orn x1, x2, x3, ror #7 ; encoding: [0x41,0x1c,0xe3,0xaa] diff --git a/test/MC/ARM64/mapping-across-sections.s b/test/MC/ARM64/mapping-across-sections.s new file mode 100644 index 0000000000..00b324cb82 --- /dev/null +++ b/test/MC/ARM64/mapping-across-sections.s @@ -0,0 +1,28 @@ +// RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj < %s | llvm-objdump -t - | FileCheck %s + + .text + add w0, w0, w0 + +// .wibble should *not* inherit .text's mapping symbol. It's a completely different section. + .section .wibble + add w0, w0, w0 + +// A setion should be able to start with a $d + .section .starts_data + .word 42 + +// Changing back to .text should not emit a redundant $x + .text + add w0, w0, w0 + +// With all those constraints, we want: +// + .text to have $x at 0 and no others +// + .wibble to have $x at 0 +// + .starts_data to have $d at 0 + + +// CHECK: 00000000 .starts_data 00000000 $d +// CHECK-NEXT: 00000000 .text 00000000 $x +// CHECK-NEXT: 00000000 .wibble 00000000 $x +// CHECK-NOT: ${{[adtx]}} + diff --git a/test/MC/ARM64/mapping-within-section.s b/test/MC/ARM64/mapping-within-section.s new file mode 100644 index 0000000000..f515cb9a5c --- /dev/null +++ b/test/MC/ARM64/mapping-within-section.s @@ -0,0 +1,23 @@ +// RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj < %s | llvm-objdump -t - | FileCheck %s + + .text +// $x at 0x0000 + add w0, w0, w0 +// $d at 0x0004 + .ascii "012" + .byte 1 + .hword 2 + .word 4 + .xword 8 + .single 4.0 + .double 8.0 + .space 10 + .zero 3 + .fill 10, 2, 42 + .org 100, 12 +// $x at 0x0018 + add x0, x0, x0 + +// CHECK: 00000004 .text 00000000 $d +// CHECK-NEXT: 00000000 .text 00000000 $x +// CHECK-NEXT: 00000064 .text 00000000 $x diff --git a/test/MC/ARM64/memory.s b/test/MC/ARM64/memory.s new file mode 100644 index 0000000000..0e8f1d5008 --- /dev/null +++ b/test/MC/ARM64/memory.s @@ -0,0 +1,634 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s + +foo: +;----------------------------------------------------------------------------- +; Indexed loads +;----------------------------------------------------------------------------- + + ldr w5, [x4, #20] + ldr x4, [x3] + ldr x2, [sp, #32] + ldr b5, [sp, #1] + ldr h6, [sp, #2] + ldr s7, [sp, #4] + ldr d8, [sp, #8] + ldr q9, [sp, #16] + ldrb w4, [x3] + ldrb w5, [x4, #20] + ldrb w2, [x3, _foo@pageoff] + ldrb w3, [x2, "+[Test method].var"@PAGEOFF] + ldrsb w9, [x3] + ldrsb x2, [sp, #128] + ldrh w2, [sp, #32] + ldrsh w3, [sp, #32] + ldrsh x5, [x9, #24] + ldrsw x9, [sp, #512] + + prfm #5, [sp, #32] + prfm #31, [sp, #32] + prfm pldl1keep, [x2] + prfm pldl1strm, [x2] + prfm pldl2keep, [x2] + prfm pldl2strm, [x2] + prfm pldl3keep, [x2] + prfm pldl3strm, [x2] + prfm pstl1keep, [x2] + prfm pstl1strm, [x2] + prfm pstl2keep, [x2] + prfm pstl2strm, [x2] + prfm pstl3keep, [x2] + prfm pstl3strm, [x2] + prfm pstl3strm, [x4, x5, lsl #3] + +; CHECK: ldr w5, [x4, #20] ; encoding: [0x85,0x14,0x40,0xb9] +; CHECK: ldr x4, [x3] ; encoding: [0x64,0x00,0x40,0xf9] +; CHECK: ldr x2, [sp, #32] ; encoding: [0xe2,0x13,0x40,0xf9] +; CHECK: ldr b5, [sp, #1] ; encoding: [0xe5,0x07,0x40,0x3d] +; CHECK: ldr h6, [sp, #2] ; encoding: [0xe6,0x07,0x40,0x7d] +; CHECK: ldr s7, [sp, #4] ; encoding: [0xe7,0x07,0x40,0xbd] +; CHECK: ldr d8, [sp, #8] ; encoding: [0xe8,0x07,0x40,0xfd] +; CHECK: ldr q9, [sp, #16] ; encoding: [0xe9,0x07,0xc0,0x3d] +; CHECK: ldrb w4, [x3] ; encoding: [0x64,0x00,0x40,0x39] +; CHECK: ldrb w5, [x4, #20] ; encoding: [0x85,0x50,0x40,0x39] +; CHECK: ldrb w2, [x3, _foo@PAGEOFF] ; encoding: [0x62,0bAAAAAA00,0b01AAAAAA,0x39] +; CHECK: ldrb w3, [x2, "+[Test method].var"@PAGEOFF] ; encoding: [0x43,0bAAAAAA00,0b01AAAAAA,0x39] +; CHECK: ldrsb w9, [x3] ; encoding: [0x69,0x00,0xc0,0x39] +; CHECK: ldrsb x2, [sp, #128] ; encoding: [0xe2,0x03,0x82,0x39] +; CHECK: ldrh w2, [sp, #32] ; encoding: [0xe2,0x43,0x40,0x79] +; CHECK: ldrsh w3, [sp, #32] ; encoding: [0xe3,0x43,0xc0,0x79] +; CHECK: ldrsh x5, [x9, #24] ; encoding: [0x25,0x31,0x80,0x79] +; CHECK: ldrsw x9, [sp, #512] ; encoding: [0xe9,0x03,0x82,0xb9] +; CHECK: prfm pldl3strm, [sp, #32] ; encoding: [0xe5,0x13,0x80,0xf9] +; CHECK: prfm #31, [sp, #32] ; encoding: [0xff,0x13,0x80,0xf9] +; CHECK: prfm pldl1keep, [x2] ; encoding: [0x40,0x00,0x80,0xf9] +; CHECK: prfm pldl1strm, [x2] ; encoding: [0x41,0x00,0x80,0xf9] +; CHECK: prfm pldl2keep, [x2] ; encoding: [0x42,0x00,0x80,0xf9] +; CHECK: prfm pldl2strm, [x2] ; encoding: [0x43,0x00,0x80,0xf9] +; CHECK: prfm pldl3keep, [x2] ; encoding: [0x44,0x00,0x80,0xf9] +; CHECK: prfm pldl3strm, [x2] ; encoding: [0x45,0x00,0x80,0xf9] +; CHECK: prfm pstl1keep, [x2] ; encoding: [0x50,0x00,0x80,0xf9] +; CHECK: prfm pstl1strm, [x2] ; encoding: [0x51,0x00,0x80,0xf9] +; CHECK: prfm pstl2keep, [x2] ; encoding: [0x52,0x00,0x80,0xf9] +; CHECK: prfm pstl2strm, [x2] ; encoding: [0x53,0x00,0x80,0xf9] +; CHECK: prfm pstl3keep, [x2] ; encoding: [0x54,0x00,0x80,0xf9] +; CHECK: prfm pstl3strm, [x2] ; encoding: [0x55,0x00,0x80,0xf9] +; CHECK: prfm pstl3strm, [x4, x5, lsl #3] ; encoding: [0x95,0x78,0xa5,0xf8] + +;----------------------------------------------------------------------------- +; Indexed stores +;----------------------------------------------------------------------------- + + str x4, [x3] + str x2, [sp, #32] + str w5, [x4, #20] + str b5, [sp, #1] + str h6, [sp, #2] + str s7, [sp, #4] + str d8, [sp, #8] + str q9, [sp, #16] + strb w4, [x3] + strb w5, [x4, #20] + strh w2, [sp, #32] + +; CHECK: str x4, [x3] ; encoding: [0x64,0x00,0x00,0xf9] +; CHECK: str x2, [sp, #32] ; encoding: [0xe2,0x13,0x00,0xf9] +; CHECK: str w5, [x4, #20] ; encoding: [0x85,0x14,0x00,0xb9] +; CHECK: str b5, [sp, #1] ; encoding: [0xe5,0x07,0x00,0x3d] +; CHECK: str h6, [sp, #2] ; encoding: [0xe6,0x07,0x00,0x7d] +; CHECK: str s7, [sp, #4] ; encoding: [0xe7,0x07,0x00,0xbd] +; CHECK: str d8, [sp, #8] ; encoding: [0xe8,0x07,0x00,0xfd] +; CHECK: str q9, [sp, #16] ; encoding: [0xe9,0x07,0x80,0x3d] +; CHECK: strb w4, [x3] ; encoding: [0x64,0x00,0x00,0x39] +; CHECK: strb w5, [x4, #20] ; encoding: [0x85,0x50,0x00,0x39] +; CHECK: strh w2, [sp, #32] ; encoding: [0xe2,0x43,0x00,0x79] + +;----------------------------------------------------------------------------- +; Unscaled immediate loads and stores +;----------------------------------------------------------------------------- + + ldur w2, [x3] + ldur w2, [sp, #24] + ldur x2, [x3] + ldur x2, [sp, #24] + ldur b5, [sp, #1] + ldur h6, [sp, #2] + ldur s7, [sp, #4] + ldur d8, [sp, #8] + ldur q9, [sp, #16] + ldursb w9, [x3] + ldursb x2, [sp, #128] + ldursh w3, [sp, #32] + ldursh x5, [x9, #24] + ldursw x9, [sp, #-128] + +; CHECK: ldur w2, [x3] ; encoding: [0x62,0x00,0x40,0xb8] +; CHECK: ldur w2, [sp, #24] ; encoding: [0xe2,0x83,0x41,0xb8] +; CHECK: ldur x2, [x3] ; encoding: [0x62,0x00,0x40,0xf8] +; CHECK: ldur x2, [sp, #24] ; encoding: [0xe2,0x83,0x41,0xf8] +; CHECK: ldur b5, [sp, #1] ; encoding: [0xe5,0x13,0x40,0x3c] +; CHECK: ldur h6, [sp, #2] ; encoding: [0xe6,0x23,0x40,0x7c] +; CHECK: ldur s7, [sp, #4] ; encoding: [0xe7,0x43,0x40,0xbc] +; CHECK: ldur d8, [sp, #8] ; encoding: [0xe8,0x83,0x40,0xfc] +; CHECK: ldur q9, [sp, #16] ; encoding: [0xe9,0x03,0xc1,0x3c] +; CHECK: ldursb w9, [x3] ; encoding: [0x69,0x00,0xc0,0x38] +; CHECK: ldursb x2, [sp, #128] ; encoding: [0xe2,0x03,0x88,0x38] +; CHECK: ldursh w3, [sp, #32] ; encoding: [0xe3,0x03,0xc2,0x78] +; CHECK: ldursh x5, [x9, #24] ; encoding: [0x25,0x81,0x81,0x78] +; CHECK: ldursw x9, [sp, #-128] ; encoding: [0xe9,0x03,0x98,0xb8] + + stur w4, [x3] + stur w2, [sp, #32] + stur x4, [x3] + stur x2, [sp, #32] + stur w5, [x4, #20] + stur b5, [sp, #1] + stur h6, [sp, #2] + stur s7, [sp, #4] + stur d8, [sp, #8] + stur q9, [sp, #16] + sturb w4, [x3] + sturb w5, [x4, #20] + sturh w2, [sp, #32] + prfum #5, [sp, #32] + +; CHECK: stur w4, [x3] ; encoding: [0x64,0x00,0x00,0xb8] +; CHECK: stur w2, [sp, #32] ; encoding: [0xe2,0x03,0x02,0xb8] +; CHECK: stur x4, [x3] ; encoding: [0x64,0x00,0x00,0xf8] +; CHECK: stur x2, [sp, #32] ; encoding: [0xe2,0x03,0x02,0xf8] +; CHECK: stur w5, [x4, #20] ; encoding: [0x85,0x40,0x01,0xb8] +; CHECK: stur b5, [sp, #1] ; encoding: [0xe5,0x13,0x00,0x3c] +; CHECK: stur h6, [sp, #2] ; encoding: [0xe6,0x23,0x00,0x7c] +; CHECK: stur s7, [sp, #4] ; encoding: [0xe7,0x43,0x00,0xbc] +; CHECK: stur d8, [sp, #8] ; encoding: [0xe8,0x83,0x00,0xfc] +; CHECK: stur q9, [sp, #16] ; encoding: [0xe9,0x03,0x81,0x3c] +; CHECK: sturb w4, [x3] ; encoding: [0x64,0x00,0x00,0x38] +; CHECK: sturb w5, [x4, #20] ; encoding: [0x85,0x40,0x01,0x38] +; CHECK: sturh w2, [sp, #32] ; encoding: [0xe2,0x03,0x02,0x78] +; CHECK: prfum pldl3strm, [sp, #32] ; encoding: [0xe5,0x03,0x82,0xf8] + +;----------------------------------------------------------------------------- +; Unprivileged loads and stores +;----------------------------------------------------------------------------- + + ldtr w3, [x4, #16] + ldtr x3, [x4, #16] + ldtrb w3, [x4, #16] + ldtrsb w9, [x3] + ldtrsb x2, [sp, #128] + ldtrh w3, [x4, #16] + ldtrsh w3, [sp, #32] + ldtrsh x5, [x9, #24] + ldtrsw x9, [sp, #-128] + +; CHECK: ldtr w3, [x4, #16] ; encoding: [0x83,0x08,0x41,0xb8] +; CHECK: ldtr x3, [x4, #16] ; encoding: [0x83,0x08,0x41,0xf8] +; CHECK: ldtrb w3, [x4, #16] ; encoding: [0x83,0x08,0x41,0x38] +; CHECK: ldtrsb w9, [x3] ; encoding: [0x69,0x08,0xc0,0x38] +; CHECK: ldtrsb x2, [sp, #128] ; encoding: [0xe2,0x0b,0x88,0x38] +; CHECK: ldtrh w3, [x4, #16] ; encoding: [0x83,0x08,0x41,0x78] +; CHECK: ldtrsh w3, [sp, #32] ; encoding: [0xe3,0x0b,0xc2,0x78] +; CHECK: ldtrsh x5, [x9, #24] ; encoding: [0x25,0x89,0x81,0x78] +; CHECK: ldtrsw x9, [sp, #-128] ; encoding: [0xe9,0x0b,0x98,0xb8] + + sttr w5, [x4, #20] + sttr x4, [x3] + sttr x2, [sp, #32] + sttrb w4, [x3] + sttrb w5, [x4, #20] + sttrh w2, [sp, #32] + +; CHECK: sttr w5, [x4, #20] ; encoding: [0x85,0x48,0x01,0xb8] +; CHECK: sttr x4, [x3] ; encoding: [0x64,0x08,0x00,0xf8] +; CHECK: sttr x2, [sp, #32] ; encoding: [0xe2,0x0b,0x02,0xf8] +; CHECK: sttrb w4, [x3] ; encoding: [0x64,0x08,0x00,0x38] +; CHECK: sttrb w5, [x4, #20] ; encoding: [0x85,0x48,0x01,0x38] +; CHECK: sttrh w2, [sp, #32] ; encoding: [0xe2,0x0b,0x02,0x78] + +;----------------------------------------------------------------------------- +; Pre-indexed loads and stores +;----------------------------------------------------------------------------- + + ldr fp, [x7, #8]! + ldr lr, [x7, #8]! + ldr b5, [x0, #1]! + ldr h6, [x0, #2]! + ldr s7, [x0, #4]! + ldr d8, [x0, #8]! + ldr q9, [x0, #16]! + + str lr, [x7, #-8]! + str fp, [x7, #-8]! + str b5, [x0, #-1]! + str h6, [x0, #-2]! + str s7, [x0, #-4]! + str d8, [x0, #-8]! + str q9, [x0, #-16]! + +; CHECK: ldr fp, [x7, #8]! ; encoding: [0xfd,0x8c,0x40,0xf8] +; CHECK: ldr lr, [x7, #8]! ; encoding: [0xfe,0x8c,0x40,0xf8] +; CHECK: ldr b5, [x0, #1]! ; encoding: [0x05,0x1c,0x40,0x3c] +; CHECK: ldr h6, [x0, #2]! ; encoding: [0x06,0x2c,0x40,0x7c] +; CHECK: ldr s7, [x0, #4]! ; encoding: [0x07,0x4c,0x40,0xbc] +; CHECK: ldr d8, [x0, #8]! ; encoding: [0x08,0x8c,0x40,0xfc] +; CHECK: ldr q9, [x0, #16]! ; encoding: [0x09,0x0c,0xc1,0x3c] + +; CHECK: str lr, [x7, #-8]! ; encoding: [0xfe,0x8c,0x1f,0xf8] +; CHECK: str fp, [x7, #-8]! ; encoding: [0xfd,0x8c,0x1f,0xf8] +; CHECK: str b5, [x0, #-1]! ; encoding: [0x05,0xfc,0x1f,0x3c] +; CHECK: str h6, [x0, #-2]! ; encoding: [0x06,0xec,0x1f,0x7c] +; CHECK: str s7, [x0, #-4]! ; encoding: [0x07,0xcc,0x1f,0xbc] +; CHECK: str d8, [x0, #-8]! ; encoding: [0x08,0x8c,0x1f,0xfc] +; CHECK: str q9, [x0, #-16]! ; encoding: [0x09,0x0c,0x9f,0x3c] + +;----------------------------------------------------------------------------- +; post-indexed loads and stores +;----------------------------------------------------------------------------- + str lr, [x7], #-8 + str fp, [x7], #-8 + str b5, [x0], #-1 + str h6, [x0], #-2 + str s7, [x0], #-4 + str d8, [x0], #-8 + str q9, [x0], #-16 + + ldr fp, [x7], #8 + ldr lr, [x7], #8 + ldr b5, [x0], #1 + ldr h6, [x0], #2 + ldr s7, [x0], #4 + ldr d8, [x0], #8 + ldr q9, [x0], #16 + +; CHECK: str lr, [x7], #-8 ; encoding: [0xfe,0x84,0x1f,0xf8] +; CHECK: str fp, [x7], #-8 ; encoding: [0xfd,0x84,0x1f,0xf8] +; CHECK: str b5, [x0], #-1 ; encoding: [0x05,0xf4,0x1f,0x3c] +; CHECK: str h6, [x0], #-2 ; encoding: [0x06,0xe4,0x1f,0x7c] +; CHECK: str s7, [x0], #-4 ; encoding: [0x07,0xc4,0x1f,0xbc] +; CHECK: str d8, [x0], #-8 ; encoding: [0x08,0x84,0x1f,0xfc] +; CHECK: str q9, [x0], #-16 ; encoding: [0x09,0x04,0x9f,0x3c] + +; CHECK: ldr fp, [x7], #8 ; encoding: [0xfd,0x84,0x40,0xf8] +; CHECK: ldr lr, [x7], #8 ; encoding: [0xfe,0x84,0x40,0xf8] +; CHECK: ldr b5, [x0], #1 ; encoding: [0x05,0x14,0x40,0x3c] +; CHECK: ldr h6, [x0], #2 ; encoding: [0x06,0x24,0x40,0x7c] +; CHECK: ldr s7, [x0], #4 ; encoding: [0x07,0x44,0x40,0xbc] +; CHECK: ldr d8, [x0], #8 ; encoding: [0x08,0x84,0x40,0xfc] +; CHECK: ldr q9, [x0], #16 ; encoding: [0x09,0x04,0xc1,0x3c] + +;----------------------------------------------------------------------------- +; Load/Store pair (indexed, offset) +;----------------------------------------------------------------------------- + + ldp w3, w2, [x15, #16] + ldp x4, x9, [sp, #-16] + ldpsw x2, x3, [x14, #16] + ldpsw x2, x3, [sp, #-16] + ldp s10, s1, [x2, #64] + ldp d10, d1, [x2] + ldp q2, q3, [x0, #32] + +; CHECK: ldp w3, w2, [x15, #16] ; encoding: [0xe3,0x09,0x42,0x29] +; CHECK: ldp x4, x9, [sp, #-16] ; encoding: [0xe4,0x27,0x7f,0xa9] +; CHECK: ldpsw x2, x3, [x14, #16] ; encoding: [0xc2,0x0d,0x42,0x69] +; CHECK: ldpsw x2, x3, [sp, #-16] ; encoding: [0xe2,0x0f,0x7e,0x69] +; CHECK: ldp s10, s1, [x2, #64] ; encoding: [0x4a,0x04,0x48,0x2d] +; CHECK: ldp d10, d1, [x2] ; encoding: [0x4a,0x04,0x40,0x6d] +; CHECK: ldp q2, q3, [x0, #32] ; encoding: [0x02,0x0c,0x41,0xad] + + stp w3, w2, [x15, #16] + stp x4, x9, [sp, #-16] + stp s10, s1, [x2, #64] + stp d10, d1, [x2] + stp q2, q3, [x0, #32] + +; CHECK: stp w3, w2, [x15, #16] ; encoding: [0xe3,0x09,0x02,0x29] +; CHECK: stp x4, x9, [sp, #-16] ; encoding: [0xe4,0x27,0x3f,0xa9] +; CHECK: stp s10, s1, [x2, #64] ; encoding: [0x4a,0x04,0x08,0x2d] +; CHECK: stp d10, d1, [x2] ; encoding: [0x4a,0x04,0x00,0x6d] +; CHECK: stp q2, q3, [x0, #32] ; encoding: [0x02,0x0c,0x01,0xad] + +;----------------------------------------------------------------------------- +; Load/Store pair (pre-indexed) +;----------------------------------------------------------------------------- + + ldp w3, w2, [x15, #16]! + ldp x4, x9, [sp, #-16]! + ldpsw x2, x3, [x14, #16]! + ldpsw x2, x3, [sp, #-16]! + ldp s10, s1, [x2, #64]! + ldp d10, d1, [x2, #16]! + +; CHECK: ldp w3, w2, [x15, #16]! ; encoding: [0xe3,0x09,0xc2,0x29] +; CHECK: ldp x4, x9, [sp, #-16]! ; encoding: [0xe4,0x27,0xff,0xa9] +; CHECK: ldpsw x2, x3, [x14, #16]! ; encoding: [0xc2,0x0d,0xc2,0x69] +; CHECK: ldpsw x2, x3, [sp, #-16]! ; encoding: [0xe2,0x0f,0xfe,0x69] +; CHECK: ldp s10, s1, [x2, #64]! ; encoding: [0x4a,0x04,0xc8,0x2d] +; CHECK: ldp d10, d1, [x2, #16]! ; encoding: [0x4a,0x04,0xc1,0x6d] + + stp w3, w2, [x15, #16]! + stp x4, x9, [sp, #-16]! + stp s10, s1, [x2, #64]! + stp d10, d1, [x2, #16]! + +; CHECK: stp w3, w2, [x15, #16]! ; encoding: [0xe3,0x09,0x82,0x29] +; CHECK: stp x4, x9, [sp, #-16]! ; encoding: [0xe4,0x27,0xbf,0xa9] +; CHECK: stp s10, s1, [x2, #64]! ; encoding: [0x4a,0x04,0x88,0x2d] +; CHECK: stp d10, d1, [x2, #16]! ; encoding: [0x4a,0x04,0x81,0x6d] + +;----------------------------------------------------------------------------- +; Load/Store pair (post-indexed) +;----------------------------------------------------------------------------- + + ldp w3, w2, [x15], #16 + ldp x4, x9, [sp], #-16 + ldpsw x2, x3, [x14], #16 + ldpsw x2, x3, [sp], #-16 + ldp s10, s1, [x2], #64 + ldp d10, d1, [x2], #16 + +; CHECK: ldp w3, w2, [x15], #16 ; encoding: [0xe3,0x09,0xc2,0x28] +; CHECK: ldp x4, x9, [sp], #-16 ; encoding: [0xe4,0x27,0xff,0xa8] +; CHECK: ldpsw x2, x3, [x14], #16 ; encoding: [0xc2,0x0d,0xc2,0x68] +; CHECK: ldpsw x2, x3, [sp], #-16 ; encoding: [0xe2,0x0f,0xfe,0x68] +; CHECK: ldp s10, s1, [x2], #64 ; encoding: [0x4a,0x04,0xc8,0x2c] +; CHECK: ldp d10, d1, [x2], #16 ; encoding: [0x4a,0x04,0xc1,0x6c] + + stp w3, w2, [x15], #16 + stp x4, x9, [sp], #-16 + stp s10, s1, [x2], #64 + stp d10, d1, [x2], #16 + +; CHECK: stp w3, w2, [x15], #16 ; encoding: [0xe3,0x09,0x82,0x28] +; CHECK: stp x4, x9, [sp], #-16 ; encoding: [0xe4,0x27,0xbf,0xa8] +; CHECK: stp s10, s1, [x2], #64 ; encoding: [0x4a,0x04,0x88,0x2c] +; CHECK: stp d10, d1, [x2], #16 ; encoding: [0x4a,0x04,0x81,0x6c] + +;----------------------------------------------------------------------------- +; Load/Store pair (no-allocate) +;----------------------------------------------------------------------------- + + ldnp w3, w2, [x15, #16] + ldnp x4, x9, [sp, #-16] + ldnp s10, s1, [x2, #64] + ldnp d10, d1, [x2] + +; CHECK: ldnp w3, w2, [x15, #16] ; encoding: [0xe3,0x09,0x42,0x28] +; CHECK: ldnp x4, x9, [sp, #-16] ; encoding: [0xe4,0x27,0x7f,0xa8] +; CHECK: ldnp s10, s1, [x2, #64] ; encoding: [0x4a,0x04,0x48,0x2c] +; CHECK: ldnp d10, d1, [x2] ; encoding: [0x4a,0x04,0x40,0x6c] + + stnp w3, w2, [x15, #16] + stnp x4, x9, [sp, #-16] + stnp s10, s1, [x2, #64] + stnp d10, d1, [x2] + +; CHECK: stnp w3, w2, [x15, #16] ; encoding: [0xe3,0x09,0x02,0x28] +; CHECK: stnp x4, x9, [sp, #-16] ; encoding: [0xe4,0x27,0x3f,0xa8] +; CHECK: stnp s10, s1, [x2, #64] ; encoding: [0x4a,0x04,0x08,0x2c] +; CHECK: stnp d10, d1, [x2] ; encoding: [0x4a,0x04,0x00,0x6c] + +;----------------------------------------------------------------------------- +; Load/Store register offset +;----------------------------------------------------------------------------- + + ldr w0, [x0, x0] + ldr w0, [x0, x0, lsl #2] + ldr x0, [x0, x0] + ldr x0, [x0, x0, lsl #3] + ldr x0, [x0, x0, sxtx] + +; CHECK: ldr w0, [x0, x0] ; encoding: [0x00,0x68,0x60,0xb8] +; CHECK: ldr w0, [x0, x0, lsl #2] ; encoding: [0x00,0x78,0x60,0xb8] +; CHECK: ldr x0, [x0, x0] ; encoding: [0x00,0x68,0x60,0xf8] +; CHECK: ldr x0, [x0, x0, lsl #3] ; encoding: [0x00,0x78,0x60,0xf8] +; CHECK: ldr x0, [x0, x0, sxtx] ; encoding: [0x00,0xe8,0x60,0xf8] + + ldr b1, [x1, x2] + ldr b1, [x1, x2, lsl #0] + ldr h1, [x1, x2] + ldr h1, [x1, x2, lsl #1] + ldr s1, [x1, x2] + ldr s1, [x1, x2, lsl #2] + ldr d1, [x1, x2] + ldr d1, [x1, x2, lsl #3] + ldr q1, [x1, x2] + ldr q1, [x1, x2, lsl #4] + +; CHECK: ldr b1, [x1, x2] ; encoding: [0x21,0x68,0x62,0x3c] +; CHECK: ldr b1, [x1, x2, lsl #0] ; encoding: [0x21,0x78,0x62,0x3c] +; CHECK: ldr h1, [x1, x2] ; encoding: [0x21,0x68,0x62,0x7c] +; CHECK: ldr h1, [x1, x2, lsl #1] ; encoding: [0x21,0x78,0x62,0x7c] +; CHECK: ldr s1, [x1, x2] ; encoding: [0x21,0x68,0x62,0xbc] +; CHECK: ldr s1, [x1, x2, lsl #2] ; encoding: [0x21,0x78,0x62,0xbc] +; CHECK: ldr d1, [x1, x2] ; encoding: [0x21,0x68,0x62,0xfc] +; CHECK: ldr d1, [x1, x2, lsl #3] ; encoding: [0x21,0x78,0x62,0xfc] +; CHECK: ldr q1, [x1, x2] ; encoding: [0x21,0x68,0xe2,0x3c] +; CHECK: ldr q1, [x1, x2, lsl #4] ; encoding: [0x21,0x78,0xe2,0x3c] + + str d1, [sp, x3] + str d1, [sp, x3, uxtw #3] + str q1, [sp, x3] + str q1, [sp, x3, uxtw #4] + +; CHECK: str d1, [sp, x3] ; encoding: [0xe1,0x6b,0x23,0xfc] +; CHECK: str d1, [sp, x3, uxtw #3] ; encoding: [0xe1,0x5b,0x23,0xfc] +; CHECK: str q1, [sp, x3] ; encoding: [0xe1,0x6b,0xa3,0x3c] +; CHECK: str q1, [sp, x3, uxtw #4] ; encoding: [0xe1,0x5b,0xa3,0x3c] + +;----------------------------------------------------------------------------- +; Load literal +;----------------------------------------------------------------------------- + + ldr w5, foo + ldr x4, foo + ldrsw x9, foo + prfm #5, foo + +; CHECK: ldr w5, foo ; encoding: [0bAAA00101,A,A,0x18] +; CHECK: ldr x4, foo ; encoding: [0bAAA00100,A,A,0x58] +; CHECK: ldrsw x9, foo ; encoding: [0bAAA01001,A,A,0x98] +; CHECK: prfm pldl3strm, foo ; encoding: [0bAAA00101,A,A,0xd8] + +;----------------------------------------------------------------------------- +; Load/Store exclusive +;----------------------------------------------------------------------------- + + ldxr w6, [x1] + ldxr x6, [x1] + ldxrb w6, [x1] + ldxrh w6, [x1] + ldxp w7, w3, [x9] + ldxp x7, x3, [x9] + +; CHECK: ldxrb w6, [x1] ; encoding: [0x26,0x7c,0x5f,0x08] +; CHECK: ldxrh w6, [x1] ; encoding: [0x26,0x7c,0x5f,0x48] +; CHECK: ldxp w7, w3, [x9] ; encoding: [0x27,0x0d,0x7f,0x88] +; CHECK: ldxp x7, x3, [x9] ; encoding: [0x27,0x0d,0x7f,0xc8] + + stxr w1, x4, [x3] + stxr w1, w4, [x3] + stxrb w1, w4, [x3] + stxrh w1, w4, [x3] + stxp w1, x2, x6, [x1] + stxp w1, w2, w6, [x1] + +; CHECK: stxr w1, x4, [x3] ; encoding: [0x64,0x7c,0x01,0xc8] +; CHECK: stxr w1, w4, [x3] ; encoding: [0x64,0x7c,0x01,0x88] +; CHECK: stxrb w1, w4, [x3] ; encoding: [0x64,0x7c,0x01,0x08] +; CHECK: stxrh w1, w4, [x3] ; encoding: [0x64,0x7c,0x01,0x48] +; CHECK: stxp w1, x2, x6, [x1] ; encoding: [0x22,0x18,0x21,0xc8] +; CHECK: stxp w1, w2, w6, [x1] ; encoding: [0x22,0x18,0x21,0x88] + +;----------------------------------------------------------------------------- +; Load-acquire/Store-release non-exclusive +;----------------------------------------------------------------------------- + + ldar w4, [sp] + ldar x4, [sp, #0] + ldarb w4, [sp] + ldarh w4, [sp] + +; CHECK: ldar w4, [sp] ; encoding: [0xe4,0xff,0xdf,0x88] +; CHECK: ldar x4, [sp] ; encoding: [0xe4,0xff,0xdf,0xc8] +; CHECK: ldarb w4, [sp] ; encoding: [0xe4,0xff,0xdf,0x08] +; CHECK: ldarh w4, [sp] ; encoding: [0xe4,0xff,0xdf,0x48] + + stlr w3, [x6] + stlr x3, [x6] + stlrb w3, [x6] + stlrh w3, [x6] + +; CHECK: stlr w3, [x6] ; encoding: [0xc3,0xfc,0x9f,0x88] +; CHECK: stlr x3, [x6] ; encoding: [0xc3,0xfc,0x9f,0xc8] +; CHECK: stlrb w3, [x6] ; encoding: [0xc3,0xfc,0x9f,0x08] +; CHECK: stlrh w3, [x6] ; encoding: [0xc3,0xfc,0x9f,0x48] + +;----------------------------------------------------------------------------- +; Load-acquire/Store-release exclusive +;----------------------------------------------------------------------------- + + ldaxr w2, [x4] + ldaxr x2, [x4] + ldaxrb w2, [x4, #0] + ldaxrh w2, [x4] + ldaxp w2, w6, [x1] + ldaxp x2, x6, [x1] + +; CHECK: ldaxr w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x88] +; CHECK: ldaxr x2, [x4] ; encoding: [0x82,0xfc,0x5f,0xc8] +; CHECK: ldaxrb w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x08] +; CHECK: ldaxrh w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x48] +; CHECK: ldaxp w2, w6, [x1] ; encoding: [0x22,0x98,0x7f,0x88] +; CHECK: ldaxp x2, x6, [x1] ; encoding: [0x22,0x98,0x7f,0xc8] + + stlxr w8, x7, [x1] + stlxr w8, w7, [x1] + stlxrb w8, w7, [x1] + stlxrh w8, w7, [x1] + stlxp w1, x2, x6, [x1] + stlxp w1, w2, w6, [x1] + +; CHECK: stlxr w8, x7, [x1] ; encoding: [0x27,0xfc,0x08,0xc8] +; CHECK: stlxr w8, w7, [x1] ; encoding: [0x27,0xfc,0x08,0x88] +; CHECK: stlxrb w8, w7, [x1] ; encoding: [0x27,0xfc,0x08,0x08] +; CHECK: stlxrh w8, w7, [x1] ; encoding: [0x27,0xfc,0x08,0x48] +; CHECK: stlxp w1, x2, x6, [x1] ; encoding: [0x22,0x98,0x21,0xc8] +; CHECK: stlxp w1, w2, w6, [x1] ; encoding: [0x22,0x98,0x21,0x88] + + +;----------------------------------------------------------------------------- +; LDUR/STUR aliases for negative and unaligned LDR/STR instructions. +; +; According to the ARM ISA documentation: +; "A programmer-friendly assembler should also generate these instructions +; in response to the standard LDR/STR mnemonics when the immediate offset is +; unambiguous, i.e. negative or unaligned." +;----------------------------------------------------------------------------- + + ldr x11, [fp, #-8] + ldr x11, [fp, #7] + ldr w0, [x0, #2] + ldr w0, [x0, #-256] + ldr b2, [x1, #-2] + ldr h3, [x2, #3] + ldr h3, [x3, #-4] + ldr s3, [x4, #3] + ldr s3, [x5, #-4] + ldr d4, [x6, #4] + ldr d4, [x7, #-8] + ldr q5, [x8, #8] + ldr q5, [x9, #-16] + +; CHECK: ldur x11, [fp, #-8] ; encoding: [0xab,0x83,0x5f,0xf8] +; CHECK: ldur x11, [fp, #7] ; encoding: [0xab,0x73,0x40,0xf8] +; CHECK: ldur w0, [x0, #2] ; encoding: [0x00,0x20,0x40,0xb8] +; CHECK: ldur w0, [x0, #-256] ; encoding: [0x00,0x00,0x50,0xb8] +; CHECK: ldur b2, [x1, #-2] ; encoding: [0x22,0xe0,0x5f,0x3c] +; CHECK: ldur h3, [x2, #3] ; encoding: [0x43,0x30,0x40,0x7c] +; CHECK: ldur h3, [x3, #-4] ; encoding: [0x63,0xc0,0x5f,0x7c] +; CHECK: ldur s3, [x4, #3] ; encoding: [0x83,0x30,0x40,0xbc] +; CHECK: ldur s3, [x5, #-4] ; encoding: [0xa3,0xc0,0x5f,0xbc] +; CHECK: ldur d4, [x6, #4] ; encoding: [0xc4,0x40,0x40,0xfc] +; CHECK: ldur d4, [x7, #-8] ; encoding: [0xe4,0x80,0x5f,0xfc] +; CHECK: ldur q5, [x8, #8] ; encoding: [0x05,0x81,0xc0,0x3c] +; CHECK: ldur q5, [x9, #-16] ; encoding: [0x25,0x01,0xdf,0x3c] + + str x11, [fp, #-8] + str x11, [fp, #7] + str w0, [x0, #2] + str w0, [x0, #-256] + str b2, [x1, #-2] + str h3, [x2, #3] + str h3, [x3, #-4] + str s3, [x4, #3] + str s3, [x5, #-4] + str d4, [x6, #4] + str d4, [x7, #-8] + str q5, [x8, #8] + str q5, [x9, #-16] + +; CHECK: stur x11, [fp, #-8] ; encoding: [0xab,0x83,0x1f,0xf8] +; CHECK: stur x11, [fp, #7] ; encoding: [0xab,0x73,0x00,0xf8] +; CHECK: stur w0, [x0, #2] ; encoding: [0x00,0x20,0x00,0xb8] +; CHECK: stur w0, [x0, #-256] ; encoding: [0x00,0x00,0x10,0xb8] +; CHECK: stur b2, [x1, #-2] ; encoding: [0x22,0xe0,0x1f,0x3c] +; CHECK: stur h3, [x2, #3] ; encoding: [0x43,0x30,0x00,0x7c] +; CHECK: stur h3, [x3, #-4] ; encoding: [0x63,0xc0,0x1f,0x7c] +; CHECK: stur s3, [x4, #3] ; encoding: [0x83,0x30,0x00,0xbc] +; CHECK: stur s3, [x5, #-4] ; encoding: [0xa3,0xc0,0x1f,0xbc] +; CHECK: stur d4, [x6, #4] ; encoding: [0xc4,0x40,0x00,0xfc] +; CHECK: stur d4, [x7, #-8] ; encoding: [0xe4,0x80,0x1f,0xfc] +; CHECK: stur q5, [x8, #8] ; encoding: [0x05,0x81,0x80,0x3c] +; CHECK: stur q5, [x9, #-16] ; encoding: [0x25,0x01,0x9f,0x3c] + + ldrb w3, [x1, #-1] + ldrh w4, [x2, #1] + ldrh w5, [x3, #-1] + ldrsb w6, [x4, #-1] + ldrsb x7, [x5, #-1] + ldrsh w8, [x6, #1] + ldrsh w9, [x7, #-1] + ldrsh x1, [x8, #1] + ldrsh x2, [x9, #-1] + ldrsw x3, [x10, #10] + ldrsw x4, [x11, #-1] + +; CHECK: ldurb w3, [x1, #-1] ; encoding: [0x23,0xf0,0x5f,0x38] +; CHECK: ldurh w4, [x2, #1] ; encoding: [0x44,0x10,0x40,0x78] +; CHECK: ldurh w5, [x3, #-1] ; encoding: [0x65,0xf0,0x5f,0x78] +; CHECK: ldursb w6, [x4, #-1] ; encoding: [0x86,0xf0,0xdf,0x38] +; CHECK: ldursb x7, [x5, #-1] ; encoding: [0xa7,0xf0,0x9f,0x38] +; CHECK: ldursh w8, [x6, #1] ; encoding: [0xc8,0x10,0xc0,0x78] +; CHECK: ldursh w9, [x7, #-1] ; encoding: [0xe9,0xf0,0xdf,0x78] +; CHECK: ldursh x1, [x8, #1] ; encoding: [0x01,0x11,0x80,0x78] +; CHECK: ldursh x2, [x9, #-1] ; encoding: [0x22,0xf1,0x9f,0x78] +; CHECK: ldursw x3, [x10, #10] ; encoding: [0x43,0xa1,0x80,0xb8] +; CHECK: ldursw x4, [x11, #-1] ; encoding: [0x64,0xf1,0x9f,0xb8] + + strb w3, [x1, #-1] + strh w4, [x2, #1] + strh w5, [x3, #-1] + +; CHECK: sturb w3, [x1, #-1] ; encoding: [0x23,0xf0,0x1f,0x38] +; CHECK: sturh w4, [x2, #1] ; encoding: [0x44,0x10,0x00,0x78] +; CHECK: sturh w5, [x3, #-1] ; encoding: [0x65,0xf0,0x1f,0x78] diff --git a/test/MC/ARM64/separator.s b/test/MC/ARM64/separator.s new file mode 100644 index 0000000000..18f34b99a0 --- /dev/null +++ b/test/MC/ARM64/separator.s @@ -0,0 +1,20 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s + +; ARM64 uses a multi-character statment separator, "%%". Check that we lex +; it properly and recognize the multiple assembly statements on the line. + +; To make sure the output assembly correctly handled the instructions, +; tell it to show encodings. That will result in the two 'mov' instructions +; being on separate lines in the output. We look for the "; encoding" string +; to verify that. For this test, we don't care what the encoding is, just that +; there is one for each 'mov' instruction. + + +_foo: +; CHECK: foo +; CHECK: mov x0, x1 ; encoding +; CHECK: mov x1, x0 ; encoding + mov x0, x1 %% mov x1, x0 + ret lr + + diff --git a/test/MC/ARM64/simd-ldst.s b/test/MC/ARM64/simd-ldst.s new file mode 100644 index 0000000000..a754c7231e --- /dev/null +++ b/test/MC/ARM64/simd-ldst.s @@ -0,0 +1,2404 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 -show-encoding < %s | FileCheck %s + +_ld1st1_multiple: + ld1.8b {v0}, [x1] + ld1.8b {v0, v1}, [x1] + ld1.8b {v0, v1, v2}, [x1] + ld1.8b {v0, v1, v2, v3}, [x1] + + ld1.8b {v3}, [x1] + ld1.8b {v3, v4}, [x2] + ld1.8b {v4, v5, v6}, [x3] + ld1.8b {v7, v8, v9, v10}, [x4] + + ld1.16b {v0}, [x1] + ld1.16b {v0, v1}, [x1] + ld1.16b {v0, v1, v2}, [x1] + ld1.16b {v0, v1, v2, v3}, [x1] + + ld1.4h {v0}, [x1] + ld1.4h {v0, v1}, [x1] + ld1.4h {v0, v1, v2}, [x1] + ld1.4h {v0, v1, v2, v3}, [x1] + + ld1.8h {v0}, [x1] + ld1.8h {v0, v1}, [x1] + ld1.8h {v0, v1, v2}, [x1] + ld1.8h {v0, v1, v2, v3}, [x1] + + ld1.2s {v0}, [x1] + ld1.2s {v0, v1}, [x1] + ld1.2s {v0, v1, v2}, [x1] + ld1.2s {v0, v1, v2, v3}, [x1] + + ld1.4s {v0}, [x1] + ld1.4s {v0, v1}, [x1] + ld1.4s {v0, v1, v2}, [x1] + ld1.4s {v0, v1, v2, v3}, [x1] + + ld1.1d {v0}, [x1] + ld1.1d {v0, v1}, [x1] + ld1.1d {v0, v1, v2}, [x1] + ld1.1d {v0, v1, v2, v3}, [x1] + + ld1.2d {v0}, [x1] + ld1.2d {v0, v1}, [x1] + ld1.2d {v0, v1, v2}, [x1] + ld1.2d {v0, v1, v2, v3}, [x1] + + st1.8b {v0}, [x1] + st1.8b {v0, v1}, [x1] + st1.8b {v0, v1, v2}, [x1] + st1.8b {v0, v1, v2, v3}, [x1] + + st1.16b {v0}, [x1] + st1.16b {v0, v1}, [x1] + st1.16b {v0, v1, v2}, [x1] + st1.16b {v0, v1, v2, v3}, [x1] + + st1.4h {v0}, [x1] + st1.4h {v0, v1}, [x1] + st1.4h {v0, v1, v2}, [x1] + st1.4h {v0, v1, v2, v3}, [x1] + + st1.8h {v0}, [x1] + st1.8h {v0, v1}, [x1] + st1.8h {v0, v1, v2}, [x1] + st1.8h {v0, v1, v2, v3}, [x1] + + st1.2s {v0}, [x1] + st1.2s {v0, v1}, [x1] + st1.2s {v0, v1, v2}, [x1] + st1.2s {v0, v1, v2, v3}, [x1] + + st1.4s {v0}, [x1] + st1.4s {v0, v1}, [x1] + st1.4s {v0, v1, v2}, [x1] + st1.4s {v0, v1, v2, v3}, [x1] + + st1.1d {v0}, [x1] + st1.1d {v0, v1}, [x1] + st1.1d {v0, v1, v2}, [x1] + st1.1d {v0, v1, v2, v3}, [x1] + + st1.2d {v0}, [x1] + st1.2d {v0, v1}, [x1] + st1.2d {v0, v1, v2}, [x1] + st1.2d {v0, v1, v2, v3}, [x1] + + st1.2d {v5}, [x1] + st1.2d {v7, v8}, [x10] + st1.2d {v11, v12, v13}, [x1] + st1.2d {v28, v29, v30, v31}, [x13] + +; CHECK: _ld1st1_multiple: +; CHECK: ld1.8b { v0 }, [x1] ; encoding: [0x20,0x70,0x40,0x0c] +; CHECK: ld1.8b { v0, v1 }, [x1] ; encoding: [0x20,0xa0,0x40,0x0c] +; CHECK: ld1.8b { v0, v1, v2 }, [x1] ; encoding: [0x20,0x60,0x40,0x0c] +; CHECK: ld1.8b { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x20,0x40,0x0c] + +; CHECK: ld1.8b { v3 }, [x1] ; encoding: [0x23,0x70,0x40,0x0c] +; CHECK: ld1.8b { v3, v4 }, [x2] ; encoding: [0x43,0xa0,0x40,0x0c] +; CHECK: ld1.8b { v4, v5, v6 }, [x3] ; encoding: [0x64,0x60,0x40,0x0c] +; CHECK: ld1.8b { v7, v8, v9, v10 }, [x4] ; encoding: [0x87,0x20,0x40,0x0c] + +; CHECK: ld1.16b { v0 }, [x1] ; encoding: [0x20,0x70,0x40,0x4c] +; CHECK: ld1.16b { v0, v1 }, [x1] ; encoding: [0x20,0xa0,0x40,0x4c] +; CHECK: ld1.16b { v0, v1, v2 }, [x1] ; encoding: [0x20,0x60,0x40,0x4c] +; CHECK: ld1.16b { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x20,0x40,0x4c] + +; CHECK: ld1.4h { v0 }, [x1] ; encoding: [0x20,0x74,0x40,0x0c] +; CHECK: ld1.4h { v0, v1 }, [x1] ; encoding: [0x20,0xa4,0x40,0x0c] +; CHECK: ld1.4h { v0, v1, v2 }, [x1] ; encoding: [0x20,0x64,0x40,0x0c] +; CHECK: ld1.4h { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x24,0x40,0x0c] + +; CHECK: ld1.8h { v0 }, [x1] ; encoding: [0x20,0x74,0x40,0x4c] +; CHECK: ld1.8h { v0, v1 }, [x1] ; encoding: [0x20,0xa4,0x40,0x4c] +; CHECK: ld1.8h { v0, v1, v2 }, [x1] ; encoding: [0x20,0x64,0x40,0x4c] +; CHECK: ld1.8h { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x24,0x40,0x4c] + +; CHECK: ld1.2s { v0 }, [x1] ; encoding: [0x20,0x78,0x40,0x0c] +; CHECK: ld1.2s { v0, v1 }, [x1] ; encoding: [0x20,0xa8,0x40,0x0c] +; CHECK: ld1.2s { v0, v1, v2 }, [x1] ; encoding: [0x20,0x68,0x40,0x0c] +; CHECK: ld1.2s { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x28,0x40,0x0c] + +; CHECK: ld1.4s { v0 }, [x1] ; encoding: [0x20,0x78,0x40,0x4c] +; CHECK: ld1.4s { v0, v1 }, [x1] ; encoding: [0x20,0xa8,0x40,0x4c] +; CHECK: ld1.4s { v0, v1, v2 }, [x1] ; encoding: [0x20,0x68,0x40,0x4c] +; CHECK: ld1.4s { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x28,0x40,0x4c] + +; CHECK: ld1.1d { v0 }, [x1] ; encoding: [0x20,0x7c,0x40,0x0c] +; CHECK: ld1.1d { v0, v1 }, [x1] ; encoding: [0x20,0xac,0x40,0x0c] +; CHECK: ld1.1d { v0, v1, v2 }, [x1] ; encoding: [0x20,0x6c,0x40,0x0c] +; CHECK: ld1.1d { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x2c,0x40,0x0c] + +; CHECK: ld1.2d { v0 }, [x1] ; encoding: [0x20,0x7c,0x40,0x4c] +; CHECK: ld1.2d { v0, v1 }, [x1] ; encoding: [0x20,0xac,0x40,0x4c] +; CHECK: ld1.2d { v0, v1, v2 }, [x1] ; encoding: [0x20,0x6c,0x40,0x4c] +; CHECK: ld1.2d { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x2c,0x40,0x4c] + + +; CHECK: st1.8b { v0 }, [x1] ; encoding: [0x20,0x70,0x00,0x0c] +; CHECK: st1.8b { v0, v1 }, [x1] ; encoding: [0x20,0xa0,0x00,0x0c] +; CHECK: st1.8b { v0, v1, v2 }, [x1] ; encoding: [0x20,0x60,0x00,0x0c] +; CHECK: st1.8b { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x20,0x00,0x0c] + +; CHECK: st1.16b { v0 }, [x1] ; encoding: [0x20,0x70,0x00,0x4c] +; CHECK: st1.16b { v0, v1 }, [x1] ; encoding: [0x20,0xa0,0x00,0x4c] +; CHECK: st1.16b { v0, v1, v2 }, [x1] ; encoding: [0x20,0x60,0x00,0x4c] +; CHECK: st1.16b { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x20,0x00,0x4c] + +; CHECK: st1.4h { v0 }, [x1] ; encoding: [0x20,0x74,0x00,0x0c] +; CHECK: st1.4h { v0, v1 }, [x1] ; encoding: [0x20,0xa4,0x00,0x0c] +; CHECK: st1.4h { v0, v1, v2 }, [x1] ; encoding: [0x20,0x64,0x00,0x0c] +; CHECK: st1.4h { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x24,0x00,0x0c] + +; CHECK: st1.8h { v0 }, [x1] ; encoding: [0x20,0x74,0x00,0x4c] +; CHECK: st1.8h { v0, v1 }, [x1] ; encoding: [0x20,0xa4,0x00,0x4c] +; CHECK: st1.8h { v0, v1, v2 }, [x1] ; encoding: [0x20,0x64,0x00,0x4c] +; CHECK: st1.8h { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x24,0x00,0x4c] + +; CHECK: st1.2s { v0 }, [x1] ; encoding: [0x20,0x78,0x00,0x0c] +; CHECK: st1.2s { v0, v1 }, [x1] ; encoding: [0x20,0xa8,0x00,0x0c] +; CHECK: st1.2s { v0, v1, v2 }, [x1] ; encoding: [0x20,0x68,0x00,0x0c] +; CHECK: st1.2s { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x28,0x00,0x0c] + +; CHECK: st1.4s { v0 }, [x1] ; encoding: [0x20,0x78,0x00,0x4c] +; CHECK: st1.4s { v0, v1 }, [x1] ; encoding: [0x20,0xa8,0x00,0x4c] +; CHECK: st1.4s { v0, v1, v2 }, [x1] ; encoding: [0x20,0x68,0x00,0x4c] +; CHECK: st1.4s { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x28,0x00,0x4c] + +; CHECK: st1.1d { v0 }, [x1] ; encoding: [0x20,0x7c,0x00,0x0c] +; CHECK: st1.1d { v0, v1 }, [x1] ; encoding: [0x20,0xac,0x00,0x0c] +; CHECK: st1.1d { v0, v1, v2 }, [x1] ; encoding: [0x20,0x6c,0x00,0x0c] +; CHECK: st1.1d { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x2c,0x00,0x0c] + +; CHECK: st1.2d { v0 }, [x1] ; encoding: [0x20,0x7c,0x00,0x4c] +; CHECK: st1.2d { v0, v1 }, [x1] ; encoding: [0x20,0xac,0x00,0x4c] +; CHECK: st1.2d { v0, v1, v2 }, [x1] ; encoding: [0x20,0x6c,0x00,0x4c] +; CHECK: st1.2d { v0, v1, v2, v3 }, [x1] ; encoding: [0x20,0x2c,0x00,0x4c] + +; CHECK: st1.2d { v5 }, [x1] ; encoding: [0x25,0x7c,0x00,0x4c] +; CHECK: st1.2d { v7, v8 }, [x10] ; encoding: [0x47,0xad,0x00,0x4c] +; CHECK: st1.2d { v11, v12, v13 }, [x1] ; encoding: [0x2b,0x6c,0x00,0x4c] +; CHECK: st1.2d { v28, v29, v30, v31 }, [x13] ; encoding: [0xbc,0x2d,0x00,0x4c] + +_ld2st2_multiple: + ld2.8b {v4, v5}, [x19] + ld2.16b {v4, v5}, [x19] + ld2.4h {v4, v5}, [x19] + ld2.8h {v4, v5}, [x19] + ld2.2s {v4, v5}, [x19] + ld2.4s {v4, v5}, [x19] + ld2.2d {v4, v5}, [x19] + + st2.8b {v4, v5}, [x19] + st2.16b {v4, v5}, [x19] + st2.4h {v4, v5}, [x19] + st2.8h {v4, v5}, [x19] + st2.2s {v4, v5}, [x19] + st2.4s {v4, v5}, [x19] + st2.2d {v4, v5}, [x19] + + +; CHECK: _ld2st2_multiple +; CHECK: ld2.8b { v4, v5 }, [x19] ; encoding: [0x64,0x82,0x40,0x0c] +; CHECK: ld2.16b { v4, v5 }, [x19] ; encoding: [0x64,0x82,0x40,0x4c] +; CHECK: ld2.4h { v4, v5 }, [x19] ; encoding: [0x64,0x86,0x40,0x0c] +; CHECK: ld2.8h { v4, v5 }, [x19] ; encoding: [0x64,0x86,0x40,0x4c] +; CHECK: ld2.2s { v4, v5 }, [x19] ; encoding: [0x64,0x8a,0x40,0x0c] +; CHECK: ld2.4s { v4, v5 }, [x19] ; encoding: [0x64,0x8a,0x40,0x4c] +; CHECK: ld2.2d { v4, v5 }, [x19] ; encoding: [0x64,0x8e,0x40,0x4c] + +; CHECK: st2.8b { v4, v5 }, [x19] ; encoding: [0x64,0x82,0x00,0x0c] +; CHECK: st2.16b { v4, v5 }, [x19] ; encoding: [0x64,0x82,0x00,0x4c] +; CHECK: st2.4h { v4, v5 }, [x19] ; encoding: [0x64,0x86,0x00,0x0c] +; CHECK: st2.8h { v4, v5 }, [x19] ; encoding: [0x64,0x86,0x00,0x4c] +; CHECK: st2.2s { v4, v5 }, [x19] ; encoding: [0x64,0x8a,0x00,0x0c] +; CHECK: st2.4s { v4, v5 }, [x19] ; encoding: [0x64,0x8a,0x00,0x4c] +; CHECK: st2.2d { v4, v5 }, [x19] ; encoding: [0x64,0x8e,0x00,0x4c] + + +ld3st3_multiple: + ld3.8b {v4, v5, v6}, [x19] + ld3.16b {v4, v5, v6}, [x19] + ld3.4h {v4, v5, v6}, [x19] + ld3.8h {v4, v5, v6}, [x19] + ld3.2s {v4, v5, v6}, [x19] + ld3.4s {v4, v5, v6}, [x19] + ld3.2d {v4, v5, v6}, [x19] + + ld3.8b {v9, v10, v11}, [x9] + ld3.16b {v14, v15, v16}, [x19] + ld3.4h {v24, v25, v26}, [x29] + ld3.8h {v30, v31, v0}, [x9] + ld3.2s {v2, v3, v4}, [x19] + ld3.4s {v4, v5, v6}, [x29] + ld3.2d {v7, v8, v9}, [x9] + + st3.8b {v4, v5, v6}, [x19] + st3.16b {v4, v5, v6}, [x19] + st3.4h {v4, v5, v6}, [x19] + st3.8h {v4, v5, v6}, [x19] + st3.2s {v4, v5, v6}, [x19] + st3.4s {v4, v5, v6}, [x19] + st3.2d {v4, v5, v6}, [x19] + + st3.8b {v10, v11, v12}, [x9] + st3.16b {v14, v15, v16}, [x19] + st3.4h {v24, v25, v26}, [x29] + st3.8h {v30, v31, v0}, [x9] + st3.2s {v2, v3, v4}, [x19] + st3.4s {v7, v8, v9}, [x29] + st3.2d {v4, v5, v6}, [x9] + +; CHECK: ld3st3_multiple: +; CHECK: ld3.8b { v4, v5, v6 }, [x19] ; encoding: [0x64,0x42,0x40,0x0c] +; CHECK: ld3.16b { v4, v5, v6 }, [x19] ; encoding: [0x64,0x42,0x40,0x4c] +; CHECK: ld3.4h { v4, v5, v6 }, [x19] ; encoding: [0x64,0x46,0x40,0x0c] +; CHECK: ld3.8h { v4, v5, v6 }, [x19] ; encoding: [0x64,0x46,0x40,0x4c] +; CHECK: ld3.2s { v4, v5, v6 }, [x19] ; encoding: [0x64,0x4a,0x40,0x0c] +; CHECK: ld3.4s { v4, v5, v6 }, [x19] ; encoding: [0x64,0x4a,0x40,0x4c] +; CHECK: ld3.2d { v4, v5, v6 }, [x19] ; encoding: [0x64,0x4e,0x40,0x4c] + +; CHECK: ld3.8b { v9, v10, v11 }, [x9] ; encoding: [0x29,0x41,0x40,0x0c] +; CHECK: ld3.16b { v14, v15, v16 }, [x19] ; encoding: [0x6e,0x42,0x40,0x4c] +; CHECK: ld3.4h { v24, v25, v26 }, [fp] ; encoding: [0xb8,0x47,0x40,0x0c] +; CHECK: ld3.8h { v30, v31, v0 }, [x9] ; encoding: [0x3e,0x45,0x40,0x4c] +; CHECK: ld3.2s { v2, v3, v4 }, [x19] ; encoding: [0x62,0x4a,0x40,0x0c] +; CHECK: ld3.4s { v4, v5, v6 }, [fp] ; encoding: [0xa4,0x4b,0x40,0x4c] +; CHECK: ld3.2d { v7, v8, v9 }, [x9] ; encoding: [0x27,0x4d,0x40,0x4c] + +; CHECK: st3.8b { v4, v5, v6 }, [x19] ; encoding: [0x64,0x42,0x00,0x0c] +; CHECK: st3.16b { v4, v5, v6 }, [x19] ; encoding: [0x64,0x42,0x00,0x4c] +; CHECK: st3.4h { v4, v5, v6 }, [x19] ; encoding: [0x64,0x46,0x00,0x0c] +; CHECK: st3.8h { v4, v5, v6 }, [x19] ; encoding: [0x64,0x46,0x00,0x4c] +; CHECK: st3.2s { v4, v5, v6 }, [x19] ; encoding: [0x64,0x4a,0x00,0x0c] +; CHECK: st3.4s { v4, v5, v6 }, [x19] ; encoding: [0x64,0x4a,0x00,0x4c] +; CHECK: st3.2d { v4, v5, v6 }, [x19] ; encoding: [0x64,0x4e,0x00,0x4c] + +; CHECK: st3.8b { v10, v11, v12 }, [x9] ; encoding: [0x2a,0x41,0x00,0x0c] +; CHECK: st3.16b { v14, v15, v16 }, [x19] ; encoding: [0x6e,0x42,0x00,0x4c] +; CHECK: st3.4h { v24, v25, v26 }, [fp] ; encoding: [0xb8,0x47,0x00,0x0c] +; CHECK: st3.8h { v30, v31, v0 }, [x9] ; encoding: [0x3e,0x45,0x00,0x4c] +; CHECK: st3.2s { v2, v3, v4 }, [x19] ; encoding: [0x62,0x4a,0x00,0x0c] +; CHECK: st3.4s { v7, v8, v9 }, [fp] ; encoding: [0xa7,0x4b,0x00,0x4c] +; CHECK: st3.2d { v4, v5, v6 }, [x9] ; encoding: [0x24,0x4d,0x00,0x4c] + +ld4st4_multiple: + ld4.8b {v4, v5, v6, v7}, [x19] + ld4.16b {v4, v5, v6, v7}, [x19] + ld4.4h {v4, v5, v6, v7}, [x19] + ld4.8h {v4, v5, v6, v7}, [x19] + ld4.2s {v4, v5, v6, v7}, [x19] + ld4.4s {v4, v5, v6, v7}, [x19] + ld4.2d {v4, v5, v6, v7}, [x19] + + st4.8b {v4, v5, v6, v7}, [x19] + st4.16b {v4, v5, v6, v7}, [x19] + st4.4h {v4, v5, v6, v7}, [x19] + st4.8h {v4, v5, v6, v7}, [x19] + st4.2s {v4, v5, v6, v7}, [x19] + st4.4s {v4, v5, v6, v7}, [x19] + st4.2d {v4, v5, v6, v7}, [x19] + +; CHECK: ld4st4_multiple: +; CHECK: ld4.8b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x0c] +; CHECK: ld4.16b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x4c] +; CHECK: ld4.4h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x40,0x0c] +; CHECK: ld4.8h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x40,0x4c] +; CHECK: ld4.2s { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0a,0x40,0x0c] +; CHECK: ld4.4s { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0a,0x40,0x4c] +; CHECK: ld4.2d { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0e,0x40,0x4c] + +; CHECK: st4.8b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x00,0x0c] +; CHECK: st4.16b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x00,0x4c] +; CHECK: st4.4h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x00,0x0c] +; CHECK: st4.8h { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x06,0x00,0x4c] +; CHECK: st4.2s { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0a,0x00,0x0c] +; CHECK: st4.4s { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0a,0x00,0x4c] +; CHECK: st4.2d { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x0e,0x00,0x4c] + +;----------------------------------------------------------------------------- +; Post-increment versions. +;----------------------------------------------------------------------------- + +_ld1st1_multiple_post: + ld1.8b {v0}, [x1], x15 + ld1.8b {v0, v1}, [x1], x15 + ld1.8b {v0, v1, v2}, [x1], x15 + ld1.8b {v0, v1, v2, v3}, [x1], x15 + + ld1.16b {v0}, [x1], x15 + ld1.16b {v0, v1}, [x1], x15 + ld1.16b {v0, v1, v2}, [x1], x15 + ld1.16b {v0, v1, v2, v3}, [x1], x15 + + ld1.4h {v0}, [x1], x15 + ld1.4h {v0, v1}, [x1], x15 + ld1.4h {v0, v1, v2}, [x1], x15 + ld1.4h {v0, v1, v2, v3}, [x1], x15 + + ld1.8h {v0}, [x1], x15 + ld1.8h {v0, v1}, [x1], x15 + ld1.8h {v0, v1, v2}, [x1], x15 + ld1.8h {v0, v1, v2, v3}, [x1], x15 + + ld1.2s {v0}, [x1], x15 + ld1.2s {v0, v1}, [x1], x15 + ld1.2s {v0, v1, v2}, [x1], x15 + ld1.2s {v0, v1, v2, v3}, [x1], x15 + + ld1.4s {v0}, [x1], x15 + ld1.4s {v0, v1}, [x1], x15 + ld1.4s {v0, v1, v2}, [x1], x15 + ld1.4s {v0, v1, v2, v3}, [x1], x15 + + ld1.1d {v0}, [x1], x15 + ld1.1d {v0, v1}, [x1], x15 + ld1.1d {v0, v1, v2}, [x1], x15 + ld1.1d {v0, v1, v2, v3}, [x1], x15 + + ld1.2d {v0}, [x1], x15 + ld1.2d {v0, v1}, [x1], x15 + ld1.2d {v0, v1, v2}, [x1], x15 + ld1.2d {v0, v1, v2, v3}, [x1], x15 + + st1.8b {v0}, [x1], x15 + st1.8b {v0, v1}, [x1], x15 + st1.8b {v0, v1, v2}, [x1], x15 + st1.8b {v0, v1, v2, v3}, [x1], x15 + + st1.16b {v0}, [x1], x15 + st1.16b {v0, v1}, [x1], x15 + st1.16b {v0, v1, v2}, [x1], x15 + st1.16b {v0, v1, v2, v3}, [x1], x15 + + st1.4h {v0}, [x1], x15 + st1.4h {v0, v1}, [x1], x15 + st1.4h {v0, v1, v2}, [x1], x15 + st1.4h {v0, v1, v2, v3}, [x1], x15 + + st1.8h {v0}, [x1], x15 + st1.8h {v0, v1}, [x1], x15 + st1.8h {v0, v1, v2}, [x1], x15 + st1.8h {v0, v1, v2, v3}, [x1], x15 + + st1.2s {v0}, [x1], x15 + st1.2s {v0, v1}, [x1], x15 + st1.2s {v0, v1, v2}, [x1], x15 + st1.2s {v0, v1, v2, v3}, [x1], x15 + + st1.4s {v0}, [x1], x15 + st1.4s {v0, v1}, [x1], x15 + st1.4s {v0, v1, v2}, [x1], x15 + st1.4s {v0, v1, v2, v3}, [x1], x15 + + st1.1d {v0}, [x1], x15 + st1.1d {v0, v1}, [x1], x15 + st1.1d {v0, v1, v2}, [x1], x15 + st1.1d {v0, v1, v2, v3}, [x1], x15 + + st1.2d {v0}, [x1], x15 + st1.2d {v0, v1}, [x1], x15 + st1.2d {v0, v1, v2}, [x1], x15 + st1.2d {v0, v1, v2, v3}, [x1], x15 + + ld1.8b {v0}, [x1], #8 + ld1.8b {v0, v1}, [x1], #16 + ld1.8b {v0, v1, v2}, [x1], #24 + ld1.8b {v0, v1, v2, v3}, [x1], #32 + + ld1.16b {v0}, [x1], #16 + ld1.16b {v0, v1}, [x1], #32 + ld1.16b {v0, v1, v2}, [x1], #48 + ld1.16b {v0, v1, v2, v3}, [x1], #64 + + ld1.4h {v0}, [x1], #8 + ld1.4h {v0, v1}, [x1], #16 + ld1.4h {v0, v1, v2}, [x1], #24 + ld1.4h {v0, v1, v2, v3}, [x1], #32 + + ld1.8h {v0}, [x1], #16 + ld1.8h {v0, v1}, [x1], #32 + ld1.8h {v0, v1, v2}, [x1], #48 + ld1.8h {v0, v1, v2, v3}, [x1], #64 + + ld1.2s {v0}, [x1], #8 + ld1.2s {v0, v1}, [x1], #16 + ld1.2s {v0, v1, v2}, [x1], #24 + ld1.2s {v0, v1, v2, v3}, [x1], #32 + + ld1.4s {v0}, [x1], #16 + ld1.4s {v0, v1}, [x1], #32 + ld1.4s {v0, v1, v2}, [x1], #48 + ld1.4s {v0, v1, v2, v3}, [x1], #64 + + ld1.1d {v0}, [x1], #8 + ld1.1d {v0, v1}, [x1], #16 + ld1.1d {v0, v1, v2}, [x1], #24 + ld1.1d {v0, v1, v2, v3}, [x1], #32 + + ld1.2d {v0}, [x1], #16 + ld1.2d {v0, v1}, [x1], #32 + ld1.2d {v0, v1, v2}, [x1], #48 + ld1.2d {v0, v1, v2, v3}, [x1], #64 + + st1.8b {v0}, [x1], #8 + st1.8b {v0, v1}, [x1], #16 + st1.8b {v0, v1, v2}, [x1], #24 + st1.8b {v0, v1, v2, v3}, [x1], #32 + + st1.16b {v0}, [x1], #16 + st1.16b {v0, v1}, [x1], #32 + st1.16b {v0, v1, v2}, [x1], #48 + st1.16b {v0, v1, v2, v3}, [x1], #64 + + st1.4h {v0}, [x1], #8 + st1.4h {v0, v1}, [x1], #16 + st1.4h {v0, v1, v2}, [x1], #24 + st1.4h {v0, v1, v2, v3}, [x1], #32 + + st1.8h {v0}, [x1], #16 + st1.8h {v0, v1}, [x1], #32 + st1.8h {v0, v1, v2}, [x1], #48 + st1.8h {v0, v1, v2, v3}, [x1], #64 + + st1.2s {v0}, [x1], #8 + st1.2s {v0, v1}, [x1], #16 + st1.2s {v0, v1, v2}, [x1], #24 + st1.2s {v0, v1, v2, v3}, [x1], #32 + + st1.4s {v0}, [x1], #16 + st1.4s {v0, v1}, [x1], #32 + st1.4s {v0, v1, v2}, [x1], #48 + st1.4s {v0, v1, v2, v3}, [x1], #64 + + st1.1d {v0}, [x1], #8 + st1.1d {v0, v1}, [x1], #16 + st1.1d {v0, v1, v2}, [x1], #24 + st1.1d {v0, v1, v2, v3}, [x1], #32 + + st1.2d {v0}, [x1], #16 + st1.2d {v0, v1}, [x1], #32 + st1.2d {v0, v1, v2}, [x1], #48 + st1.2d {v0, v1, v2, v3}, [x1], #64 + +; CHECK: ld1st1_multiple_post: +; CHECK: ld1.8b { v0 }, [x1], x15 ; encoding: [0x20,0x70,0xcf,0x0c] +; CHECK: ld1.8b { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa0,0xcf,0x0c] +; CHECK: ld1.8b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x60,0xcf,0x0c] +; CHECK: ld1.8b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x20,0xcf,0x0c] + +; CHECK: ld1.16b { v0 }, [x1], x15 ; encoding: [0x20,0x70,0xcf,0x4c] +; CHECK: ld1.16b { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa0,0xcf,0x4c] +; CHECK: ld1.16b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x60,0xcf,0x4c] +; CHECK: ld1.16b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x20,0xcf,0x4c] + +; CHECK: ld1.4h { v0 }, [x1], x15 ; encoding: [0x20,0x74,0xcf,0x0c] +; CHECK: ld1.4h { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa4,0xcf,0x0c] +; CHECK: ld1.4h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x64,0xcf,0x0c] +; CHECK: ld1.4h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x24,0xcf,0x0c] + +; CHECK: ld1.8h { v0 }, [x1], x15 ; encoding: [0x20,0x74,0xcf,0x4c] +; CHECK: ld1.8h { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa4,0xcf,0x4c] +; CHECK: ld1.8h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x64,0xcf,0x4c] +; CHECK: ld1.8h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x24,0xcf,0x4c] + +; CHECK: ld1.2s { v0 }, [x1], x15 ; encoding: [0x20,0x78,0xcf,0x0c] +; CHECK: ld1.2s { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa8,0xcf,0x0c] +; CHECK: ld1.2s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x68,0xcf,0x0c] +; CHECK: ld1.2s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x28,0xcf,0x0c] + +; CHECK: ld1.4s { v0 }, [x1], x15 ; encoding: [0x20,0x78,0xcf,0x4c] +; CHECK: ld1.4s { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa8,0xcf,0x4c] +; CHECK: ld1.4s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x68,0xcf,0x4c] +; CHECK: ld1.4s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x28,0xcf,0x4c] + +; CHECK: ld1.1d { v0 }, [x1], x15 ; encoding: [0x20,0x7c,0xcf,0x0c] +; CHECK: ld1.1d { v0, v1 }, [x1], x15 ; encoding: [0x20,0xac,0xcf,0x0c] +; CHECK: ld1.1d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x6c,0xcf,0x0c] +; CHECK: ld1.1d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x2c,0xcf,0x0c] + +; CHECK: ld1.2d { v0 }, [x1], x15 ; encoding: [0x20,0x7c,0xcf,0x4c] +; CHECK: ld1.2d { v0, v1 }, [x1], x15 ; encoding: [0x20,0xac,0xcf,0x4c] +; CHECK: ld1.2d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x6c,0xcf,0x4c] +; CHECK: ld1.2d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x2c,0xcf,0x4c] + +; CHECK: st1.8b { v0 }, [x1], x15 ; encoding: [0x20,0x70,0x8f,0x0c] +; CHECK: st1.8b { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa0,0x8f,0x0c] +; CHECK: st1.8b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x60,0x8f,0x0c] +; CHECK: st1.8b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x20,0x8f,0x0c] + +; CHECK: st1.16b { v0 }, [x1], x15 ; encoding: [0x20,0x70,0x8f,0x4c] +; CHECK: st1.16b { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa0,0x8f,0x4c] +; CHECK: st1.16b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x60,0x8f,0x4c] +; CHECK: st1.16b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x20,0x8f,0x4c] + +; CHECK: st1.4h { v0 }, [x1], x15 ; encoding: [0x20,0x74,0x8f,0x0c] +; CHECK: st1.4h { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa4,0x8f,0x0c] +; CHECK: st1.4h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x64,0x8f,0x0c] +; CHECK: st1.4h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x24,0x8f,0x0c] + +; CHECK: st1.8h { v0 }, [x1], x15 ; encoding: [0x20,0x74,0x8f,0x4c] +; CHECK: st1.8h { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa4,0x8f,0x4c] +; CHECK: st1.8h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x64,0x8f,0x4c] +; CHECK: st1.8h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x24,0x8f,0x4c] + +; CHECK: st1.2s { v0 }, [x1], x15 ; encoding: [0x20,0x78,0x8f,0x0c] +; CHECK: st1.2s { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa8,0x8f,0x0c] +; CHECK: st1.2s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x68,0x8f,0x0c] +; CHECK: st1.2s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x28,0x8f,0x0c] + +; CHECK: st1.4s { v0 }, [x1], x15 ; encoding: [0x20,0x78,0x8f,0x4c] +; CHECK: st1.4s { v0, v1 }, [x1], x15 ; encoding: [0x20,0xa8,0x8f,0x4c] +; CHECK: st1.4s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x68,0x8f,0x4c] +; CHECK: st1.4s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x28,0x8f,0x4c] + +; CHECK: st1.1d { v0 }, [x1], x15 ; encoding: [0x20,0x7c,0x8f,0x0c] +; CHECK: st1.1d { v0, v1 }, [x1], x15 ; encoding: [0x20,0xac,0x8f,0x0c] +; CHECK: st1.1d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x6c,0x8f,0x0c] +; CHECK: st1.1d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x2c,0x8f,0x0c] + +; CHECK: st1.2d { v0 }, [x1], x15 ; encoding: [0x20,0x7c,0x8f,0x4c] +; CHECK: st1.2d { v0, v1 }, [x1], x15 ; encoding: [0x20,0xac,0x8f,0x4c] +; CHECK: st1.2d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x6c,0x8f,0x4c] +; CHECK: st1.2d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x2c,0x8f,0x4c] + +; CHECK: ld1.8b { v0 }, [x1], #8 ; encoding: [0x20,0x70,0xdf,0x0c] +; CHECK: ld1.8b { v0, v1 }, [x1], #16 ; encoding: [0x20,0xa0,0xdf,0x0c] +; CHECK: ld1.8b { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x60,0xdf,0x0c] +; CHECK: ld1.8b { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x20,0xdf,0x0c] + +; CHECK: ld1.16b { v0 }, [x1], #16 ; encoding: [0x20,0x70,0xdf,0x4c] +; CHECK: ld1.16b { v0, v1 }, [x1], #32 ; encoding: [0x20,0xa0,0xdf,0x4c] +; CHECK: ld1.16b { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x60,0xdf,0x4c] +; CHECK: ld1.16b { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x20,0xdf,0x4c] + +; CHECK: ld1.4h { v0 }, [x1], #8 ; encoding: [0x20,0x74,0xdf,0x0c] +; CHECK: ld1.4h { v0, v1 }, [x1], #16 ; encoding: [0x20,0xa4,0xdf,0x0c] +; CHECK: ld1.4h { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x64,0xdf,0x0c] +; CHECK: ld1.4h { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x24,0xdf,0x0c] + +; CHECK: ld1.8h { v0 }, [x1], #16 ; encoding: [0x20,0x74,0xdf,0x4c] +; CHECK: ld1.8h { v0, v1 }, [x1], #32 ; encoding: [0x20,0xa4,0xdf,0x4c] +; CHECK: ld1.8h { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x64,0xdf,0x4c] +; CHECK: ld1.8h { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x24,0xdf,0x4c] + +; CHECK: ld1.2s { v0 }, [x1], #8 ; encoding: [0x20,0x78,0xdf,0x0c] +; CHECK: ld1.2s { v0, v1 }, [x1], #16 ; encoding: [0x20,0xa8,0xdf,0x0c] +; CHECK: ld1.2s { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x68,0xdf,0x0c] +; CHECK: ld1.2s { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x28,0xdf,0x0c] + +; CHECK: ld1.4s { v0 }, [x1], #16 ; encoding: [0x20,0x78,0xdf,0x4c] +; CHECK: ld1.4s { v0, v1 }, [x1], #32 ; encoding: [0x20,0xa8,0xdf,0x4c] +; CHECK: ld1.4s { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x68,0xdf,0x4c] +; CHECK: ld1.4s { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x28,0xdf,0x4c] + +; CHECK: ld1.1d { v0 }, [x1], #8 ; encoding: [0x20,0x7c,0xdf,0x0c] +; CHECK: ld1.1d { v0, v1 }, [x1], #16 ; encoding: [0x20,0xac,0xdf,0x0c] +; CHECK: ld1.1d { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x6c,0xdf,0x0c] +; CHECK: ld1.1d { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x2c,0xdf,0x0c] + +; CHECK: ld1.2d { v0 }, [x1], #16 ; encoding: [0x20,0x7c,0xdf,0x4c] +; CHECK: ld1.2d { v0, v1 }, [x1], #32 ; encoding: [0x20,0xac,0xdf,0x4c] +; CHECK: ld1.2d { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x6c,0xdf,0x4c] +; CHECK: ld1.2d { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x2c,0xdf,0x4c] + +; CHECK: st1.8b { v0 }, [x1], #8 ; encoding: [0x20,0x70,0x9f,0x0c] +; CHECK: st1.8b { v0, v1 }, [x1], #16 ; encoding: [0x20,0xa0,0x9f,0x0c] +; CHECK: st1.8b { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x60,0x9f,0x0c] +; CHECK: st1.8b { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x20,0x9f,0x0c] + +; CHECK: st1.16b { v0 }, [x1], #16 ; encoding: [0x20,0x70,0x9f,0x4c] +; CHECK: st1.16b { v0, v1 }, [x1], #32 ; encoding: [0x20,0xa0,0x9f,0x4c] +; CHECK: st1.16b { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x60,0x9f,0x4c] +; CHECK: st1.16b { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x20,0x9f,0x4c] + +; CHECK: st1.4h { v0 }, [x1], #8 ; encoding: [0x20,0x74,0x9f,0x0c] +; CHECK: st1.4h { v0, v1 }, [x1], #16 ; encoding: [0x20,0xa4,0x9f,0x0c] +; CHECK: st1.4h { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x64,0x9f,0x0c] +; CHECK: st1.4h { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x24,0x9f,0x0c] + +; CHECK: st1.8h { v0 }, [x1], #16 ; encoding: [0x20,0x74,0x9f,0x4c] +; CHECK: st1.8h { v0, v1 }, [x1], #32 ; encoding: [0x20,0xa4,0x9f,0x4c] +; CHECK: st1.8h { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x64,0x9f,0x4c] +; CHECK: st1.8h { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x24,0x9f,0x4c] + +; CHECK: st1.2s { v0 }, [x1], #8 ; encoding: [0x20,0x78,0x9f,0x0c] +; CHECK: st1.2s { v0, v1 }, [x1], #16 ; encoding: [0x20,0xa8,0x9f,0x0c] +; CHECK: st1.2s { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x68,0x9f,0x0c] +; CHECK: st1.2s { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x28,0x9f,0x0c] + +; CHECK: st1.4s { v0 }, [x1], #16 ; encoding: [0x20,0x78,0x9f,0x4c] +; CHECK: st1.4s { v0, v1 }, [x1], #32 ; encoding: [0x20,0xa8,0x9f,0x4c] +; CHECK: st1.4s { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x68,0x9f,0x4c] +; CHECK: st1.4s { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x28,0x9f,0x4c] + +; CHECK: st1.1d { v0 }, [x1], #8 ; encoding: [0x20,0x7c,0x9f,0x0c] +; CHECK: st1.1d { v0, v1 }, [x1], #16 ; encoding: [0x20,0xac,0x9f,0x0c] +; CHECK: st1.1d { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x6c,0x9f,0x0c] +; CHECK: st1.1d { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x2c,0x9f,0x0c] + +; CHECK: st1.2d { v0 }, [x1], #16 ; encoding: [0x20,0x7c,0x9f,0x4c] +; CHECK: st1.2d { v0, v1 }, [x1], #32 ; encoding: [0x20,0xac,0x9f,0x4c] +; CHECK: st1.2d { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x6c,0x9f,0x4c] +; CHECK: st1.2d { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x2c,0x9f,0x4c] + + +_ld2st2_multiple_post: + ld2.8b {v0, v1}, [x1], x15 + ld2.16b {v0, v1}, [x1], x15 + ld2.4h {v0, v1}, [x1], x15 + ld2.8h {v0, v1}, [x1], x15 + ld2.2s {v0, v1}, [x1], x15 + ld2.4s {v0, v1}, [x1], x15 + ld2.2d {v0, v1}, [x1], x15 + + st2.8b {v0, v1}, [x1], x15 + st2.16b {v0, v1}, [x1], x15 + st2.4h {v0, v1}, [x1], x15 + st2.8h {v0, v1}, [x1], x15 + st2.2s {v0, v1}, [x1], x15 + st2.4s {v0, v1}, [x1], x15 + st2.2d {v0, v1}, [x1], x15 + + ld2.8b {v0, v1}, [x1], #16 + ld2.16b {v0, v1}, [x1], #32 + ld2.4h {v0, v1}, [x1], #16 + ld2.8h {v0, v1}, [x1], #32 + ld2.2s {v0, v1}, [x1], #16 + ld2.4s {v0, v1}, [x1], #32 + ld2.2d {v0, v1}, [x1], #32 + + st2.8b {v0, v1}, [x1], #16 + st2.16b {v0, v1}, [x1], #32 + st2.4h {v0, v1}, [x1], #16 + st2.8h {v0, v1}, [x1], #32 + st2.2s {v0, v1}, [x1], #16 + st2.4s {v0, v1}, [x1], #32 + st2.2d {v0, v1}, [x1], #32 + + +; CHECK: ld2st2_multiple_post: +; CHECK: ld2.8b { v0, v1 }, [x1], x15 ; encoding: [0x20,0x80,0xcf,0x0c] +; CHECK: ld2.16b { v0, v1 }, [x1], x15 ; encoding: [0x20,0x80,0xcf,0x4c] +; CHECK: ld2.4h { v0, v1 }, [x1], x15 ; encoding: [0x20,0x84,0xcf,0x0c] +; CHECK: ld2.8h { v0, v1 }, [x1], x15 ; encoding: [0x20,0x84,0xcf,0x4c] +; CHECK: ld2.2s { v0, v1 }, [x1], x15 ; encoding: [0x20,0x88,0xcf,0x0c] +; CHECK: ld2.4s { v0, v1 }, [x1], x15 ; encoding: [0x20,0x88,0xcf,0x4c] +; CHECK: ld2.2d { v0, v1 }, [x1], x15 ; encoding: [0x20,0x8c,0xcf,0x4c] + +; CHECK: st2.8b { v0, v1 }, [x1], x15 ; encoding: [0x20,0x80,0x8f,0x0c] +; CHECK: st2.16b { v0, v1 }, [x1], x15 ; encoding: [0x20,0x80,0x8f,0x4c] +; CHECK: st2.4h { v0, v1 }, [x1], x15 ; encoding: [0x20,0x84,0x8f,0x0c] +; CHECK: st2.8h { v0, v1 }, [x1], x15 ; encoding: [0x20,0x84,0x8f,0x4c] +; CHECK: st2.2s { v0, v1 }, [x1], x15 ; encoding: [0x20,0x88,0x8f,0x0c] +; CHECK: st2.4s { v0, v1 }, [x1], x15 ; encoding: [0x20,0x88,0x8f,0x4c] +; CHECK: st2.2d { v0, v1 }, [x1], x15 ; encoding: [0x20,0x8c,0x8f,0x4c] + +; CHECK: ld2.8b { v0, v1 }, [x1], #16 ; encoding: [0x20,0x80,0xdf,0x0c] +; CHECK: ld2.16b { v0, v1 }, [x1], #32 ; encoding: [0x20,0x80,0xdf,0x4c] +; CHECK: ld2.4h { v0, v1 }, [x1], #16 ; encoding: [0x20,0x84,0xdf,0x0c] +; CHECK: ld2.8h { v0, v1 }, [x1], #32 ; encoding: [0x20,0x84,0xdf,0x4c] +; CHECK: ld2.2s { v0, v1 }, [x1], #16 ; encoding: [0x20,0x88,0xdf,0x0c] +; CHECK: ld2.4s { v0, v1 }, [x1], #32 ; encoding: [0x20,0x88,0xdf,0x4c] +; CHECK: ld2.2d { v0, v1 }, [x1], #32 ; encoding: [0x20,0x8c,0xdf,0x4c] + +; CHECK: st2.8b { v0, v1 }, [x1], #16 ; encoding: [0x20,0x80,0x9f,0x0c] +; CHECK: st2.16b { v0, v1 }, [x1], #32 ; encoding: [0x20,0x80,0x9f,0x4c] +; CHECK: st2.4h { v0, v1 }, [x1], #16 ; encoding: [0x20,0x84,0x9f,0x0c] +; CHECK: st2.8h { v0, v1 }, [x1], #32 ; encoding: [0x20,0x84,0x9f,0x4c] +; CHECK: st2.2s { v0, v1 }, [x1], #16 ; encoding: [0x20,0x88,0x9f,0x0c] +; CHECK: st2.4s { v0, v1 }, [x1], #32 ; encoding: [0x20,0x88,0x9f,0x4c] +; CHECK: st2.2d { v0, v1 }, [x1], #32 ; encoding: [0x20,0x8c,0x9f,0x4c] + + +_ld3st3_multiple_post: + ld3.8b {v0, v1, v2}, [x1], x15 + ld3.16b {v0, v1, v2}, [x1], x15 + ld3.4h {v0, v1, v2}, [x1], x15 + ld3.8h {v0, v1, v2}, [x1], x15 + ld3.2s {v0, v1, v2}, [x1], x15 + ld3.4s {v0, v1, v2}, [x1], x15 + ld3.2d {v0, v1, v2}, [x1], x15 + + st3.8b {v0, v1, v2}, [x1], x15 + st3.16b {v0, v1, v2}, [x1], x15 + st3.4h {v0, v1, v2}, [x1], x15 + st3.8h {v0, v1, v2}, [x1], x15 + st3.2s {v0, v1, v2}, [x1], x15 + st3.4s {v0, v1, v2}, [x1], x15 + st3.2d {v0, v1, v2}, [x1], x15 + + ld3.8b {v0, v1, v2}, [x1], #24 + ld3.16b {v0, v1, v2}, [x1], #48 + ld3.4h {v0, v1, v2}, [x1], #24 + ld3.8h {v0, v1, v2}, [x1], #48 + ld3.2s {v0, v1, v2}, [x1], #24 + ld3.4s {v0, v1, v2}, [x1], #48 + ld3.2d {v0, v1, v2}, [x1], #48 + + st3.8b {v0, v1, v2}, [x1], #24 + st3.16b {v0, v1, v2}, [x1], #48 + st3.4h {v0, v1, v2}, [x1], #24 + st3.8h {v0, v1, v2}, [x1], #48 + st3.2s {v0, v1, v2}, [x1], #24 + st3.4s {v0, v1, v2}, [x1], #48 + st3.2d {v0, v1, v2}, [x1], #48 + +; CHECK: ld3st3_multiple_post: +; CHECK: ld3.8b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x40,0xcf,0x0c] +; CHECK: ld3.16b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x40,0xcf,0x4c] +; CHECK: ld3.4h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x44,0xcf,0x0c] +; CHECK: ld3.8h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x44,0xcf,0x4c] +; CHECK: ld3.2s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x48,0xcf,0x0c] +; CHECK: ld3.4s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x48,0xcf,0x4c] +; CHECK: ld3.2d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x4c,0xcf,0x4c] + +; CHECK: st3.8b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x40,0x8f,0x0c] +; CHECK: st3.16b { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x40,0x8f,0x4c] +; CHECK: st3.4h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x44,0x8f,0x0c] +; CHECK: st3.8h { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x44,0x8f,0x4c] +; CHECK: st3.2s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x48,0x8f,0x0c] +; CHECK: st3.4s { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x48,0x8f,0x4c] +; CHECK: st3.2d { v0, v1, v2 }, [x1], x15 ; encoding: [0x20,0x4c,0x8f,0x4c] + +; CHECK: ld3.8b { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x40,0xdf,0x0c] +; CHECK: ld3.16b { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x40,0xdf,0x4c] +; CHECK: ld3.4h { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x44,0xdf,0x0c] +; CHECK: ld3.8h { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x44,0xdf,0x4c] +; CHECK: ld3.2s { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x48,0xdf,0x0c] +; CHECK: ld3.4s { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x48,0xdf,0x4c] +; CHECK: ld3.2d { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x4c,0xdf,0x4c] + +; CHECK: st3.8b { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x40,0x9f,0x0c] +; CHECK: st3.16b { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x40,0x9f,0x4c] +; CHECK: st3.4h { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x44,0x9f,0x0c] +; CHECK: st3.8h { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x44,0x9f,0x4c] +; CHECK: st3.2s { v0, v1, v2 }, [x1], #24 ; encoding: [0x20,0x48,0x9f,0x0c] +; CHECK: st3.4s { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x48,0x9f,0x4c] +; CHECK: st3.2d { v0, v1, v2 }, [x1], #48 ; encoding: [0x20,0x4c,0x9f,0x4c] + +_ld4st4_multiple_post: + ld4.8b {v0, v1, v2, v3}, [x1], x15 + ld4.16b {v0, v1, v2, v3}, [x1], x15 + ld4.4h {v0, v1, v2, v3}, [x1], x15 + ld4.8h {v0, v1, v2, v3}, [x1], x15 + ld4.2s {v0, v1, v2, v3}, [x1], x15 + ld4.4s {v0, v1, v2, v3}, [x1], x15 + ld4.2d {v0, v1, v2, v3}, [x1], x15 + + st4.8b {v0, v1, v2, v3}, [x1], x15 + st4.16b {v0, v1, v2, v3}, [x1], x15 + st4.4h {v0, v1, v2, v3}, [x1], x15 + st4.8h {v0, v1, v2, v3}, [x1], x15 + st4.2s {v0, v1, v2, v3}, [x1], x15 + st4.4s {v0, v1, v2, v3}, [x1], x15 + st4.2d {v0, v1, v2, v3}, [x1], x15 + + ld4.8b {v0, v1, v2, v3}, [x1], #32 + ld4.16b {v0, v1, v2, v3}, [x1], #64 + ld4.4h {v0, v1, v2, v3}, [x1], #32 + ld4.8h {v0, v1, v2, v3}, [x1], #64 + ld4.2s {v0, v1, v2, v3}, [x1], #32 + ld4.4s {v0, v1, v2, v3}, [x1], #64 + ld4.2d {v0, v1, v2, v3}, [x1], #64 + + st4.8b {v0, v1, v2, v3}, [x1], #32 + st4.16b {v0, v1, v2, v3}, [x1], #64 + st4.4h {v0, v1, v2, v3}, [x1], #32 + st4.8h {v0, v1, v2, v3}, [x1], #64 + st4.2s {v0, v1, v2, v3}, [x1], #32 + st4.4s {v0, v1, v2, v3}, [x1], #64 + st4.2d {v0, v1, v2, v3}, [x1], #64 + + +; CHECK: ld4st4_multiple_post: +; CHECK: ld4.8b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x00,0xcf,0x0c] +; CHECK: ld4.16b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x00,0xcf,0x4c] +; CHECK: ld4.4h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x04,0xcf,0x0c] +; CHECK: ld4.8h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x04,0xcf,0x4c] +; CHECK: ld4.2s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x08,0xcf,0x0c] +; CHECK: ld4.4s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x08,0xcf,0x4c] +; CHECK: ld4.2d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x0c,0xcf,0x4c] + +; CHECK: st4.8b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x00,0x8f,0x0c] +; CHECK: st4.16b { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x00,0x8f,0x4c] +; CHECK: st4.4h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x04,0x8f,0x0c] +; CHECK: st4.8h { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x04,0x8f,0x4c] +; CHECK: st4.2s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x08,0x8f,0x0c] +; CHECK: st4.4s { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x08,0x8f,0x4c] +; CHECK: st4.2d { v0, v1, v2, v3 }, [x1], x15 ; encoding: [0x20,0x0c,0x8f,0x4c] + +; CHECK: ld4.8b { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x00,0xdf,0x0c] +; CHECK: ld4.16b { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x00,0xdf,0x4c] +; CHECK: ld4.4h { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x04,0xdf,0x0c] +; CHECK: ld4.8h { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x04,0xdf,0x4c] +; CHECK: ld4.2s { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x08,0xdf,0x0c] +; CHECK: ld4.4s { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x08,0xdf,0x4c] +; CHECK: ld4.2d { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x0c,0xdf,0x4c] + +; CHECK: st4.8b { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x00,0x9f,0x0c] +; CHECK: st4.16b { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x00,0x9f,0x4c] +; CHECK: st4.4h { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x04,0x9f,0x0c] +; CHECK: st4.8h { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x04,0x9f,0x4c] +; CHECK: st4.2s { v0, v1, v2, v3 }, [x1], #32 ; encoding: [0x20,0x08,0x9f,0x0c] +; CHECK: st4.4s { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x08,0x9f,0x4c] +; CHECK: st4.2d { v0, v1, v2, v3 }, [x1], #64 ; encoding: [0x20,0x0c,0x9f,0x4c] + +ld1r: + ld1r.8b {v4}, [x2] + ld1r.8b {v4}, [x2], x3 + ld1r.16b {v4}, [x2] + ld1r.16b {v4}, [x2], x3 + ld1r.4h {v4}, [x2] + ld1r.4h {v4}, [x2], x3 + ld1r.8h {v4}, [x2] + ld1r.8h {v4}, [x2], x3 + ld1r.2s {v4}, [x2] + ld1r.2s {v4}, [x2], x3 + ld1r.4s {v4}, [x2] + ld1r.4s {v4}, [x2], x3 + ld1r.1d {v4}, [x2] + ld1r.1d {v4}, [x2], x3 + ld1r.2d {v4}, [x2] + ld1r.2d {v4}, [x2], x3 + + ld1r.8b {v4}, [x2], #1 + ld1r.16b {v4}, [x2], #1 + ld1r.4h {v4}, [x2], #2 + ld1r.8h {v4}, [x2], #2 + ld1r.2s {v4}, [x2], #4 + ld1r.4s {v4}, [x2], #4 + ld1r.1d {v4}, [x2], #8 + ld1r.2d {v4}, [x2], #8 + +; CHECK: ld1r: +; CHECK: ld1r.8b { v4 }, [x2] ; encoding: [0x44,0xc0,0x40,0x0d] +; CHECK: ld1r.8b { v4 }, [x2], x3 ; encoding: [0x44,0xc0,0xc3,0x0d] +; CHECK: ld1r.16b { v4 }, [x2] ; encoding: [0x44,0xc0,0x40,0x4d] +; CHECK: ld1r.16b { v4 }, [x2], x3 ; encoding: [0x44,0xc0,0xc3,0x4d] +; CHECK: ld1r.4h { v4 }, [x2] ; encoding: [0x44,0xc4,0x40,0x0d] +; CHECK: ld1r.4h { v4 }, [x2], x3 ; encoding: [0x44,0xc4,0xc3,0x0d] +; CHECK: ld1r.8h { v4 }, [x2] ; encoding: [0x44,0xc4,0x40,0x4d] +; CHECK: ld1r.8h { v4 }, [x2], x3 ; encoding: [0x44,0xc4,0xc3,0x4d] +; CHECK: ld1r.2s { v4 }, [x2] ; encoding: [0x44,0xc8,0x40,0x0d] +; CHECK: ld1r.2s { v4 }, [x2], x3 ; encoding: [0x44,0xc8,0xc3,0x0d] +; CHECK: ld1r.4s { v4 }, [x2] ; encoding: [0x44,0xc8,0x40,0x4d] +; CHECK: ld1r.4s { v4 }, [x2], x3 ; encoding: [0x44,0xc8,0xc3,0x4d] +; CHECK: ld1r.1d { v4 }, [x2] ; encoding: [0x44,0xcc,0x40,0x0d] +; CHECK: ld1r.1d { v4 }, [x2], x3 ; encoding: [0x44,0xcc,0xc3,0x0d] +; CHECK: ld1r.2d { v4 }, [x2] ; encoding: [0x44,0xcc,0x40,0x4d] +; CHECK: ld1r.2d { v4 }, [x2], x3 ; encoding: [0x44,0xcc,0xc3,0x4d] + +; CHECK: ld1r.8b { v4 }, [x2], #1 ; encoding: [0x44,0xc0,0xdf,0x0d] +; CHECK: ld1r.16b { v4 }, [x2], #1 ; encoding: [0x44,0xc0,0xdf,0x4d] +; CHECK: ld1r.4h { v4 }, [x2], #2 ; encoding: [0x44,0xc4,0xdf,0x0d] +; CHECK: ld1r.8h { v4 }, [x2], #2 ; encoding: [0x44,0xc4,0xdf,0x4d] +; CHECK: ld1r.2s { v4 }, [x2], #4 ; encoding: [0x44,0xc8,0xdf,0x0d] +; CHECK: ld1r.4s { v4 }, [x2], #4 ; encoding: [0x44,0xc8,0xdf,0x4d] +; CHECK: ld1r.1d { v4 }, [x2], #8 ; encoding: [0x44,0xcc,0xdf,0x0d] +; CHECK: ld1r.2d { v4 }, [x2], #8 ; encoding: [0x44,0xcc,0xdf,0x4d] + +ld2r: + ld2r.8b {v4, v5}, [x2] + ld2r.8b {v4, v5}, [x2], x3 + ld2r.16b {v4, v5}, [x2] + ld2r.16b {v4, v5}, [x2], x3 + ld2r.4h {v4, v5}, [x2] + ld2r.4h {v4, v5}, [x2], x3 + ld2r.8h {v4, v5}, [x2] + ld2r.8h {v4, v5}, [x2], x3 + ld2r.2s {v4, v5}, [x2] + ld2r.2s {v4, v5}, [x2], x3 + ld2r.4s {v4, v5}, [x2] + ld2r.4s {v4, v5}, [x2], x3 + ld2r.1d {v4, v5}, [x2] + ld2r.1d {v4, v5}, [x2], x3 + ld2r.2d {v4, v5}, [x2] + ld2r.2d {v4, v5}, [x2], x3 + + ld2r.8b {v4, v5}, [x2], #2 + ld2r.16b {v4, v5}, [x2], #2 + ld2r.4h {v4, v5}, [x2], #4 + ld2r.8h {v4, v5}, [x2], #4 + ld2r.2s {v4, v5}, [x2], #8 + ld2r.4s {v4, v5}, [x2], #8 + ld2r.1d {v4, v5}, [x2], #16 + ld2r.2d {v4, v5}, [x2], #16 + +; CHECK: ld2r: +; CHECK: ld2r.8b { v4, v5 }, [x2] ; encoding: [0x44,0xc0,0x60,0x0d] +; CHECK: ld2r.8b { v4, v5 }, [x2], x3 ; encoding: [0x44,0xc0,0xe3,0x0d] +; CHECK: ld2r.16b { v4, v5 }, [x2] ; encoding: [0x44,0xc0,0x60,0x4d] +; CHECK: ld2r.16b { v4, v5 }, [x2], x3 ; encoding: [0x44,0xc0,0xe3,0x4d] +; CHECK: ld2r.4h { v4, v5 }, [x2] ; encoding: [0x44,0xc4,0x60,0x0d] +; CHECK: ld2r.4h { v4, v5 }, [x2], x3 ; encoding: [0x44,0xc4,0xe3,0x0d] +; CHECK: ld2r.8h { v4, v5 }, [x2] ; encoding: [0x44,0xc4,0x60,0x4d] +; CHECK: ld2r.8h { v4, v5 }, [x2], x3 ; encoding: [0x44,0xc4,0xe3,0x4d] +; CHECK: ld2r.2s { v4, v5 }, [x2] ; encoding: [0x44,0xc8,0x60,0x0d] +; CHECK: ld2r.2s { v4, v5 }, [x2], x3 ; encoding: [0x44,0xc8,0xe3,0x0d] +; CHECK: ld2r.4s { v4, v5 }, [x2] ; encoding: [0x44,0xc8,0x60,0x4d] +; CHECK: ld2r.4s { v4, v5 }, [x2], x3 ; encoding: [0x44,0xc8,0xe3,0x4d] +; CHECK: ld2r.1d { v4, v5 }, [x2] ; encoding: [0x44,0xcc,0x60,0x0d] +; CHECK: ld2r.1d { v4, v5 }, [x2], x3 ; encoding: [0x44,0xcc,0xe3,0x0d] +; CHECK: ld2r.2d { v4, v5 }, [x2] ; encoding: [0x44,0xcc,0x60,0x4d] +; CHECK: ld2r.2d { v4, v5 }, [x2], x3 ; encoding: [0x44,0xcc,0xe3,0x4d] + +; CHECK: ld2r.8b { v4, v5 }, [x2], #2 ; encoding: [0x44,0xc0,0xff,0x0d] +; CHECK: ld2r.16b { v4, v5 }, [x2], #2 ; encoding: [0x44,0xc0,0xff,0x4d] +; CHECK: ld2r.4h { v4, v5 }, [x2], #4 ; encoding: [0x44,0xc4,0xff,0x0d] +; CHECK: ld2r.8h { v4, v5 }, [x2], #4 ; encoding: [0x44,0xc4,0xff,0x4d] +; CHECK: ld2r.2s { v4, v5 }, [x2], #8 ; encoding: [0x44,0xc8,0xff,0x0d] +; CHECK: ld2r.4s { v4, v5 }, [x2], #8 ; encoding: [0x44,0xc8,0xff,0x4d] +; CHECK: ld2r.1d { v4, v5 }, [x2], #16 ; encoding: [0x44,0xcc,0xff,0x0d] +; CHECK: ld2r.2d { v4, v5 }, [x2], #16 ; encoding: [0x44,0xcc,0xff,0x4d] + +ld3r: + ld3r.8b {v4, v5, v6}, [x2] + ld3r.8b {v4, v5, v6}, [x2], x3 + ld3r.16b {v4, v5, v6}, [x2] + ld3r.16b {v4, v5, v6}, [x2], x3 + ld3r.4h {v4, v5, v6}, [x2] + ld3r.4h {v4, v5, v6}, [x2], x3 + ld3r.8h {v4, v5, v6}, [x2] + ld3r.8h {v4, v5, v6}, [x2], x3 + ld3r.2s {v4, v5, v6}, [x2] + ld3r.2s {v4, v5, v6}, [x2], x3 + ld3r.4s {v4, v5, v6}, [x2] + ld3r.4s {v4, v5, v6}, [x2], x3 + ld3r.1d {v4, v5, v6}, [x2] + ld3r.1d {v4, v5, v6}, [x2], x3 + ld3r.2d {v4, v5, v6}, [x2] + ld3r.2d {v4, v5, v6}, [x2], x3 + + ld3r.8b {v4, v5, v6}, [x2], #3 + ld3r.16b {v4, v5, v6}, [x2], #3 + ld3r.4h {v4, v5, v6}, [x2], #6 + ld3r.8h {v4, v5, v6}, [x2], #6 + ld3r.2s {v4, v5, v6}, [x2], #12 + ld3r.4s {v4, v5, v6}, [x2], #12 + ld3r.1d {v4, v5, v6}, [x2], #24 + ld3r.2d {v4, v5, v6}, [x2], #24 + +; CHECK: ld3r: +; CHECK: ld3r.8b { v4, v5, v6 }, [x2] ; encoding: [0x44,0xe0,0x40,0x0d] +; CHECK: ld3r.8b { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe0,0xc3,0x0d] +; CHECK: ld3r.16b { v4, v5, v6 }, [x2] ; encoding: [0x44,0xe0,0x40,0x4d] +; CHECK: ld3r.16b { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe0,0xc3,0x4d] +; CHECK: ld3r.4h { v4, v5, v6 }, [x2] ; encoding: [0x44,0xe4,0x40,0x0d] +; CHECK: ld3r.4h { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe4,0xc3,0x0d] +; CHECK: ld3r.8h { v4, v5, v6 }, [x2] ; encoding: [0x44,0xe4,0x40,0x4d] +; CHECK: ld3r.8h { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe4,0xc3,0x4d] +; CHECK: ld3r.2s { v4, v5, v6 }, [x2] ; encoding: [0x44,0xe8,0x40,0x0d] +; CHECK: ld3r.2s { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe8,0xc3,0x0d] +; CHECK: ld3r.4s { v4, v5, v6 }, [x2] ; encoding: [0x44,0xe8,0x40,0x4d] +; CHECK: ld3r.4s { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xe8,0xc3,0x4d] +; CHECK: ld3r.1d { v4, v5, v6 }, [x2] ; encoding: [0x44,0xec,0x40,0x0d] +; CHECK: ld3r.1d { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xec,0xc3,0x0d] +; CHECK: ld3r.2d { v4, v5, v6 }, [x2] ; encoding: [0x44,0xec,0x40,0x4d] +; CHECK: ld3r.2d { v4, v5, v6 }, [x2], x3 ; encoding: [0x44,0xec,0xc3,0x4d] + +; CHECK: ld3r.8b { v4, v5, v6 }, [x2], #3 ; encoding: [0x44,0xe0,0xdf,0x0d] +; CHECK: ld3r.16b { v4, v5, v6 }, [x2], #3 ; encoding: [0x44,0xe0,0xdf,0x4d] +; CHECK: ld3r.4h { v4, v5, v6 }, [x2], #6 ; encoding: [0x44,0xe4,0xdf,0x0d] +; CHECK: ld3r.8h { v4, v5, v6 }, [x2], #6 ; encoding: [0x44,0xe4,0xdf,0x4d] +; CHECK: ld3r.2s { v4, v5, v6 }, [x2], #12 ; encoding: [0x44,0xe8,0xdf,0x0d] +; CHECK: ld3r.4s { v4, v5, v6 }, [x2], #12 ; encoding: [0x44,0xe8,0xdf,0x4d] +; CHECK: ld3r.1d { v4, v5, v6 }, [x2], #24 ; encoding: [0x44,0xec,0xdf,0x0d] +; CHECK: ld3r.2d { v4, v5, v6 }, [x2], #24 ; encoding: [0x44,0xec,0xdf,0x4d] + +ld4r: + ld4r.8b {v4, v5, v6, v7}, [x2] + ld4r.8b {v4, v5, v6, v7}, [x2], x3 + ld4r.16b {v4, v5, v6, v7}, [x2] + ld4r.16b {v4, v5, v6, v7}, [x2], x3 + ld4r.4h {v4, v5, v6, v7}, [x2] + ld4r.4h {v4, v5, v6, v7}, [x2], x3 + ld4r.8h {v4, v5, v6, v7}, [x2] + ld4r.8h {v4, v5, v6, v7}, [x2], x3 + ld4r.2s {v4, v5, v6, v7}, [x2] + ld4r.2s {v4, v5, v6, v7}, [x2], x3 + ld4r.4s {v4, v5, v6, v7}, [x2] + ld4r.4s {v4, v5, v6, v7}, [x2], x3 + ld4r.1d {v4, v5, v6, v7}, [x2] + ld4r.1d {v4, v5, v6, v7}, [x2], x3 + ld4r.2d {v4, v5, v6, v7}, [x2] + ld4r.2d {v4, v5, v6, v7}, [x2], x3 + + ld4r.8b {v4, v5, v6, v7}, [x2], #4 + ld4r.16b {v5, v6, v7, v8}, [x2], #4 + ld4r.4h {v6, v7, v8, v9}, [x2], #8 + ld4r.8h {v1, v2, v3, v4}, [x2], #8 + ld4r.2s {v2, v3, v4, v5}, [x2], #16 + ld4r.4s {v3, v4, v5, v6}, [x2], #16 + ld4r.1d {v0, v1, v2, v3}, [x2], #32 + ld4r.2d {v4, v5, v6, v7}, [x2], #32 + +; CHECK: ld4r: +; CHECK: ld4r.8b { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe0,0x60,0x0d] +; CHECK: ld4r.8b { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe0,0xe3,0x0d] +; CHECK: ld4r.16b { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe0,0x60,0x4d] +; CHECK: ld4r.16b { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe0,0xe3,0x4d] +; CHECK: ld4r.4h { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe4,0x60,0x0d] +; CHECK: ld4r.4h { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe4,0xe3,0x0d] +; CHECK: ld4r.8h { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe4,0x60,0x4d] +; CHECK: ld4r.8h { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe4,0xe3,0x4d] +; CHECK: ld4r.2s { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe8,0x60,0x0d] +; CHECK: ld4r.2s { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe8,0xe3,0x0d] +; CHECK: ld4r.4s { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xe8,0x60,0x4d] +; CHECK: ld4r.4s { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xe8,0xe3,0x4d] +; CHECK: ld4r.1d { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xec,0x60,0x0d] +; CHECK: ld4r.1d { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xec,0xe3,0x0d] +; CHECK: ld4r.2d { v4, v5, v6, v7 }, [x2] ; encoding: [0x44,0xec,0x60,0x4d] +; CHECK: ld4r.2d { v4, v5, v6, v7 }, [x2], x3 ; encoding: [0x44,0xec,0xe3,0x4d] + +; CHECK: ld4r.8b { v4, v5, v6, v7 }, [x2], #4 ; encoding: [0x44,0xe0,0xff,0x0d] +; CHECK: ld4r.16b { v5, v6, v7, v8 }, [x2], #4 ; encoding: [0x45,0xe0,0xff,0x4d] +; CHECK: ld4r.4h { v6, v7, v8, v9 }, [x2], #8 ; encoding: [0x46,0xe4,0xff,0x0d] +; CHECK: ld4r.8h { v1, v2, v3, v4 }, [x2], #8 ; encoding: [0x41,0xe4,0xff,0x4d] +; CHECK: ld4r.2s { v2, v3, v4, v5 }, [x2], #16 ; encoding: [0x42,0xe8,0xff,0x0d] +; CHECK: ld4r.4s { v3, v4, v5, v6 }, [x2], #16 ; encoding: [0x43,0xe8,0xff,0x4d] +; CHECK: ld4r.1d { v0, v1, v2, v3 }, [x2], #32 ; encoding: [0x40,0xec,0xff,0x0d] +; CHECK: ld4r.2d { v4, v5, v6, v7 }, [x2], #32 ; encoding: [0x44,0xec,0xff,0x4d] + + +_ld1: + ld1.b {v4}[13], [x3] + ld1.h {v4}[2], [x3] + ld1.s {v4}[2], [x3] + ld1.d {v4}[1], [x3] + ld1.b {v4}[13], [x3], x5 + ld1.h {v4}[2], [x3], x5 + ld1.s {v4}[2], [x3], x5 + ld1.d {v4}[1], [x3], x5 + ld1.b {v4}[13], [x3], #1 + ld1.h {v4}[2], [x3], #2 + ld1.s {v4}[2], [x3], #4 + ld1.d {v4}[1], [x3], #8 + +; CHECK: _ld1: +; CHECK: ld1.b { v4 }[13], [x3] ; encoding: [0x64,0x14,0x40,0x4d] +; CHECK: ld1.h { v4 }[2], [x3] ; encoding: [0x64,0x50,0x40,0x0d] +; CHECK: ld1.s { v4 }[2], [x3] ; encoding: [0x64,0x80,0x40,0x4d] +; CHECK: ld1.d { v4 }[1], [x3] ; encoding: [0x64,0x84,0x40,0x4d] +; CHECK: ld1.b { v4 }[13], [x3], x5 ; encoding: [0x64,0x14,0xc5,0x4d] +; CHECK: ld1.h { v4 }[2], [x3], x5 ; encoding: [0x64,0x50,0xc5,0x0d] +; CHECK: ld1.s { v4 }[2], [x3], x5 ; encoding: [0x64,0x80,0xc5,0x4d] +; CHECK: ld1.d { v4 }[1], [x3], x5 ; encoding: [0x64,0x84,0xc5,0x4d] +; CHECK: ld1.b { v4 }[13], [x3], #1 ; encoding: [0x64,0x14,0xdf,0x4d] +; CHECK: ld1.h { v4 }[2], [x3], #2 ; encoding: [0x64,0x50,0xdf,0x0d] +; CHECK: ld1.s { v4 }[2], [x3], #4 ; encoding: [0x64,0x80,0xdf,0x4d] +; CHECK: ld1.d { v4 }[1], [x3], #8 ; encoding: [0x64,0x84,0xdf,0x4d] + +_ld2: + ld2.b {v4, v5}[13], [x3] + ld2.h {v4, v5}[2], [x3] + ld2.s {v4, v5}[2], [x3] + ld2.d {v4, v5}[1], [x3] + ld2.b {v4, v5}[13], [x3], x5 + ld2.h {v4, v5}[2], [x3], x5 + ld2.s {v4, v5}[2], [x3], x5 + ld2.d {v4, v5}[1], [x3], x5 + ld2.b {v4, v5}[13], [x3], #2 + ld2.h {v4, v5}[2], [x3], #4 + ld2.s {v4, v5}[2], [x3], #8 + ld2.d {v4, v5}[1], [x3], #16 + + +; CHECK: _ld2: +; CHECK: ld2.b { v4, v5 }[13], [x3] ; encoding: [0x64,0x14,0x60,0x4d] +; CHECK: ld2.h { v4, v5 }[2], [x3] ; encoding: [0x64,0x50,0x60,0x0d] +; CHECK: ld2.s { v4, v5 }[2], [x3] ; encoding: [0x64,0x80,0x60,0x4d] +; CHECK: ld2.d { v4, v5 }[1], [x3] ; encoding: [0x64,0x84,0x60,0x4d] +; CHECK: ld2.b { v4, v5 }[13], [x3], x5 ; encoding: [0x64,0x14,0xe5,0x4d] +; CHECK: ld2.h { v4, v5 }[2], [x3], x5 ; encoding: [0x64,0x50,0xe5,0x0d] +; CHECK: ld2.s { v4, v5 }[2], [x3], x5 ; encoding: [0x64,0x80,0xe5,0x4d] +; CHECK: ld2.d { v4, v5 }[1], [x3], x5 ; encoding: [0x64,0x84,0xe5,0x4d] +; CHECK: ld2.b { v4, v5 }[13], [x3], #2 ; encoding: [0x64,0x14,0xff,0x4d] +; CHECK: ld2.h { v4, v5 }[2], [x3], #4 ; encoding: [0x64,0x50,0xff,0x0d] +; CHECK: ld2.s { v4, v5 }[2], [x3], #8 ; encoding: [0x64,0x80,0xff,0x4d] +; CHECK: ld2.d { v4, v5 }[1], [x3], #16 ; encoding: [0x64,0x84,0xff,0x4d] + + +_ld3: + ld3.b {v4, v5, v6}[13], [x3] + ld3.h {v4, v5, v6}[2], [x3] + ld3.s {v4, v5, v6}[2], [x3] + ld3.d {v4, v5, v6}[1], [x3] + ld3.b {v4, v5, v6}[13], [x3], x5 + ld3.h {v4, v5, v6}[2], [x3], x5 + ld3.s {v4, v5, v6}[2], [x3], x5 + ld3.d {v4, v5, v6}[1], [x3], x5 + ld3.b {v4, v5, v6}[13], [x3], #3 + ld3.h {v4, v5, v6}[2], [x3], #6 + ld3.s {v4, v5, v6}[2], [x3], #12 + ld3.d {v4, v5, v6}[1], [x3], #24 + + +; CHECK: _ld3: +; CHECK: ld3.b { v4, v5, v6 }[13], [x3] ; encoding: [0x64,0x34,0x40,0x4d] +; CHECK: ld3.h { v4, v5, v6 }[2], [x3] ; encoding: [0x64,0x70,0x40,0x0d] +; CHECK: ld3.s { v4, v5, v6 }[2], [x3] ; encoding: [0x64,0xa0,0x40,0x4d] +; CHECK: ld3.d { v4, v5, v6 }[1], [x3] ; encoding: [0x64,0xa4,0x40,0x4d] +; CHECK: ld3.b { v4, v5, v6 }[13], [x3], x5 ; encoding: [0x64,0x34,0xc5,0x4d] +; CHECK: ld3.h { v4, v5, v6 }[2], [x3], x5 ; encoding: [0x64,0x70,0xc5,0x0d] +; CHECK: ld3.s { v4, v5, v6 }[2], [x3], x5 ; encoding: [0x64,0xa0,0xc5,0x4d] +; CHECK: ld3.d { v4, v5, v6 }[1], [x3], x5 ; encoding: [0x64,0xa4,0xc5,0x4d] +; CHECK: ld3.b { v4, v5, v6 }[13], [x3], #3 ; encoding: [0x64,0x34,0xdf,0x4d] +; CHECK: ld3.h { v4, v5, v6 }[2], [x3], #6 ; encoding: [0x64,0x70,0xdf,0x0d] +; CHECK: ld3.s { v4, v5, v6 }[2], [x3], #12 ; encoding: [0x64,0xa0,0xdf,0x4d] +; CHECK: ld3.d { v4, v5, v6 }[1], [x3], #24 ; encoding: [0x64,0xa4,0xdf,0x4d] + + +_ld4: + ld4.b {v4, v5, v6, v7}[13], [x3] + ld4.h {v4, v5, v6, v7}[2], [x3] + ld4.s {v4, v5, v6, v7}[2], [x3] + ld4.d {v4, v5, v6, v7}[1], [x3] + ld4.b {v4, v5, v6, v7}[13], [x3], x5 + ld4.h {v4, v5, v6, v7}[2], [x3], x5 + ld4.s {v4, v5, v6, v7}[2], [x3], x5 + ld4.d {v4, v5, v6, v7}[1], [x3], x5 + ld4.b {v4, v5, v6, v7}[13], [x3], #4 + ld4.h {v4, v5, v6, v7}[2], [x3], #8 + ld4.s {v4, v5, v6, v7}[2], [x3], #16 + ld4.d {v4, v5, v6, v7}[1], [x3], #32 + +; CHECK: _ld4: +; CHECK: ld4.b { v4, v5, v6, v7 }[13], [x3] ; encoding: [0x64,0x34,0x60,0x4d] +; CHECK: ld4.h { v4, v5, v6, v7 }[2], [x3] ; encoding: [0x64,0x70,0x60,0x0d] +; CHECK: ld4.s { v4, v5, v6, v7 }[2], [x3] ; encoding: [0x64,0xa0,0x60,0x4d] +; CHECK: ld4.d { v4, v5, v6, v7 }[1], [x3] ; encoding: [0x64,0xa4,0x60,0x4d] +; CHECK: ld4.b { v4, v5, v6, v7 }[13], [x3], x5 ; encoding: [0x64,0x34,0xe5,0x4d] +; CHECK: ld4.h { v4, v5, v6, v7 }[2], [x3], x5 ; encoding: [0x64,0x70,0xe5,0x0d] +; CHECK: ld4.s { v4, v5, v6, v7 }[2], [x3], x5 ; encoding: [0x64,0xa0,0xe5,0x4d] +; CHECK: ld4.d { v4, v5, v6, v7 }[1], [x3], x5 ; encoding: [0x64,0xa4,0xe5,0x4d] +; CHECK: ld4.b { v4, v5, v6, v7 }[13], [x3], #4 ; encoding: [0x64,0x34,0xff,0x4d] +; CHECK: ld4.h { v4, v5, v6, v7 }[2], [x3], #8 ; encoding: [0x64,0x70,0xff,0x0d] +; CHECK: ld4.s { v4, v5, v6, v7 }[2], [x3], #16 ; encoding: [0x64,0xa0,0xff,0x4d] +; CHECK: ld4.d { v4, v5, v6, v7 }[1], [x3], #32 ; encoding: [0x64,0xa4,0xff,0x4d] + +_st1: + st1.b {v4}[13], [x3] + st1.h {v4}[2], [x3] + st1.s {v4}[2], [x3] + st1.d {v4}[1], [x3] + st1.b {v4}[13], [x3], x5 + st1.h {v4}[2], [x3], x5 + st1.s {v4}[2], [x3], x5 + st1.d {v4}[1], [x3], x5 + st1.b {v4}[13], [x3], #1 + st1.h {v4}[2], [x3], #2 + st1.s {v4}[2], [x3], #4 + st1.d {v4}[1], [x3], #8 + +; CHECK: _st1: +; CHECK: st1.b { v4 }[13], [x3] ; encoding: [0x64,0x14,0x00,0x4d] +; CHECK: st1.h { v4 }[2], [x3] ; encoding: [0x64,0x50,0x00,0x0d] +; CHECK: st1.s { v4 }[2], [x3] ; encoding: [0x64,0x80,0x00,0x4d] +; CHECK: st1.d { v4 }[1], [x3] ; encoding: [0x64,0x84,0x00,0x4d] +; CHECK: st1.b { v4 }[13], [x3], x5 ; encoding: [0x64,0x14,0x85,0x4d] +; CHECK: st1.h { v4 }[2], [x3], x5 ; encoding: [0x64,0x50,0x85,0x0d] +; CHECK: st1.s { v4 }[2], [x3], x5 ; encoding: [0x64,0x80,0x85,0x4d] +; CHECK: st1.d { v4 }[1], [x3], x5 ; encoding: [0x64,0x84,0x85,0x4d] +; CHECK: st1.b { v4 }[13], [x3], #1 ; encoding: [0x64,0x14,0x9f,0x4d] +; CHECK: st1.h { v4 }[2], [x3], #2 ; encoding: [0x64,0x50,0x9f,0x0d] +; CHECK: st1.s { v4 }[2], [x3], #4 ; encoding: [0x64,0x80,0x9f,0x4d] +; CHECK: st1.d { v4 }[1], [x3], #8 ; encoding: [0x64,0x84,0x9f,0x4d] + +_st2: + st2.b {v4, v5}[13], [x3] + st2.h {v4, v5}[2], [x3] + st2.s {v4, v5}[2], [x3] + st2.d {v4, v5}[1], [x3] + st2.b {v4, v5}[13], [x3], x5 + st2.h {v4, v5}[2], [x3], x5 + st2.s {v4, v5}[2], [x3], x5 + st2.d {v4, v5}[1], [x3], x5 + st2.b {v4, v5}[13], [x3], #2 + st2.h {v4, v5}[2], [x3], #4 + st2.s {v4, v5}[2], [x3], #8 + st2.d {v4, v5}[1], [x3], #16 + +; CHECK: _st2: +; CHECK: st2.b { v4, v5 }[13], [x3] ; encoding: [0x64,0x14,0x20,0x4d] +; CHECK: st2.h { v4, v5 }[2], [x3] ; encoding: [0x64,0x50,0x20,0x0d] +; CHECK: st2.s { v4, v5 }[2], [x3] ; encoding: [0x64,0x80,0x20,0x4d] +; CHECK: st2.d { v4, v5 }[1], [x3] ; encoding: [0x64,0x84,0x20,0x4d] +; CHECK: st2.b { v4, v5 }[13], [x3], x5 ; encoding: [0x64,0x14,0xa5,0x4d] +; CHECK: st2.h { v4, v5 }[2], [x3], x5 ; encoding: [0x64,0x50,0xa5,0x0d] +; CHECK: st2.s { v4, v5 }[2], [x3], x5 ; encoding: [0x64,0x80,0xa5,0x4d] +; CHECK: st2.d { v4, v5 }[1], [x3], x5 ; encoding: [0x64,0x84,0xa5,0x4d] +; CHECK: st2.b { v4, v5 }[13], [x3], #2 ; encoding: [0x64,0x14,0xbf,0x4d] +; CHECK: st2.h { v4, v5 }[2], [x3], #4 ; encoding: [0x64,0x50,0xbf,0x0d] +; CHECK: st2.s { v4, v5 }[2], [x3], #8 ; encoding: [0x64,0x80,0xbf,0x4d] +; CHECK: st2.d { v4, v5 }[1], [x3], #16 ; encoding: [0x64,0x84,0xbf,0x4d] + + +_st3: + st3.b {v4, v5, v6}[13], [x3] + st3.h {v4, v5, v6}[2], [x3] + st3.s {v4, v5, v6}[2], [x3] + st3.d {v4, v5, v6}[1], [x3] + st3.b {v4, v5, v6}[13], [x3], x5 + st3.h {v4, v5, v6}[2], [x3], x5 + st3.s {v4, v5, v6}[2], [x3], x5 + st3.d {v4, v5, v6}[1], [x3], x5 + st3.b {v4, v5, v6}[13], [x3], #3 + st3.h {v4, v5, v6}[2], [x3], #6 + st3.s {v4, v5, v6}[2], [x3], #12 + st3.d {v4, v5, v6}[1], [x3], #24 + +; CHECK: _st3: +; CHECK: st3.b { v4, v5, v6 }[13], [x3] ; encoding: [0x64,0x34,0x00,0x4d] +; CHECK: st3.h { v4, v5, v6 }[2], [x3] ; encoding: [0x64,0x70,0x00,0x0d] +; CHECK: st3.s { v4, v5, v6 }[2], [x3] ; encoding: [0x64,0xa0,0x00,0x4d] +; CHECK: st3.d { v4, v5, v6 }[1], [x3] ; encoding: [0x64,0xa4,0x00,0x4d] +; CHECK: st3.b { v4, v5, v6 }[13], [x3], x5 ; encoding: [0x64,0x34,0x85,0x4d] +; CHECK: st3.h { v4, v5, v6 }[2], [x3], x5 ; encoding: [0x64,0x70,0x85,0x0d] +; CHECK: st3.s { v4, v5, v6 }[2], [x3], x5 ; encoding: [0x64,0xa0,0x85,0x4d] +; CHECK: st3.d { v4, v5, v6 }[1], [x3], x5 ; encoding: [0x64,0xa4,0x85,0x4d] +; CHECK: st3.b { v4, v5, v6 }[13], [x3], #3 ; encoding: [0x64,0x34,0x9f,0x4d] +; CHECK: st3.h { v4, v5, v6 }[2], [x3], #6 ; encoding: [0x64,0x70,0x9f,0x0d] +; CHECK: st3.s { v4, v5, v6 }[2], [x3], #12 ; encoding: [0x64,0xa0,0x9f,0x4d] +; CHECK: st3.d { v4, v5, v6 }[1], [x3], #24 ; encoding: [0x64,0xa4,0x9f,0x4d] + +_st4: + st4.b {v4, v5, v6, v7}[13], [x3] + st4.h {v4, v5, v6, v7}[2], [x3] + st4.s {v4, v5, v6, v7}[2], [x3] + st4.d {v4, v5, v6, v7}[1], [x3] + st4.b {v4, v5, v6, v7}[13], [x3], x5 + st4.h {v4, v5, v6, v7}[2], [x3], x5 + st4.s {v4, v5, v6, v7}[2], [x3], x5 + st4.d {v4, v5, v6, v7}[1], [x3], x5 + st4.b {v4, v5, v6, v7}[13], [x3], #4 + st4.h {v4, v5, v6, v7}[2], [x3], #8 + st4.s {v4, v5, v6, v7}[2], [x3], #16 + st4.d {v4, v5, v6, v7}[1], [x3], #32 + +; CHECK: _st4: +; CHECK: st4.b { v4, v5, v6, v7 }[13], [x3] ; encoding: [0x64,0x34,0x20,0x4d] +; CHECK: st4.h { v4, v5, v6, v7 }[2], [x3] ; encoding: [0x64,0x70,0x20,0x0d] +; CHECK: st4.s { v4, v5, v6, v7 }[2], [x3] ; encoding: [0x64,0xa0,0x20,0x4d] +; CHECK: st4.d { v4, v5, v6, v7 }[1], [x3] ; encoding: [0x64,0xa4,0x20,0x4d] +; CHECK: st4.b { v4, v5, v6, v7 }[13], [x3], x5 ; encoding: [0x64,0x34,0xa5,0x4d] +; CHECK: st4.h { v4, v5, v6, v7 }[2], [x3], x5 ; encoding: [0x64,0x70,0xa5,0x0d] +; CHECK: st4.s { v4, v5, v6, v7 }[2], [x3], x5 ; encoding: [0x64,0xa0,0xa5,0x4d] +; CHECK: st4.d { v4, v5, v6, v7 }[1], [x3], x5 ; encoding: [0x64,0xa4,0xa5,0x4d] +; CHECK: st4.b { v4, v5, v6, v7 }[13], [x3], #4 ; encoding: [0x64,0x34,0xbf,0x4d] +; CHECK: st4.h { v4, v5, v6, v7 }[2], [x3], #8 ; encoding: [0x64,0x70,0xbf,0x0d] +; CHECK: st4.s { v4, v5, v6, v7 }[2], [x3], #16 ; encoding: [0x64,0xa0,0xbf,0x4d] +; CHECK: st4.d { v4, v5, v6, v7 }[1], [x3], #32 ; encoding: [0x64,0xa4,0xbf,0x4d] + + +;--------- +; ARM verbose syntax equivalents to the above. +;--------- +verbose_syntax: + + ld1 { v1.8b }, [x1] + ld1 { v2.8b, v3.8b }, [x1] + ld1 { v3.8b, v4.8b, v5.8b }, [x1] + ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1] + + ld1 { v1.16b }, [x1] + ld1 { v2.16b, v3.16b }, [x1] + ld1 { v3.16b, v4.16b, v5.16b }, [x1] + ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1] + + ld1 { v1.4h }, [x1] + ld1 { v2.4h, v3.4h }, [x1] + ld1 { v3.4h, v4.4h, v5.4h }, [x1] + ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1] + + ld1 { v1.8h }, [x1] + ld1 { v2.8h, v3.8h }, [x1] + ld1 { v3.8h, v4.8h, v5.8h }, [x1] + ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1] + + ld1 { v1.2s }, [x1] + ld1 { v2.2s, v3.2s }, [x1] + ld1 { v3.2s, v4.2s, v5.2s }, [x1] + ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1] + + ld1 { v1.4s }, [x1] + ld1 { v2.4s, v3.4s }, [x1] + ld1 { v3.4s, v4.4s, v5.4s }, [x1] + ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1] + + ld1 { v1.1d }, [x1] + ld1 { v2.1d, v3.1d }, [x1] + ld1 { v3.1d, v4.1d, v5.1d }, [x1] + ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1] + + ld1 { v1.2d }, [x1] + ld1 { v2.2d, v3.2d }, [x1] + ld1 { v3.2d, v4.2d, v5.2d }, [x1] + ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1] + + st1 { v1.8b }, [x1] + st1 { v2.8b, v3.8b }, [x1] + st1 { v3.8b, v4.8b, v5.8b }, [x1] + st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1] + + st1 { v1.16b }, [x1] + st1 { v2.16b, v3.16b }, [x1] + st1 { v3.16b, v4.16b, v5.16b }, [x1] + st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1] + + st1 { v1.4h }, [x1] + st1 { v2.4h, v3.4h }, [x1] + st1 { v3.4h, v4.4h, v5.4h }, [x1] + st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1] + + st1 { v1.8h }, [x1] + st1 { v2.8h, v3.8h }, [x1] + st1 { v3.8h, v4.8h, v5.8h }, [x1] + st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1] + + st1 { v1.2s }, [x1] + st1 { v2.2s, v3.2s }, [x1] + st1 { v3.2s, v4.2s, v5.2s }, [x1] + st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1] + + st1 { v1.4s }, [x1] + st1 { v2.4s, v3.4s }, [x1] + st1 { v3.4s, v4.4s, v5.4s }, [x1] + st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1] + + st1 { v1.1d }, [x1] + st1 { v2.1d, v3.1d }, [x1] + st1 { v3.1d, v4.1d, v5.1d }, [x1] + st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1] + + st1 { v1.2d }, [x1] + st1 { v2.2d, v3.2d }, [x1] + st1 { v3.2d, v4.2d, v5.2d }, [x1] + st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1] + + ld2 { v3.8b, v4.8b }, [x19] + ld2 { v3.16b, v4.16b }, [x19] + ld2 { v3.4h, v4.4h }, [x19] + ld2 { v3.8h, v4.8h }, [x19] + ld2 { v3.2s, v4.2s }, [x19] + ld2 { v3.4s, v4.4s }, [x19] + ld2 { v3.2d, v4.2d }, [x19] + + st2 { v3.8b, v4.8b }, [x19] + st2 { v3.16b, v4.16b }, [x19] + st2 { v3.4h, v4.4h }, [x19] + st2 { v3.8h, v4.8h }, [x19] + st2 { v3.2s, v4.2s }, [x19] + st2 { v3.4s, v4.4s }, [x19] + st2 { v3.2d, v4.2d }, [x19] + + ld3 { v2.8b, v3.8b, v4.8b }, [x19] + ld3 { v2.16b, v3.16b, v4.16b }, [x19] + ld3 { v2.4h, v3.4h, v4.4h }, [x19] + ld3 { v2.8h, v3.8h, v4.8h }, [x19] + ld3 { v2.2s, v3.2s, v4.2s }, [x19] + ld3 { v2.4s, v3.4s, v4.4s }, [x19] + ld3 { v2.2d, v3.2d, v4.2d }, [x19] + + st3 { v2.8b, v3.8b, v4.8b }, [x19] + st3 { v2.16b, v3.16b, v4.16b }, [x19] + st3 { v2.4h, v3.4h, v4.4h }, [x19] + st3 { v2.8h, v3.8h, v4.8h }, [x19] + st3 { v2.2s, v3.2s, v4.2s }, [x19] + st3 { v2.4s, v3.4s, v4.4s }, [x19] + st3 { v2.2d, v3.2d, v4.2d }, [x19] + + ld4 { v2.8b, v3.8b, v4.8b, v5.8b }, [x19] + ld4 { v2.16b, v3.16b, v4.16b, v5.16b }, [x19] + ld4 { v2.4h, v3.4h, v4.4h, v5.4h }, [x19] + ld4 { v2.8h, v3.8h, v4.8h, v5.8h }, [x19] + ld4 { v2.2s, v3.2s, v4.2s, v5.2s }, [x19] + ld4 { v2.4s, v3.4s, v4.4s, v5.4s }, [x19] + ld4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x19] + + st4 { v2.8b, v3.8b, v4.8b, v5.8b }, [x19] + st4 { v2.16b, v3.16b, v4.16b, v5.16b }, [x19] + st4 { v2.4h, v3.4h, v4.4h, v5.4h }, [x19] + st4 { v2.8h, v3.8h, v4.8h, v5.8h }, [x19] + st4 { v2.2s, v3.2s, v4.2s, v5.2s }, [x19] + st4 { v2.4s, v3.4s, v4.4s, v5.4s }, [x19] + st4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x19] + + ld1 { v1.8b }, [x1], x15 + ld1 { v2.8b, v3.8b }, [x1], x15 + ld1 { v3.8b, v4.8b, v5.8b }, [x1], x15 + ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15 + + ld1 { v1.16b }, [x1], x15 + ld1 { v2.16b, v3.16b }, [x1], x15 + ld1 { v3.16b, v4.16b, v5.16b }, [x1], x15 + ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15 + + ld1 { v1.4h }, [x1], x15 + ld1 { v2.4h, v3.4h }, [x1], x15 + ld1 { v3.4h, v4.4h, v5.4h }, [x1], x15 + ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15 + + ld1 { v1.8h }, [x1], x15 + ld1 { v2.8h, v3.8h }, [x1], x15 + ld1 { v3.8h, v4.8h, v5.8h }, [x1], x15 + ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15 + + ld1 { v1.2s }, [x1], x15 + ld1 { v2.2s, v3.2s }, [x1], x15 + ld1 { v3.2s, v4.2s, v5.2s }, [x1], x15 + ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15 + + ld1 { v1.4s }, [x1], x15 + ld1 { v2.4s, v3.4s }, [x1], x15 + ld1 { v3.4s, v4.4s, v5.4s }, [x1], x15 + ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15 + + ld1 { v1.1d }, [x1], x15 + ld1 { v2.1d, v3.1d }, [x1], x15 + ld1 { v3.1d, v4.1d, v5.1d }, [x1], x15 + ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], x15 + + ld1 { v1.2d }, [x1], x15 + ld1 { v2.2d, v3.2d }, [x1], x15 + ld1 { v3.2d, v4.2d, v5.2d }, [x1], x15 + ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15 + + st1 { v1.8b }, [x1], x15 + st1 { v2.8b, v3.8b }, [x1], x15 + st1 { v3.8b, v4.8b, v5.8b }, [x1], x15 + st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15 + + st1 { v1.16b }, [x1], x15 + st1 { v2.16b, v3.16b }, [x1], x15 + st1 { v3.16b, v4.16b, v5.16b }, [x1], x15 + st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15 + + st1 { v1.4h }, [x1], x15 + st1 { v2.4h, v3.4h }, [x1], x15 + st1 { v3.4h, v4.4h, v5.4h }, [x1], x15 + st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15 + + st1 { v1.8h }, [x1], x15 + st1 { v2.8h, v3.8h }, [x1], x15 + st1 { v3.8h, v4.8h, v5.8h }, [x1], x15 + st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15 + + st1 { v1.2s }, [x1], x15 + st1 { v2.2s, v3.2s }, [x1], x15 + st1 { v3.2s, v4.2s, v5.2s }, [x1], x15 + st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15 + + st1 { v1.4s }, [x1], x15 + st1 { v2.4s, v3.4s }, [x1], x15 + st1 { v3.4s, v4.4s, v5.4s }, [x1], x15 + st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15 + + st1 { v1.1d }, [x1], x15 + st1 { v2.1d, v3.1d }, [x1], x15 + st1 { v3.1d, v4.1d, v5.1d }, [x1], x15 + st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], x15 + + st1 { v1.2d }, [x1], x15 + st1 { v2.2d, v3.2d }, [x1], x15 + st1 { v3.2d, v4.2d, v5.2d }, [x1], x15 + st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15 + + ld1 { v1.8b }, [x1], #8 + ld1 { v2.8b, v3.8b }, [x1], #16 + ld1 { v3.8b, v4.8b, v5.8b }, [x1], #24 + ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32 + + ld1 { v1.16b }, [x1], #16 + ld1 { v2.16b, v3.16b }, [x1], #32 + ld1 { v3.16b, v4.16b, v5.16b }, [x1], #48 + ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64 + + ld1 { v1.4h }, [x1], #8 + ld1 { v2.4h, v3.4h }, [x1], #16 + ld1 { v3.4h, v4.4h, v5.4h }, [x1], #24 + ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32 + + ld1 { v1.8h }, [x1], #16 + ld1 { v2.8h, v3.8h }, [x1], #32 + ld1 { v3.8h, v4.8h, v5.8h }, [x1], #48 + ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64 + + ld1 { v1.2s }, [x1], #8 + ld1 { v2.2s, v3.2s }, [x1], #16 + ld1 { v3.2s, v4.2s, v5.2s }, [x1], #24 + ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32 + + ld1 { v1.4s }, [x1], #16 + ld1 { v2.4s, v3.4s }, [x1], #32 + ld1 { v3.4s, v4.4s, v5.4s }, [x1], #48 + ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64 + + ld1 { v1.1d }, [x1], #8 + ld1 { v2.1d, v3.1d }, [x1], #16 + ld1 { v3.1d, v4.1d, v5.1d }, [x1], #24 + ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], #32 + + ld1 { v1.2d }, [x1], #16 + ld1 { v2.2d, v3.2d }, [x1], #32 + ld1 { v3.2d, v4.2d, v5.2d }, [x1], #48 + ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64 + + st1 { v1.8b }, [x1], #8 + st1 { v2.8b, v3.8b }, [x1], #16 + st1 { v3.8b, v4.8b, v5.8b }, [x1], #24 + st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32 + + st1 { v1.16b }, [x1], #16 + st1 { v2.16b, v3.16b }, [x1], #32 + st1 { v3.16b, v4.16b, v5.16b }, [x1], #48 + st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64 + + st1 { v1.4h }, [x1], #8 + st1 { v2.4h, v3.4h }, [x1], #16 + st1 { v3.4h, v4.4h, v5.4h }, [x1], #24 + st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32 + + st1 { v1.8h }, [x1], #16 + st1 { v2.8h, v3.8h }, [x1], #32 + st1 { v3.8h, v4.8h, v5.8h }, [x1], #48 + st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64 + + st1 { v1.2s }, [x1], #8 + st1 { v2.2s, v3.2s }, [x1], #16 + st1 { v3.2s, v4.2s, v5.2s }, [x1], #24 + st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32 + + st1 { v1.4s }, [x1], #16 + st1 { v2.4s, v3.4s }, [x1], #32 + st1 { v3.4s, v4.4s, v5.4s }, [x1], #48 + st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64 + + st1 { v1.1d }, [x1], #8 + st1 { v2.1d, v3.1d }, [x1], #16 + st1 { v3.1d, v4.1d, v5.1d }, [x1], #24 + st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], #32 + + st1 { v1.2d }, [x1], #16 + st1 { v2.2d, v3.2d }, [x1], #32 + st1 { v3.2d, v4.2d, v5.2d }, [x1], #48 + st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64 + + ld2 { v2.8b, v3.8b }, [x1], x15 + ld2 { v2.16b, v3.16b }, [x1], x15 + ld2 { v2.4h, v3.4h }, [x1], x15 + ld2 { v2.8h, v3.8h }, [x1], x15 + ld2 { v2.2s, v3.2s }, [x1], x15 + ld2 { v2.4s, v3.4s }, [x1], x15 + ld2 { v2.2d, v3.2d }, [x1], x15 + + st2 { v2.8b, v3.8b }, [x1], x15 + st2 { v2.16b, v3.16b }, [x1], x15 + st2 { v2.4h, v3.4h }, [x1], x15 + st2 { v2.8h, v3.8h }, [x1], x15 + st2 { v2.2s, v3.2s }, [x1], x15 + st2 { v2.4s, v3.4s }, [x1], x15 + st2 { v2.2d, v3.2d }, [x1], x15 + + ld2 { v2.8b, v3.8b }, [x1], #16 + ld2 { v2.16b, v3.16b }, [x1], #32 + ld2 { v2.4h, v3.4h }, [x1], #16 + ld2 { v2.8h, v3.8h }, [x1], #32 + ld2 { v2.2s, v3.2s }, [x1], #16 + ld2 { v2.4s, v3.4s }, [x1], #32 + ld2 { v2.2d, v3.2d }, [x1], #32 + + st2 { v2.8b, v3.8b }, [x1], #16 + st2 { v2.16b, v3.16b }, [x1], #32 + st2 { v2.4h, v3.4h }, [x1], #16 + st2 { v2.8h, v3.8h }, [x1], #32 + st2 { v2.2s, v3.2s }, [x1], #16 + st2 { v2.4s, v3.4s }, [x1], #32 + st2 { v2.2d, v3.2d }, [x1], #32 + + ld3 { v3.8b, v4.8b, v5.8b }, [x1], x15 + ld3 { v3.16b, v4.16b, v5.16b }, [x1], x15 + ld3 { v3.4h, v4.4h, v5.4h }, [x1], x15 + ld3 { v3.8h, v4.8h, v5.8h }, [x1], x15 + ld3 { v3.2s, v4.2s, v5.2s }, [x1], x15 + ld3 { v3.4s, v4.4s, v5.4s }, [x1], x15 + ld3 { v3.2d, v4.2d, v5.2d }, [x1], x15 + + st3 { v3.8b, v4.8b, v5.8b }, [x1], x15 + st3 { v3.16b, v4.16b, v5.16b }, [x1], x15 + st3 { v3.4h, v4.4h, v5.4h }, [x1], x15 + st3 { v3.8h, v4.8h, v5.8h }, [x1], x15 + st3 { v3.2s, v4.2s, v5.2s }, [x1], x15 + st3 { v3.4s, v4.4s, v5.4s }, [x1], x15 + st3 { v3.2d, v4.2d, v5.2d }, [x1], x15 + ld3 { v3.8b, v4.8b, v5.8b }, [x1], #24 + + ld3 { v3.16b, v4.16b, v5.16b }, [x1], #48 + ld3 { v3.4h, v4.4h, v5.4h }, [x1], #24 + ld3 { v3.8h, v4.8h, v5.8h }, [x1], #48 + ld3 { v3.2s, v4.2s, v5.2s }, [x1], #24 + ld3 { v3.4s, v4.4s, v5.4s }, [x1], #48 + ld3 { v3.2d, v4.2d, v5.2d }, [x1], #48 + + st3 { v3.8b, v4.8b, v5.8b }, [x1], #24 + st3 { v3.16b, v4.16b, v5.16b }, [x1], #48 + st3 { v3.4h, v4.4h, v5.4h }, [x1], #24 + st3 { v3.8h, v4.8h, v5.8h }, [x1], #48 + st3 { v3.2s, v4.2s, v5.2s }, [x1], #24 + st3 { v3.4s, v4.4s, v5.4s }, [x1], #48 + st3 { v3.2d, v4.2d, v5.2d }, [x1], #48 + + ld4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15 + ld4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15 + ld4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15 + ld4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15 + ld4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15 + ld4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15 + ld4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15 + + st4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15 + st4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15 + st4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15 + st4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15 + st4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15 + st4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15 + st4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15 + + ld4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32 + ld4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64 + ld4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32 + ld4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64 + ld4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32 + ld4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64 + ld4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64 + + st4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32 + st4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64 + st4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32 + st4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64 + st4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32 + st4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64 + st4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64 + + + ld1r { v12.8b }, [x2] + ld1r { v12.8b }, [x2], x3 + ld1r { v12.16b }, [x2] + ld1r { v12.16b }, [x2], x3 + ld1r { v12.4h }, [x2] + ld1r { v12.4h }, [x2], x3 + ld1r { v12.8h }, [x2] + ld1r { v12.8h }, [x2], x3 + ld1r { v12.2s }, [x2] + ld1r { v12.2s }, [x2], x3 + ld1r { v12.4s }, [x2] + ld1r { v12.4s }, [x2], x3 + ld1r { v12.1d }, [x2] + ld1r { v12.1d }, [x2], x3 + ld1r { v12.2d }, [x2] + ld1r { v12.2d }, [x2], x3 + + ld1r { v12.8b }, [x2], #1 + ld1r { v12.16b }, [x2], #1 + ld1r { v12.4h }, [x2], #2 + ld1r { v12.8h }, [x2], #2 + ld1r { v12.2s }, [x2], #4 + ld1r { v12.4s }, [x2], #4 + ld1r { v12.1d }, [x2], #8 + ld1r { v12.2d }, [x2], #8 + ld2r { v3.8b, v4.8b }, [x2] + ld2r { v3.8b, v4.8b }, [x2], x3 + ld2r { v3.16b, v4.16b }, [x2] + ld2r { v3.16b, v4.16b }, [x2], x3 + ld2r { v3.4h, v4.4h }, [x2] + ld2r { v3.4h, v4.4h }, [x2], x3 + ld2r { v3.8h, v4.8h }, [x2] + ld2r { v3.8h, v4.8h }, [x2], x3 + ld2r { v3.2s, v4.2s }, [x2] + ld2r { v3.2s, v4.2s }, [x2], x3 + ld2r { v3.4s, v4.4s }, [x2] + ld2r { v3.4s, v4.4s }, [x2], x3 + ld2r { v3.1d, v4.1d }, [x2] + ld2r { v3.1d, v4.1d }, [x2], x3 + ld2r { v3.2d, v4.2d }, [x2] + ld2r { v3.2d, v4.2d }, [x2], x3 + + ld2r { v3.8b, v4.8b }, [x2], #2 + ld2r { v3.16b, v4.16b }, [x2], #2 + ld2r { v3.4h, v4.4h }, [x2], #4 + ld2r { v3.8h, v4.8h }, [x2], #4 + ld2r { v3.2s, v4.2s }, [x2], #8 + ld2r { v3.4s, v4.4s }, [x2], #8 + ld2r { v3.1d, v4.1d }, [x2], #16 + ld2r { v3.2d, v4.2d }, [x2], #16 + + ld3r { v2.8b, v3.8b, v4.8b }, [x2] + ld3r { v2.8b, v3.8b, v4.8b }, [x2], x3 + ld3r { v2.16b, v3.16b, v4.16b }, [x2] + ld3r { v2.16b, v3.16b, v4.16b }, [x2], x3 + ld3r { v2.4h, v3.4h, v4.4h }, [x2] + ld3r { v2.4h, v3.4h, v4.4h }, [x2], x3 + ld3r { v2.8h, v3.8h, v4.8h }, [x2] + ld3r { v2.8h, v3.8h, v4.8h }, [x2], x3 + ld3r { v2.2s, v3.2s, v4.2s }, [x2] + ld3r { v2.2s, v3.2s, v4.2s }, [x2], x3 + ld3r { v2.4s, v3.4s, v4.4s }, [x2] + ld3r { v2.4s, v3.4s, v4.4s }, [x2], x3 + ld3r { v2.1d, v3.1d, v4.1d }, [x2] + ld3r { v2.1d, v3.1d, v4.1d }, [x2], x3 + ld3r { v2.2d, v3.2d, v4.2d }, [x2] + ld3r { v2.2d, v3.2d, v4.2d }, [x2], x3 + + ld3r { v2.8b, v3.8b, v4.8b }, [x2], #3 + ld3r { v2.16b, v3.16b, v4.16b }, [x2], #3 + ld3r { v2.4h, v3.4h, v4.4h }, [x2], #6 + ld3r { v2.8h, v3.8h, v4.8h }, [x2], #6 + ld3r { v2.2s, v3.2s, v4.2s }, [x2], #12 + ld3r { v2.4s, v3.4s, v4.4s }, [x2], #12 + ld3r { v2.1d, v3.1d, v4.1d }, [x2], #24 + ld3r { v2.2d, v3.2d, v4.2d }, [x2], #24 + + ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2] + ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2], x3 + ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2] + ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2], x3 + ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2] + ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2], x3 + ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2] + ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2], x3 + ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2] + ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2], x3 + ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2] + ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2], x3 + ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2] + ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2], x3 + ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2] + ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2], x3 + + ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2], #4 + ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2], #4 + ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2], #8 + ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2], #8 + ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2], #16 + ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2], #16 + ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2], #32 + ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2], #32 + + ld1 { v6.b }[13], [x3] + ld1 { v6.h }[2], [x3] + ld1 { v6.s }[2], [x3] + ld1 { v6.d }[1], [x3] + ld1 { v6.b }[13], [x3], x5 + ld1 { v6.h }[2], [x3], x5 + ld1 { v6.s }[2], [x3], x5 + ld1 { v6.d }[1], [x3], x5 + ld1 { v6.b }[13], [x3], #1 + ld1 { v6.h }[2], [x3], #2 + ld1 { v6.s }[2], [x3], #4 + ld1 { v6.d }[1], [x3], #8 + + ld2 { v5.b, v6.b }[13], [x3] + ld2 { v5.h, v6.h }[2], [x3] + ld2 { v5.s, v6.s }[2], [x3] + ld2 { v5.d, v6.d }[1], [x3] + ld2 { v5.b, v6.b }[13], [x3], x5 + ld2 { v5.h, v6.h }[2], [x3], x5 + ld2 { v5.s, v6.s }[2], [x3], x5 + ld2 { v5.d, v6.d }[1], [x3], x5 + ld2 { v5.b, v6.b }[13], [x3], #2 + ld2 { v5.h, v6.h }[2], [x3], #4 + ld2 { v5.s, v6.s }[2], [x3], #8 + ld2 { v5.d, v6.d }[1], [x3], #16 + + ld3 { v7.b, v8.b, v9.b }[13], [x3] + ld3 { v7.h, v8.h, v9.h }[2], [x3] + ld3 { v7.s, v8.s, v9.s }[2], [x3] + ld3 { v7.d, v8.d, v9.d }[1], [x3] + ld3 { v7.b, v8.b, v9.b }[13], [x3], x5 + ld3 { v7.h, v8.h, v9.h }[2], [x3], x5 + ld3 { v7.s, v8.s, v9.s }[2], [x3], x5 + ld3 { v7.d, v8.d, v9.d }[1], [x3], x5 + ld3 { v7.b, v8.b, v9.b }[13], [x3], #3 + ld3 { v7.h, v8.h, v9.h }[2], [x3], #6 + ld3 { v7.s, v8.s, v9.s }[2], [x3], #12 + ld3 { v7.d, v8.d, v9.d }[1], [x3], #24 + + ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3] + ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3] + ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3] + ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3] + ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], x5 + ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], x5 + ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], x5 + ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], x5 + ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], #4 + ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], #8 + ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], #16 + ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], #32 + + st1 { v6.b }[13], [x3] + st1 { v6.h }[2], [x3] + st1 { v6.s }[2], [x3] + st1 { v6.d }[1], [x3] + st1 { v6.b }[13], [x3], x5 + st1 { v6.h }[2], [x3], x5 + st1 { v6.s }[2], [x3], x5 + st1 { v6.d }[1], [x3], x5 + st1 { v6.b }[13], [x3], #1 + st1 { v6.h }[2], [x3], #2 + st1 { v6.s }[2], [x3], #4 + st1 { v6.d }[1], [x3], #8 + + + st2 { v5.b, v6.b }[13], [x3] + st2 { v5.h, v6.h }[2], [x3] + st2 { v5.s, v6.s }[2], [x3] + st2 { v5.d, v6.d }[1], [x3] + st2 { v5.b, v6.b }[13], [x3], x5 + st2 { v5.h, v6.h }[2], [x3], x5 + st2 { v5.s, v6.s }[2], [x3], x5 + st2 { v5.d, v6.d }[1], [x3], x5 + st2 { v5.b, v6.b }[13], [x3], #2 + st2 { v5.h, v6.h }[2], [x3], #4 + st2 { v5.s, v6.s }[2], [x3], #8 + st2 { v5.d, v6.d }[1], [x3], #16 + + st3 { v7.b, v8.b, v9.b }[13], [x3] + st3 { v7.h, v8.h, v9.h }[2], [x3] + st3 { v7.s, v8.s, v9.s }[2], [x3] + st3 { v7.d, v8.d, v9.d }[1], [x3] + st3 { v7.b, v8.b, v9.b }[13], [x3], x5 + st3 { v7.h, v8.h, v9.h }[2], [x3], x5 + st3 { v7.s, v8.s, v9.s }[2], [x3], x5 + st3 { v7.d, v8.d, v9.d }[1], [x3], x5 + st3 { v7.b, v8.b, v9.b }[13], [x3], #3 + st3 { v7.h, v8.h, v9.h }[2], [x3], #6 + st3 { v7.s, v8.s, v9.s }[2], [x3], #12 + st3 { v7.d, v8.d, v9.d }[1], [x3], #24 + + st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3] + st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3] + st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3] + st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3] + st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], x5 + st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], x5 + st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], x5 + st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], x5 + st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], #4 + st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], #8 + st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], #16 + st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], #32 + +; CHECK: ld1.8b { v1 }, [x1] ; encoding: [0x21,0x70,0x40,0x0c] +; CHECK: ld1.8b { v2, v3 }, [x1] ; encoding: [0x22,0xa0,0x40,0x0c] +; CHECK: ld1.8b { v3, v4, v5 }, [x1] ; encoding: [0x23,0x60,0x40,0x0c] +; CHECK: ld1.8b { v4, v5, v6, v7 }, [x1] ; encoding: [0x24,0x20,0x40,0x0c] +; CHECK: ld1.16b { v1 }, [x1] ; encoding: [0x21,0x70,0x40,0x4c] +; CHECK: ld1.16b { v2, v3 }, [x1] ; encoding: [0x22,0xa0,0x40,0x4c] +; CHECK: ld1.16b { v3, v4, v5 }, [x1] ; encoding: [0x23,0x60,0x40,0x4c] +; CHECK: ld1.16b { v4, v5, v6, v7 }, [x1] ; encoding: [0x24,0x20,0x40,0x4c] +; CHECK: ld1.4h { v1 }, [x1] ; encoding: [0x21,0x74,0x40,0x0c] +; CHECK: ld1.4h { v2, v3 }, [x1] ; encoding: [0x22,0xa4,0x40,0x0c] +; CHECK: ld1.4h { v3, v4, v5 }, [x1] ; encoding: [0x23,0x64,0x40,0x0c] +; CHECK: ld1.4h { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x24,0x40,0x0c] +; CHECK: ld1.8h { v1 }, [x1] ; encoding: [0x21,0x74,0x40,0x4c] +; CHECK: ld1.8h { v2, v3 }, [x1] ; encoding: [0x22,0xa4,0x40,0x4c] +; CHECK: ld1.8h { v3, v4, v5 }, [x1] ; encoding: [0x23,0x64,0x40,0x4c] +; CHECK: ld1.8h { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x24,0x40,0x4c] +; CHECK: ld1.2s { v1 }, [x1] ; encoding: [0x21,0x78,0x40,0x0c] +; CHECK: ld1.2s { v2, v3 }, [x1] ; encoding: [0x22,0xa8,0x40,0x0c] +; CHECK: ld1.2s { v3, v4, v5 }, [x1] ; encoding: [0x23,0x68,0x40,0x0c] +; CHECK: ld1.2s { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x28,0x40,0x0c] +; CHECK: ld1.4s { v1 }, [x1] ; encoding: [0x21,0x78,0x40,0x4c] +; CHECK: ld1.4s { v2, v3 }, [x1] ; encoding: [0x22,0xa8,0x40,0x4c] +; CHECK: ld1.4s { v3, v4, v5 }, [x1] ; encoding: [0x23,0x68,0x40,0x4c] +; CHECK: ld1.4s { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x28,0x40,0x4c] +; CHECK: ld1.1d { v1 }, [x1] ; encoding: [0x21,0x7c,0x40,0x0c] +; CHECK: ld1.1d { v2, v3 }, [x1] ; encoding: [0x22,0xac,0x40,0x0c] +; CHECK: ld1.1d { v3, v4, v5 }, [x1] ; encoding: [0x23,0x6c,0x40,0x0c] +; CHECK: ld1.1d { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x2c,0x40,0x0c] +; CHECK: ld1.2d { v1 }, [x1] ; encoding: [0x21,0x7c,0x40,0x4c] +; CHECK: ld1.2d { v2, v3 }, [x1] ; encoding: [0x22,0xac,0x40,0x4c] +; CHECK: ld1.2d { v3, v4, v5 }, [x1] ; encoding: [0x23,0x6c,0x40,0x4c] +; CHECK: ld1.2d { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x2c,0x40,0x4c] +; CHECK: st1.8b { v1 }, [x1] ; encoding: [0x21,0x70,0x00,0x0c] +; CHECK: st1.8b { v2, v3 }, [x1] ; encoding: [0x22,0xa0,0x00,0x0c] +; CHECK: st1.8b { v3, v4, v5 }, [x1] ; encoding: [0x23,0x60,0x00,0x0c] +; CHECK: st1.8b { v4, v5, v6, v7 }, [x1] ; encoding: [0x24,0x20,0x00,0x0c] +; CHECK: st1.16b { v1 }, [x1] ; encoding: [0x21,0x70,0x00,0x4c] +; CHECK: st1.16b { v2, v3 }, [x1] ; encoding: [0x22,0xa0,0x00,0x4c] +; CHECK: st1.16b { v3, v4, v5 }, [x1] ; encoding: [0x23,0x60,0x00,0x4c] +; CHECK: st1.16b { v4, v5, v6, v7 }, [x1] ; encoding: [0x24,0x20,0x00,0x4c] +; CHECK: st1.4h { v1 }, [x1] ; encoding: [0x21,0x74,0x00,0x0c] +; CHECK: st1.4h { v2, v3 }, [x1] ; encoding: [0x22,0xa4,0x00,0x0c] +; CHECK: st1.4h { v3, v4, v5 }, [x1] ; encoding: [0x23,0x64,0x00,0x0c] +; CHECK: st1.4h { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x24,0x00,0x0c] +; CHECK: st1.8h { v1 }, [x1] ; encoding: [0x21,0x74,0x00,0x4c] +; CHECK: st1.8h { v2, v3 }, [x1] ; encoding: [0x22,0xa4,0x00,0x4c] +; CHECK: st1.8h { v3, v4, v5 }, [x1] ; encoding: [0x23,0x64,0x00,0x4c] +; CHECK: st1.8h { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x24,0x00,0x4c] +; CHECK: st1.2s { v1 }, [x1] ; encoding: [0x21,0x78,0x00,0x0c] +; CHECK: st1.2s { v2, v3 }, [x1] ; encoding: [0x22,0xa8,0x00,0x0c] +; CHECK: st1.2s { v3, v4, v5 }, [x1] ; encoding: [0x23,0x68,0x00,0x0c] +; CHECK: st1.2s { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x28,0x00,0x0c] +; CHECK: st1.4s { v1 }, [x1] ; encoding: [0x21,0x78,0x00,0x4c] +; CHECK: st1.4s { v2, v3 }, [x1] ; encoding: [0x22,0xa8,0x00,0x4c] +; CHECK: st1.4s { v3, v4, v5 }, [x1] ; encoding: [0x23,0x68,0x00,0x4c] +; CHECK: st1.4s { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x28,0x00,0x4c] +; CHECK: st1.1d { v1 }, [x1] ; encoding: [0x21,0x7c,0x00,0x0c] +; CHECK: st1.1d { v2, v3 }, [x1] ; encoding: [0x22,0xac,0x00,0x0c] +; CHECK: st1.1d { v3, v4, v5 }, [x1] ; encoding: [0x23,0x6c,0x00,0x0c] +; CHECK: st1.1d { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x2c,0x00,0x0c] +; CHECK: st1.2d { v1 }, [x1] ; encoding: [0x21,0x7c,0x00,0x4c] +; CHECK: st1.2d { v2, v3 }, [x1] ; encoding: [0x22,0xac,0x00,0x4c] +; CHECK: st1.2d { v3, v4, v5 }, [x1] ; encoding: [0x23,0x6c,0x00,0x4c] +; CHECK: st1.2d { v7, v8, v9, v10 }, [x1] ; encoding: [0x27,0x2c,0x00,0x4c] +; CHECK: ld2.8b { v3, v4 }, [x19] ; encoding: [0x63,0x82,0x40,0x0c] +; CHECK: ld2.16b { v3, v4 }, [x19] ; encoding: [0x63,0x82,0x40,0x4c] +; CHECK: ld2.4h { v3, v4 }, [x19] ; encoding: [0x63,0x86,0x40,0x0c] +; CHECK: ld2.8h { v3, v4 }, [x19] ; encoding: [0x63,0x86,0x40,0x4c] +; CHECK: ld2.2s { v3, v4 }, [x19] ; encoding: [0x63,0x8a,0x40,0x0c] +; CHECK: ld2.4s { v3, v4 }, [x19] ; encoding: [0x63,0x8a,0x40,0x4c] +; CHECK: ld2.2d { v3, v4 }, [x19] ; encoding: [0x63,0x8e,0x40,0x4c] +; CHECK: st2.8b { v3, v4 }, [x19] ; encoding: [0x63,0x82,0x00,0x0c] +; CHECK: st2.16b { v3, v4 }, [x19] ; encoding: [0x63,0x82,0x00,0x4c] +; CHECK: st2.4h { v3, v4 }, [x19] ; encoding: [0x63,0x86,0x00,0x0c] +; CHECK: st2.8h { v3, v4 }, [x19] ; encoding: [0x63,0x86,0x00,0x4c] +; CHECK: st2.2s { v3, v4 }, [x19] ; encoding: [0x63,0x8a,0x00,0x0c] +; CHECK: st2.4s { v3, v4 }, [x19] ; encoding: [0x63,0x8a,0x00,0x4c] +; CHECK: st2.2d { v3, v4 }, [x19] ; encoding: [0x63,0x8e,0x00,0x4c] +; CHECK: ld3.8b { v2, v3, v4 }, [x19] ; encoding: [0x62,0x42,0x40,0x0c] +; CHECK: ld3.16b { v2, v3, v4 }, [x19] ; encoding: [0x62,0x42,0x40,0x4c] +; CHECK: ld3.4h { v2, v3, v4 }, [x19] ; encoding: [0x62,0x46,0x40,0x0c] +; CHECK: ld3.8h { v2, v3, v4 }, [x19] ; encoding: [0x62,0x46,0x40,0x4c] +; CHECK: ld3.2s { v2, v3, v4 }, [x19] ; encoding: [0x62,0x4a,0x40,0x0c] +; CHECK: ld3.4s { v2, v3, v4 }, [x19] ; encoding: [0x62,0x4a,0x40,0x4c] +; CHECK: ld3.2d { v2, v3, v4 }, [x19] ; encoding: [0x62,0x4e,0x40,0x4c] +; CHECK: st3.8b { v2, v3, v4 }, [x19] ; encoding: [0x62,0x42,0x00,0x0c] +; CHECK: st3.16b { v2, v3, v4 }, [x19] ; encoding: [0x62,0x42,0x00,0x4c] +; CHECK: st3.4h { v2, v3, v4 }, [x19] ; encoding: [0x62,0x46,0x00,0x0c] +; CHECK: st3.8h { v2, v3, v4 }, [x19] ; encoding: [0x62,0x46,0x00,0x4c] +; CHECK: st3.2s { v2, v3, v4 }, [x19] ; encoding: [0x62,0x4a,0x00,0x0c] +; CHECK: st3.4s { v2, v3, v4 }, [x19] ; encoding: [0x62,0x4a,0x00,0x4c] +; CHECK: st3.2d { v2, v3, v4 }, [x19] ; encoding: [0x62,0x4e,0x00,0x4c] +; CHECK: ld4.8b { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x02,0x40,0x0c] +; CHECK: ld4.16b { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x02,0x40,0x4c] +; CHECK: ld4.4h { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x06,0x40,0x0c] +; CHECK: ld4.8h { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x06,0x40,0x4c] +; CHECK: ld4.2s { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0a,0x40,0x0c] +; CHECK: ld4.4s { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0a,0x40,0x4c] +; CHECK: ld4.2d { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0e,0x40,0x4c] +; CHECK: st4.8b { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x02,0x00,0x0c] +; CHECK: st4.16b { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x02,0x00,0x4c] +; CHECK: st4.4h { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x06,0x00,0x0c] +; CHECK: st4.8h { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x06,0x00,0x4c] +; CHECK: st4.2s { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0a,0x00,0x0c] +; CHECK: st4.4s { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0a,0x00,0x4c] +; CHECK: st4.2d { v2, v3, v4, v5 }, [x19] ; encoding: [0x62,0x0e,0x00,0x4c] +; CHECK: ld1.8b { v1 }, [x1], x15 ; encoding: [0x21,0x70,0xcf,0x0c] +; CHECK: ld1.8b { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa0,0xcf,0x0c] +; CHECK: ld1.8b { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x60,0xcf,0x0c] +; CHECK: ld1.8b { v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x20,0xcf,0x0c] +; CHECK: ld1.16b { v1 }, [x1], x15 ; encoding: [0x21,0x70,0xcf,0x4c] +; CHECK: ld1.16b { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa0,0xcf,0x4c] +; CHECK: ld1.16b { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x60,0xcf,0x4c] +; CHECK: ld1.16b { v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x20,0xcf,0x4c] +; CHECK: ld1.4h { v1 }, [x1], x15 ; encoding: [0x21,0x74,0xcf,0x0c] +; CHECK: ld1.4h { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa4,0xcf,0x0c] +; CHECK: ld1.4h { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x64,0xcf,0x0c] +; CHECK: ld1.4h { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x24,0xcf,0x0c] +; CHECK: ld1.8h { v1 }, [x1], x15 ; encoding: [0x21,0x74,0xcf,0x4c] +; CHECK: ld1.8h { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa4,0xcf,0x4c] +; CHECK: ld1.8h { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x64,0xcf,0x4c] +; CHECK: ld1.8h { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x24,0xcf,0x4c] +; CHECK: ld1.2s { v1 }, [x1], x15 ; encoding: [0x21,0x78,0xcf,0x0c] +; CHECK: ld1.2s { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa8,0xcf,0x0c] +; CHECK: ld1.2s { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x68,0xcf,0x0c] +; CHECK: ld1.2s { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x28,0xcf,0x0c] +; CHECK: ld1.4s { v1 }, [x1], x15 ; encoding: [0x21,0x78,0xcf,0x4c] +; CHECK: ld1.4s { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa8,0xcf,0x4c] +; CHECK: ld1.4s { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x68,0xcf,0x4c] +; CHECK: ld1.4s { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x28,0xcf,0x4c] +; CHECK: ld1.1d { v1 }, [x1], x15 ; encoding: [0x21,0x7c,0xcf,0x0c] +; CHECK: ld1.1d { v2, v3 }, [x1], x15 ; encoding: [0x22,0xac,0xcf,0x0c] +; CHECK: ld1.1d { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x6c,0xcf,0x0c] +; CHECK: ld1.1d { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x2c,0xcf,0x0c] +; CHECK: ld1.2d { v1 }, [x1], x15 ; encoding: [0x21,0x7c,0xcf,0x4c] +; CHECK: ld1.2d { v2, v3 }, [x1], x15 ; encoding: [0x22,0xac,0xcf,0x4c] +; CHECK: ld1.2d { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x6c,0xcf,0x4c] +; CHECK: ld1.2d { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x2c,0xcf,0x4c] +; CHECK: st1.8b { v1 }, [x1], x15 ; encoding: [0x21,0x70,0x8f,0x0c] +; CHECK: st1.8b { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa0,0x8f,0x0c] +; CHECK: st1.8b { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x60,0x8f,0x0c] +; CHECK: st1.8b { v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x20,0x8f,0x0c] +; CHECK: st1.16b { v1 }, [x1], x15 ; encoding: [0x21,0x70,0x8f,0x4c] +; CHECK: st1.16b { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa0,0x8f,0x4c] +; CHECK: st1.16b { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x60,0x8f,0x4c] +; CHECK: st1.16b { v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x20,0x8f,0x4c] +; CHECK: st1.4h { v1 }, [x1], x15 ; encoding: [0x21,0x74,0x8f,0x0c] +; CHECK: st1.4h { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa4,0x8f,0x0c] +; CHECK: st1.4h { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x64,0x8f,0x0c] +; CHECK: st1.4h { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x24,0x8f,0x0c] +; CHECK: st1.8h { v1 }, [x1], x15 ; encoding: [0x21,0x74,0x8f,0x4c] +; CHECK: st1.8h { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa4,0x8f,0x4c] +; CHECK: st1.8h { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x64,0x8f,0x4c] +; CHECK: st1.8h { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x24,0x8f,0x4c] +; CHECK: st1.2s { v1 }, [x1], x15 ; encoding: [0x21,0x78,0x8f,0x0c] +; CHECK: st1.2s { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa8,0x8f,0x0c] +; CHECK: st1.2s { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x68,0x8f,0x0c] +; CHECK: st1.2s { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x28,0x8f,0x0c] +; CHECK: st1.4s { v1 }, [x1], x15 ; encoding: [0x21,0x78,0x8f,0x4c] +; CHECK: st1.4s { v2, v3 }, [x1], x15 ; encoding: [0x22,0xa8,0x8f,0x4c] +; CHECK: st1.4s { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x68,0x8f,0x4c] +; CHECK: st1.4s { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x28,0x8f,0x4c] +; CHECK: st1.1d { v1 }, [x1], x15 ; encoding: [0x21,0x7c,0x8f,0x0c] +; CHECK: st1.1d { v2, v3 }, [x1], x15 ; encoding: [0x22,0xac,0x8f,0x0c] +; CHECK: st1.1d { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x6c,0x8f,0x0c] +; CHECK: st1.1d { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x2c,0x8f,0x0c] +; CHECK: st1.2d { v1 }, [x1], x15 ; encoding: [0x21,0x7c,0x8f,0x4c] +; CHECK: st1.2d { v2, v3 }, [x1], x15 ; encoding: [0x22,0xac,0x8f,0x4c] +; CHECK: st1.2d { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x6c,0x8f,0x4c] +; CHECK: st1.2d { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x2c,0x8f,0x4c] +; CHECK: ld1.8b { v1 }, [x1], #8 ; encoding: [0x21,0x70,0xdf,0x0c] +; CHECK: ld1.8b { v2, v3 }, [x1], #16 ; encoding: [0x22,0xa0,0xdf,0x0c] +; CHECK: ld1.8b { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x60,0xdf,0x0c] +; CHECK: ld1.8b { v4, v5, v6, v7 }, [x1], #32 ; encoding: [0x24,0x20,0xdf,0x0c] +; CHECK: ld1.16b { v1 }, [x1], #16 ; encoding: [0x21,0x70,0xdf,0x4c] +; CHECK: ld1.16b { v2, v3 }, [x1], #32 ; encoding: [0x22,0xa0,0xdf,0x4c] +; CHECK: ld1.16b { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x60,0xdf,0x4c] +; CHECK: ld1.16b { v4, v5, v6, v7 }, [x1], #64 ; encoding: [0x24,0x20,0xdf,0x4c] +; CHECK: ld1.4h { v1 }, [x1], #8 ; encoding: [0x21,0x74,0xdf,0x0c] +; CHECK: ld1.4h { v2, v3 }, [x1], #16 ; encoding: [0x22,0xa4,0xdf,0x0c] +; CHECK: ld1.4h { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x64,0xdf,0x0c] +; CHECK: ld1.4h { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x24,0xdf,0x0c] +; CHECK: ld1.8h { v1 }, [x1], #16 ; encoding: [0x21,0x74,0xdf,0x4c] +; CHECK: ld1.8h { v2, v3 }, [x1], #32 ; encoding: [0x22,0xa4,0xdf,0x4c] +; CHECK: ld1.8h { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x64,0xdf,0x4c] +; CHECK: ld1.8h { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x24,0xdf,0x4c] +; CHECK: ld1.2s { v1 }, [x1], #8 ; encoding: [0x21,0x78,0xdf,0x0c] +; CHECK: ld1.2s { v2, v3 }, [x1], #16 ; encoding: [0x22,0xa8,0xdf,0x0c] +; CHECK: ld1.2s { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x68,0xdf,0x0c] +; CHECK: ld1.2s { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x28,0xdf,0x0c] +; CHECK: ld1.4s { v1 }, [x1], #16 ; encoding: [0x21,0x78,0xdf,0x4c] +; CHECK: ld1.4s { v2, v3 }, [x1], #32 ; encoding: [0x22,0xa8,0xdf,0x4c] +; CHECK: ld1.4s { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x68,0xdf,0x4c] +; CHECK: ld1.4s { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x28,0xdf,0x4c] +; CHECK: ld1.1d { v1 }, [x1], #8 ; encoding: [0x21,0x7c,0xdf,0x0c] +; CHECK: ld1.1d { v2, v3 }, [x1], #16 ; encoding: [0x22,0xac,0xdf,0x0c] +; CHECK: ld1.1d { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x6c,0xdf,0x0c] +; CHECK: ld1.1d { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x2c,0xdf,0x0c] +; CHECK: ld1.2d { v1 }, [x1], #16 ; encoding: [0x21,0x7c,0xdf,0x4c] +; CHECK: ld1.2d { v2, v3 }, [x1], #32 ; encoding: [0x22,0xac,0xdf,0x4c] +; CHECK: ld1.2d { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x6c,0xdf,0x4c] +; CHECK: ld1.2d { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x2c,0xdf,0x4c] +; CHECK: st1.8b { v1 }, [x1], #8 ; encoding: [0x21,0x70,0x9f,0x0c] +; CHECK: st1.8b { v2, v3 }, [x1], #16 ; encoding: [0x22,0xa0,0x9f,0x0c] +; CHECK: st1.8b { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x60,0x9f,0x0c] +; CHECK: st1.8b { v4, v5, v6, v7 }, [x1], #32 ; encoding: [0x24,0x20,0x9f,0x0c] +; CHECK: st1.16b { v1 }, [x1], #16 ; encoding: [0x21,0x70,0x9f,0x4c] +; CHECK: st1.16b { v2, v3 }, [x1], #32 ; encoding: [0x22,0xa0,0x9f,0x4c] +; CHECK: st1.16b { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x60,0x9f,0x4c] +; CHECK: st1.16b { v4, v5, v6, v7 }, [x1], #64 ; encoding: [0x24,0x20,0x9f,0x4c] +; CHECK: st1.4h { v1 }, [x1], #8 ; encoding: [0x21,0x74,0x9f,0x0c] +; CHECK: st1.4h { v2, v3 }, [x1], #16 ; encoding: [0x22,0xa4,0x9f,0x0c] +; CHECK: st1.4h { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x64,0x9f,0x0c] +; CHECK: st1.4h { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x24,0x9f,0x0c] +; CHECK: st1.8h { v1 }, [x1], #16 ; encoding: [0x21,0x74,0x9f,0x4c] +; CHECK: st1.8h { v2, v3 }, [x1], #32 ; encoding: [0x22,0xa4,0x9f,0x4c] +; CHECK: st1.8h { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x64,0x9f,0x4c] +; CHECK: st1.8h { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x24,0x9f,0x4c] +; CHECK: st1.2s { v1 }, [x1], #8 ; encoding: [0x21,0x78,0x9f,0x0c] +; CHECK: st1.2s { v2, v3 }, [x1], #16 ; encoding: [0x22,0xa8,0x9f,0x0c] +; CHECK: st1.2s { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x68,0x9f,0x0c] +; CHECK: st1.2s { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x28,0x9f,0x0c] +; CHECK: st1.4s { v1 }, [x1], #16 ; encoding: [0x21,0x78,0x9f,0x4c] +; CHECK: st1.4s { v2, v3 }, [x1], #32 ; encoding: [0x22,0xa8,0x9f,0x4c] +; CHECK: st1.4s { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x68,0x9f,0x4c] +; CHECK: st1.4s { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x28,0x9f,0x4c] +; CHECK: st1.1d { v1 }, [x1], #8 ; encoding: [0x21,0x7c,0x9f,0x0c] +; CHECK: st1.1d { v2, v3 }, [x1], #16 ; encoding: [0x22,0xac,0x9f,0x0c] +; CHECK: st1.1d { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x6c,0x9f,0x0c] +; CHECK: st1.1d { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x2c,0x9f,0x0c] +; CHECK: st1.2d { v1 }, [x1], #16 ; encoding: [0x21,0x7c,0x9f,0x4c] +; CHECK: st1.2d { v2, v3 }, [x1], #32 ; encoding: [0x22,0xac,0x9f,0x4c] +; CHECK: st1.2d { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x6c,0x9f,0x4c] +; CHECK: st1.2d { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x2c,0x9f,0x4c] +; CHECK: ld2.8b { v2, v3 }, [x1], x15 ; encoding: [0x22,0x80,0xcf,0x0c] +; CHECK: ld2.16b { v2, v3 }, [x1], x15 ; encoding: [0x22,0x80,0xcf,0x4c] +; CHECK: ld2.4h { v2, v3 }, [x1], x15 ; encoding: [0x22,0x84,0xcf,0x0c] +; CHECK: ld2.8h { v2, v3 }, [x1], x15 ; encoding: [0x22,0x84,0xcf,0x4c] +; CHECK: ld2.2s { v2, v3 }, [x1], x15 ; encoding: [0x22,0x88,0xcf,0x0c] +; CHECK: ld2.4s { v2, v3 }, [x1], x15 ; encoding: [0x22,0x88,0xcf,0x4c] +; CHECK: ld2.2d { v2, v3 }, [x1], x15 ; encoding: [0x22,0x8c,0xcf,0x4c] +; CHECK: st2.8b { v2, v3 }, [x1], x15 ; encoding: [0x22,0x80,0x8f,0x0c] +; CHECK: st2.16b { v2, v3 }, [x1], x15 ; encoding: [0x22,0x80,0x8f,0x4c] +; CHECK: st2.4h { v2, v3 }, [x1], x15 ; encoding: [0x22,0x84,0x8f,0x0c] +; CHECK: st2.8h { v2, v3 }, [x1], x15 ; encoding: [0x22,0x84,0x8f,0x4c] +; CHECK: st2.2s { v2, v3 }, [x1], x15 ; encoding: [0x22,0x88,0x8f,0x0c] +; CHECK: st2.4s { v2, v3 }, [x1], x15 ; encoding: [0x22,0x88,0x8f,0x4c] +; CHECK: st2.2d { v2, v3 }, [x1], x15 ; encoding: [0x22,0x8c,0x8f,0x4c] +; CHECK: ld2.8b { v2, v3 }, [x1], #16 ; encoding: [0x22,0x80,0xdf,0x0c] +; CHECK: ld2.16b { v2, v3 }, [x1], #32 ; encoding: [0x22,0x80,0xdf,0x4c] +; CHECK: ld2.4h { v2, v3 }, [x1], #16 ; encoding: [0x22,0x84,0xdf,0x0c] +; CHECK: ld2.8h { v2, v3 }, [x1], #32 ; encoding: [0x22,0x84,0xdf,0x4c] +; CHECK: ld2.2s { v2, v3 }, [x1], #16 ; encoding: [0x22,0x88,0xdf,0x0c] +; CHECK: ld2.4s { v2, v3 }, [x1], #32 ; encoding: [0x22,0x88,0xdf,0x4c] +; CHECK: ld2.2d { v2, v3 }, [x1], #32 ; encoding: [0x22,0x8c,0xdf,0x4c] +; CHECK: st2.8b { v2, v3 }, [x1], #16 ; encoding: [0x22,0x80,0x9f,0x0c] +; CHECK: st2.16b { v2, v3 }, [x1], #32 ; encoding: [0x22,0x80,0x9f,0x4c] +; CHECK: st2.4h { v2, v3 }, [x1], #16 ; encoding: [0x22,0x84,0x9f,0x0c] +; CHECK: st2.8h { v2, v3 }, [x1], #32 ; encoding: [0x22,0x84,0x9f,0x4c] +; CHECK: st2.2s { v2, v3 }, [x1], #16 ; encoding: [0x22,0x88,0x9f,0x0c] +; CHECK: st2.4s { v2, v3 }, [x1], #32 ; encoding: [0x22,0x88,0x9f,0x4c] +; CHECK: st2.2d { v2, v3 }, [x1], #32 ; encoding: [0x22,0x8c,0x9f,0x4c] +; CHECK: ld3.8b { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x40,0xcf,0x0c] +; CHECK: ld3.16b { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x40,0xcf,0x4c] +; CHECK: ld3.4h { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x44,0xcf,0x0c] +; CHECK: ld3.8h { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x44,0xcf,0x4c] +; CHECK: ld3.2s { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x48,0xcf,0x0c] +; CHECK: ld3.4s { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x48,0xcf,0x4c] +; CHECK: ld3.2d { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x4c,0xcf,0x4c] +; CHECK: st3.8b { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x40,0x8f,0x0c] +; CHECK: st3.16b { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x40,0x8f,0x4c] +; CHECK: st3.4h { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x44,0x8f,0x0c] +; CHECK: st3.8h { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x44,0x8f,0x4c] +; CHECK: st3.2s { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x48,0x8f,0x0c] +; CHECK: st3.4s { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x48,0x8f,0x4c] +; CHECK: st3.2d { v3, v4, v5 }, [x1], x15 ; encoding: [0x23,0x4c,0x8f,0x4c] +; CHECK: ld3.8b { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x40,0xdf,0x0c] +; CHECK: ld3.16b { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x40,0xdf,0x4c] +; CHECK: ld3.4h { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x44,0xdf,0x0c] +; CHECK: ld3.8h { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x44,0xdf,0x4c] +; CHECK: ld3.2s { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x48,0xdf,0x0c] +; CHECK: ld3.4s { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x48,0xdf,0x4c] +; CHECK: ld3.2d { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x4c,0xdf,0x4c] +; CHECK: st3.8b { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x40,0x9f,0x0c] +; CHECK: st3.16b { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x40,0x9f,0x4c] +; CHECK: st3.4h { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x44,0x9f,0x0c] +; CHECK: st3.8h { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x44,0x9f,0x4c] +; CHECK: st3.2s { v3, v4, v5 }, [x1], #24 ; encoding: [0x23,0x48,0x9f,0x0c] +; CHECK: st3.4s { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x48,0x9f,0x4c] +; CHECK: st3.2d { v3, v4, v5 }, [x1], #48 ; encoding: [0x23,0x4c,0x9f,0x4c] +; CHECK: ld4.8b { v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x00,0xcf,0x0c] +; CHECK: ld4.16b { v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x00,0xcf,0x4c] +; CHECK: ld4.4h { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x04,0xcf,0x0c] +; CHECK: ld4.8h { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x04,0xcf,0x4c] +; CHECK: ld4.2s { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x08,0xcf,0x0c] +; CHECK: ld4.4s { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x08,0xcf,0x4c] +; CHECK: ld4.2d { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x0c,0xcf,0x4c] +; CHECK: st4.8b { v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x00,0x8f,0x0c] +; CHECK: st4.16b { v4, v5, v6, v7 }, [x1], x15 ; encoding: [0x24,0x00,0x8f,0x4c] +; CHECK: st4.4h { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x04,0x8f,0x0c] +; CHECK: st4.8h { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x04,0x8f,0x4c] +; CHECK: st4.2s { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x08,0x8f,0x0c] +; CHECK: st4.4s { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x08,0x8f,0x4c] +; CHECK: st4.2d { v7, v8, v9, v10 }, [x1], x15 ; encoding: [0x27,0x0c,0x8f,0x4c] +; CHECK: ld4.8b { v4, v5, v6, v7 }, [x1], #32 ; encoding: [0x24,0x00,0xdf,0x0c] +; CHECK: ld4.16b { v4, v5, v6, v7 }, [x1], #64 ; encoding: [0x24,0x00,0xdf,0x4c] +; CHECK: ld4.4h { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x04,0xdf,0x0c] +; CHECK: ld4.8h { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x04,0xdf,0x4c] +; CHECK: ld4.2s { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x08,0xdf,0x0c] +; CHECK: ld4.4s { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x08,0xdf,0x4c] +; CHECK: ld4.2d { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x0c,0xdf,0x4c] +; CHECK: st4.8b { v4, v5, v6, v7 }, [x1], #32 ; encoding: [0x24,0x00,0x9f,0x0c] +; CHECK: st4.16b { v4, v5, v6, v7 }, [x1], #64 ; encoding: [0x24,0x00,0x9f,0x4c] +; CHECK: st4.4h { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x04,0x9f,0x0c] +; CHECK: st4.8h { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x04,0x9f,0x4c] +; CHECK: st4.2s { v7, v8, v9, v10 }, [x1], #32 ; encoding: [0x27,0x08,0x9f,0x0c] +; CHECK: st4.4s { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x08,0x9f,0x4c] +; CHECK: st4.2d { v7, v8, v9, v10 }, [x1], #64 ; encoding: [0x27,0x0c,0x9f,0x4c] +; CHECK: ld1r.8b { v12 }, [x2] ; encoding: [0x4c,0xc0,0x40,0x0d] +; CHECK: ld1r.8b { v12 }, [x2], x3 ; encoding: [0x4c,0xc0,0xc3,0x0d] +; CHECK: ld1r.16b { v12 }, [x2] ; encoding: [0x4c,0xc0,0x40,0x4d] +; CHECK: ld1r.16b { v12 }, [x2], x3 ; encoding: [0x4c,0xc0,0xc3,0x4d] +; CHECK: ld1r.4h { v12 }, [x2] ; encoding: [0x4c,0xc4,0x40,0x0d] +; CHECK: ld1r.4h { v12 }, [x2], x3 ; encoding: [0x4c,0xc4,0xc3,0x0d] +; CHECK: ld1r.8h { v12 }, [x2] ; encoding: [0x4c,0xc4,0x40,0x4d] +; CHECK: ld1r.8h { v12 }, [x2], x3 ; encoding: [0x4c,0xc4,0xc3,0x4d] +; CHECK: ld1r.2s { v12 }, [x2] ; encoding: [0x4c,0xc8,0x40,0x0d] +; CHECK: ld1r.2s { v12 }, [x2], x3 ; encoding: [0x4c,0xc8,0xc3,0x0d] +; CHECK: ld1r.4s { v12 }, [x2] ; encoding: [0x4c,0xc8,0x40,0x4d] +; CHECK: ld1r.4s { v12 }, [x2], x3 ; encoding: [0x4c,0xc8,0xc3,0x4d] +; CHECK: ld1r.1d { v12 }, [x2] ; encoding: [0x4c,0xcc,0x40,0x0d] +; CHECK: ld1r.1d { v12 }, [x2], x3 ; encoding: [0x4c,0xcc,0xc3,0x0d] +; CHECK: ld1r.2d { v12 }, [x2] ; encoding: [0x4c,0xcc,0x40,0x4d] +; CHECK: ld1r.2d { v12 }, [x2], x3 ; encoding: [0x4c,0xcc,0xc3,0x4d] +; CHECK: ld1r.8b { v12 }, [x2], #1 ; encoding: [0x4c,0xc0,0xdf,0x0d] +; CHECK: ld1r.16b { v12 }, [x2], #1 ; encoding: [0x4c,0xc0,0xdf,0x4d] +; CHECK: ld1r.4h { v12 }, [x2], #2 ; encoding: [0x4c,0xc4,0xdf,0x0d] +; CHECK: ld1r.8h { v12 }, [x2], #2 ; encoding: [0x4c,0xc4,0xdf,0x4d] +; CHECK: ld1r.2s { v12 }, [x2], #4 ; encoding: [0x4c,0xc8,0xdf,0x0d] +; CHECK: ld1r.4s { v12 }, [x2], #4 ; encoding: [0x4c,0xc8,0xdf,0x4d] +; CHECK: ld1r.1d { v12 }, [x2], #8 ; encoding: [0x4c,0xcc,0xdf,0x0d] +; CHECK: ld1r.2d { v12 }, [x2], #8 ; encoding: [0x4c,0xcc,0xdf,0x4d] +; CHECK: ld2r.8b { v3, v4 }, [x2] ; encoding: [0x43,0xc0,0x60,0x0d] +; CHECK: ld2r.8b { v3, v4 }, [x2], x3 ; encoding: [0x43,0xc0,0xe3,0x0d] +; CHECK: ld2r.16b { v3, v4 }, [x2] ; encoding: [0x43,0xc0,0x60,0x4d] +; CHECK: ld2r.16b { v3, v4 }, [x2], x3 ; encoding: [0x43,0xc0,0xe3,0x4d] +; CHECK: ld2r.4h { v3, v4 }, [x2] ; encoding: [0x43,0xc4,0x60,0x0d] +; CHECK: ld2r.4h { v3, v4 }, [x2], x3 ; encoding: [0x43,0xc4,0xe3,0x0d] +; CHECK: ld2r.8h { v3, v4 }, [x2] ; encoding: [0x43,0xc4,0x60,0x4d] +; CHECK: ld2r.8h { v3, v4 }, [x2], x3 ; encoding: [0x43,0xc4,0xe3,0x4d] +; CHECK: ld2r.2s { v3, v4 }, [x2] ; encoding: [0x43,0xc8,0x60,0x0d] +; CHECK: ld2r.2s { v3, v4 }, [x2], x3 ; encoding: [0x43,0xc8,0xe3,0x0d] +; CHECK: ld2r.4s { v3, v4 }, [x2] ; encoding: [0x43,0xc8,0x60,0x4d] +; CHECK: ld2r.4s { v3, v4 }, [x2], x3 ; encoding: [0x43,0xc8,0xe3,0x4d] +; CHECK: ld2r.1d { v3, v4 }, [x2] ; encoding: [0x43,0xcc,0x60,0x0d] +; CHECK: ld2r.1d { v3, v4 }, [x2], x3 ; encoding: [0x43,0xcc,0xe3,0x0d] +; CHECK: ld2r.2d { v3, v4 }, [x2] ; encoding: [0x43,0xcc,0x60,0x4d] +; CHECK: ld2r.2d { v3, v4 }, [x2], x3 ; encoding: [0x43,0xcc,0xe3,0x4d] +; CHECK: ld2r.8b { v3, v4 }, [x2], #2 ; encoding: [0x43,0xc0,0xff,0x0d] +; CHECK: ld2r.16b { v3, v4 }, [x2], #2 ; encoding: [0x43,0xc0,0xff,0x4d] +; CHECK: ld2r.4h { v3, v4 }, [x2], #4 ; encoding: [0x43,0xc4,0xff,0x0d] +; CHECK: ld2r.8h { v3, v4 }, [x2], #4 ; encoding: [0x43,0xc4,0xff,0x4d] +; CHECK: ld2r.2s { v3, v4 }, [x2], #8 ; encoding: [0x43,0xc8,0xff,0x0d] +; CHECK: ld2r.4s { v3, v4 }, [x2], #8 ; encoding: [0x43,0xc8,0xff,0x4d] +; CHECK: ld2r.1d { v3, v4 }, [x2], #16 ; encoding: [0x43,0xcc,0xff,0x0d] +; CHECK: ld2r.2d { v3, v4 }, [x2], #16 ; encoding: [0x43,0xcc,0xff,0x4d] +; CHECK: ld3r.8b { v2, v3, v4 }, [x2] ; encoding: [0x42,0xe0,0x40,0x0d] +; CHECK: ld3r.8b { v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe0,0xc3,0x0d] +; CHECK: ld3r.16b { v2, v3, v4 }, [x2] ; encoding: [0x42,0xe0,0x40,0x4d] +; CHECK: ld3r.16b { v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe0,0xc3,0x4d] +; CHECK: ld3r.4h { v2, v3, v4 }, [x2] ; encoding: [0x42,0xe4,0x40,0x0d] +; CHECK: ld3r.4h { v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe4,0xc3,0x0d] +; CHECK: ld3r.8h { v2, v3, v4 }, [x2] ; encoding: [0x42,0xe4,0x40,0x4d] +; CHECK: ld3r.8h { v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe4,0xc3,0x4d] +; CHECK: ld3r.2s { v2, v3, v4 }, [x2] ; encoding: [0x42,0xe8,0x40,0x0d] +; CHECK: ld3r.2s { v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe8,0xc3,0x0d] +; CHECK: ld3r.4s { v2, v3, v4 }, [x2] ; encoding: [0x42,0xe8,0x40,0x4d] +; CHECK: ld3r.4s { v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xe8,0xc3,0x4d] +; CHECK: ld3r.1d { v2, v3, v4 }, [x2] ; encoding: [0x42,0xec,0x40,0x0d] +; CHECK: ld3r.1d { v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xec,0xc3,0x0d] +; CHECK: ld3r.2d { v2, v3, v4 }, [x2] ; encoding: [0x42,0xec,0x40,0x4d] +; CHECK: ld3r.2d { v2, v3, v4 }, [x2], x3 ; encoding: [0x42,0xec,0xc3,0x4d] +; CHECK: ld3r.8b { v2, v3, v4 }, [x2], #3 ; encoding: [0x42,0xe0,0xdf,0x0d] +; CHECK: ld3r.16b { v2, v3, v4 }, [x2], #3 ; encoding: [0x42,0xe0,0xdf,0x4d] +; CHECK: ld3r.4h { v2, v3, v4 }, [x2], #6 ; encoding: [0x42,0xe4,0xdf,0x0d] +; CHECK: ld3r.8h { v2, v3, v4 }, [x2], #6 ; encoding: [0x42,0xe4,0xdf,0x4d] +; CHECK: ld3r.2s { v2, v3, v4 }, [x2], #12 ; encoding: [0x42,0xe8,0xdf,0x0d] +; CHECK: ld3r.4s { v2, v3, v4 }, [x2], #12 ; encoding: [0x42,0xe8,0xdf,0x4d] +; CHECK: ld3r.1d { v2, v3, v4 }, [x2], #24 ; encoding: [0x42,0xec,0xdf,0x0d] +; CHECK: ld3r.2d { v2, v3, v4 }, [x2], #24 ; encoding: [0x42,0xec,0xdf,0x4d] +; CHECK: ld4r.8b { v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe0,0x60,0x0d] +; CHECK: ld4r.8b { v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe0,0xe3,0x0d] +; CHECK: ld4r.16b { v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe0,0x60,0x4d] +; CHECK: ld4r.16b { v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe0,0xe3,0x4d] +; CHECK: ld4r.4h { v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe4,0x60,0x0d] +; CHECK: ld4r.4h { v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe4,0xe3,0x0d] +; CHECK: ld4r.8h { v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe4,0x60,0x4d] +; CHECK: ld4r.8h { v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe4,0xe3,0x4d] +; CHECK: ld4r.2s { v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe8,0x60,0x0d] +; CHECK: ld4r.2s { v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe8,0xe3,0x0d] +; CHECK: ld4r.4s { v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xe8,0x60,0x4d] +; CHECK: ld4r.4s { v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xe8,0xe3,0x4d] +; CHECK: ld4r.1d { v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xec,0x60,0x0d] +; CHECK: ld4r.1d { v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xec,0xe3,0x0d] +; CHECK: ld4r.2d { v2, v3, v4, v5 }, [x2] ; encoding: [0x42,0xec,0x60,0x4d] +; CHECK: ld4r.2d { v2, v3, v4, v5 }, [x2], x3 ; encoding: [0x42,0xec,0xe3,0x4d] +; CHECK: ld4r.8b { v2, v3, v4, v5 }, [x2], #4 ; encoding: [0x42,0xe0,0xff,0x0d] +; CHECK: ld4r.16b { v2, v3, v4, v5 }, [x2], #4 ; encoding: [0x42,0xe0,0xff,0x4d] +; CHECK: ld4r.4h { v2, v3, v4, v5 }, [x2], #8 ; encoding: [0x42,0xe4,0xff,0x0d] +; CHECK: ld4r.8h { v2, v3, v4, v5 }, [x2], #8 ; encoding: [0x42,0xe4,0xff,0x4d] +; CHECK: ld4r.2s { v2, v3, v4, v5 }, [x2], #16 ; encoding: [0x42,0xe8,0xff,0x0d] +; CHECK: ld4r.4s { v2, v3, v4, v5 }, [x2], #16 ; encoding: [0x42,0xe8,0xff,0x4d] +; CHECK: ld4r.1d { v2, v3, v4, v5 }, [x2], #32 ; encoding: [0x42,0xec,0xff,0x0d] +; CHECK: ld4r.2d { v2, v3, v4, v5 }, [x2], #32 ; encoding: [0x42,0xec,0xff,0x4d] +; CHECK: ld1.b { v6 }[13], [x3] ; encoding: [0x66,0x14,0x40,0x4d] +; CHECK: ld1.h { v6 }[2], [x3] ; encoding: [0x66,0x50,0x40,0x0d] +; CHECK: ld1.s { v6 }[2], [x3] ; encoding: [0x66,0x80,0x40,0x4d] +; CHECK: ld1.d { v6 }[1], [x3] ; encoding: [0x66,0x84,0x40,0x4d] +; CHECK: ld1.b { v6 }[13], [x3], x5 ; encoding: [0x66,0x14,0xc5,0x4d] +; CHECK: ld1.h { v6 }[2], [x3], x5 ; encoding: [0x66,0x50,0xc5,0x0d] +; CHECK: ld1.s { v6 }[2], [x3], x5 ; encoding: [0x66,0x80,0xc5,0x4d] +; CHECK: ld1.d { v6 }[1], [x3], x5 ; encoding: [0x66,0x84,0xc5,0x4d] +; CHECK: ld1.b { v6 }[13], [x3], #1 ; encoding: [0x66,0x14,0xdf,0x4d] +; CHECK: ld1.h { v6 }[2], [x3], #2 ; encoding: [0x66,0x50,0xdf,0x0d] +; CHECK: ld1.s { v6 }[2], [x3], #4 ; encoding: [0x66,0x80,0xdf,0x4d] +; CHECK: ld1.d { v6 }[1], [x3], #8 ; encoding: [0x66,0x84,0xdf,0x4d] +; CHECK: ld2.b { v5, v6 }[13], [x3] ; encoding: [0x65,0x14,0x60,0x4d] +; CHECK: ld2.h { v5, v6 }[2], [x3] ; encoding: [0x65,0x50,0x60,0x0d] +; CHECK: ld2.s { v5, v6 }[2], [x3] ; encoding: [0x65,0x80,0x60,0x4d] +; CHECK: ld2.d { v5, v6 }[1], [x3] ; encoding: [0x65,0x84,0x60,0x4d] +; CHECK: ld2.b { v5, v6 }[13], [x3], x5 ; encoding: [0x65,0x14,0xe5,0x4d] +; CHECK: ld2.h { v5, v6 }[2], [x3], x5 ; encoding: [0x65,0x50,0xe5,0x0d] +; CHECK: ld2.s { v5, v6 }[2], [x3], x5 ; encoding: [0x65,0x80,0xe5,0x4d] +; CHECK: ld2.d { v5, v6 }[1], [x3], x5 ; encoding: [0x65,0x84,0xe5,0x4d] +; CHECK: ld2.b { v5, v6 }[13], [x3], #2 ; encoding: [0x65,0x14,0xff,0x4d] +; CHECK: ld2.h { v5, v6 }[2], [x3], #4 ; encoding: [0x65,0x50,0xff,0x0d] +; CHECK: ld2.s { v5, v6 }[2], [x3], #8 ; encoding: [0x65,0x80,0xff,0x4d] +; CHECK: ld2.d { v5, v6 }[1], [x3], #16 ; encoding: [0x65,0x84,0xff,0x4d] +; CHECK: ld3.b { v7, v8, v9 }[13], [x3] ; encoding: [0x67,0x34,0x40,0x4d] +; CHECK: ld3.h { v7, v8, v9 }[2], [x3] ; encoding: [0x67,0x70,0x40,0x0d] +; CHECK: ld3.s { v7, v8, v9 }[2], [x3] ; encoding: [0x67,0xa0,0x40,0x4d] +; CHECK: ld3.d { v7, v8, v9 }[1], [x3] ; encoding: [0x67,0xa4,0x40,0x4d] +; CHECK: ld3.b { v7, v8, v9 }[13], [x3], x5 ; encoding: [0x67,0x34,0xc5,0x4d] +; CHECK: ld3.h { v7, v8, v9 }[2], [x3], x5 ; encoding: [0x67,0x70,0xc5,0x0d] +; CHECK: ld3.s { v7, v8, v9 }[2], [x3], x5 ; encoding: [0x67,0xa0,0xc5,0x4d] +; CHECK: ld3.d { v7, v8, v9 }[1], [x3], x5 ; encoding: [0x67,0xa4,0xc5,0x4d] +; CHECK: ld3.b { v7, v8, v9 }[13], [x3], #3 ; encoding: [0x67,0x34,0xdf,0x4d] +; CHECK: ld3.h { v7, v8, v9 }[2], [x3], #6 ; encoding: [0x67,0x70,0xdf,0x0d] +; CHECK: ld3.s { v7, v8, v9 }[2], [x3], #12 ; encoding: [0x67,0xa0,0xdf,0x4d] +; CHECK: ld3.d { v7, v8, v9 }[1], [x3], #24 ; encoding: [0x67,0xa4,0xdf,0x4d] +; CHECK: ld4.b { v7, v8, v9, v10 }[13], [x3] ; encoding: [0x67,0x34,0x60,0x4d] +; CHECK: ld4.h { v7, v8, v9, v10 }[2], [x3] ; encoding: [0x67,0x70,0x60,0x0d] +; CHECK: ld4.s { v7, v8, v9, v10 }[2], [x3] ; encoding: [0x67,0xa0,0x60,0x4d] +; CHECK: ld4.d { v7, v8, v9, v10 }[1], [x3] ; encoding: [0x67,0xa4,0x60,0x4d] +; CHECK: ld4.b { v7, v8, v9, v10 }[13], [x3], x5 ; encoding: [0x67,0x34,0xe5,0x4d] +; CHECK: ld4.h { v7, v8, v9, v10 }[2], [x3], x5 ; encoding: [0x67,0x70,0xe5,0x0d] +; CHECK: ld4.s { v7, v8, v9, v10 }[2], [x3], x5 ; encoding: [0x67,0xa0,0xe5,0x4d] +; CHECK: ld4.d { v7, v8, v9, v10 }[1], [x3], x5 ; encoding: [0x67,0xa4,0xe5,0x4d] +; CHECK: ld4.b { v7, v8, v9, v10 }[13], [x3], #4 ; encoding: [0x67,0x34,0xff,0x4d] +; CHECK: ld4.h { v7, v8, v9, v10 }[2], [x3], #8 ; encoding: [0x67,0x70,0xff,0x0d] +; CHECK: ld4.s { v7, v8, v9, v10 }[2], [x3], #16 ; encoding: [0x67,0xa0,0xff,0x4d] +; CHECK: ld4.d { v7, v8, v9, v10 }[1], [x3], #32 ; encoding: [0x67,0xa4,0xff,0x4d] +; CHECK: st1.b { v6 }[13], [x3] ; encoding: [0x66,0x14,0x00,0x4d] +; CHECK: st1.h { v6 }[2], [x3] ; encoding: [0x66,0x50,0x00,0x0d] +; CHECK: st1.s { v6 }[2], [x3] ; encoding: [0x66,0x80,0x00,0x4d] +; CHECK: st1.d { v6 }[1], [x3] ; encoding: [0x66,0x84,0x00,0x4d] +; CHECK: st1.b { v6 }[13], [x3], x5 ; encoding: [0x66,0x14,0x85,0x4d] +; CHECK: st1.h { v6 }[2], [x3], x5 ; encoding: [0x66,0x50,0x85,0x0d] +; CHECK: st1.s { v6 }[2], [x3], x5 ; encoding: [0x66,0x80,0x85,0x4d] +; CHECK: st1.d { v6 }[1], [x3], x5 ; encoding: [0x66,0x84,0x85,0x4d] +; CHECK: st1.b { v6 }[13], [x3], #1 ; encoding: [0x66,0x14,0x9f,0x4d] +; CHECK: st1.h { v6 }[2], [x3], #2 ; encoding: [0x66,0x50,0x9f,0x0d] +; CHECK: st1.s { v6 }[2], [x3], #4 ; encoding: [0x66,0x80,0x9f,0x4d] +; CHECK: st1.d { v6 }[1], [x3], #8 ; encoding: [0x66,0x84,0x9f,0x4d] +; CHECK: st2.b { v5, v6 }[13], [x3] ; encoding: [0x65,0x14,0x20,0x4d] +; CHECK: st2.h { v5, v6 }[2], [x3] ; encoding: [0x65,0x50,0x20,0x0d] +; CHECK: st2.s { v5, v6 }[2], [x3] ; encoding: [0x65,0x80,0x20,0x4d] +; CHECK: st2.d { v5, v6 }[1], [x3] ; encoding: [0x65,0x84,0x20,0x4d] +; CHECK: st2.b { v5, v6 }[13], [x3], x5 ; encoding: [0x65,0x14,0xa5,0x4d] +; CHECK: st2.h { v5, v6 }[2], [x3], x5 ; encoding: [0x65,0x50,0xa5,0x0d] +; CHECK: st2.s { v5, v6 }[2], [x3], x5 ; encoding: [0x65,0x80,0xa5,0x4d] +; CHECK: st2.d { v5, v6 }[1], [x3], x5 ; encoding: [0x65,0x84,0xa5,0x4d] +; CHECK: st2.b { v5, v6 }[13], [x3], #2 ; encoding: [0x65,0x14,0xbf,0x4d] +; CHECK: st2.h { v5, v6 }[2], [x3], #4 ; encoding: [0x65,0x50,0xbf,0x0d] +; CHECK: st2.s { v5, v6 }[2], [x3], #8 ; encoding: [0x65,0x80,0xbf,0x4d] +; CHECK: st2.d { v5, v6 }[1], [x3], #16 ; encoding: [0x65,0x84,0xbf,0x4d] +; CHECK: st3.b { v7, v8, v9 }[13], [x3] ; encoding: [0x67,0x34,0x00,0x4d] +; CHECK: st3.h { v7, v8, v9 }[2], [x3] ; encoding: [0x67,0x70,0x00,0x0d] +; CHECK: st3.s { v7, v8, v9 }[2], [x3] ; encoding: [0x67,0xa0,0x00,0x4d] +; CHECK: st3.d { v7, v8, v9 }[1], [x3] ; encoding: [0x67,0xa4,0x00,0x4d] +; CHECK: st3.b { v7, v8, v9 }[13], [x3], x5 ; encoding: [0x67,0x34,0x85,0x4d] +; CHECK: st3.h { v7, v8, v9 }[2], [x3], x5 ; encoding: [0x67,0x70,0x85,0x0d] +; CHECK: st3.s { v7, v8, v9 }[2], [x3], x5 ; encoding: [0x67,0xa0,0x85,0x4d] +; CHECK: st3.d { v7, v8, v9 }[1], [x3], x5 ; encoding: [0x67,0xa4,0x85,0x4d] +; CHECK: st3.b { v7, v8, v9 }[13], [x3], #3 ; encoding: [0x67,0x34,0x9f,0x4d] +; CHECK: st3.h { v7, v8, v9 }[2], [x3], #6 ; encoding: [0x67,0x70,0x9f,0x0d] +; CHECK: st3.s { v7, v8, v9 }[2], [x3], #12 ; encoding: [0x67,0xa0,0x9f,0x4d] +; CHECK: st3.d { v7, v8, v9 }[1], [x3], #24 ; encoding: [0x67,0xa4,0x9f,0x4d] +; CHECK: st4.b { v7, v8, v9, v10 }[13], [x3] ; encoding: [0x67,0x34,0x20,0x4d] +; CHECK: st4.h { v7, v8, v9, v10 }[2], [x3] ; encoding: [0x67,0x70,0x20,0x0d] +; CHECK: st4.s { v7, v8, v9, v10 }[2], [x3] ; encoding: [0x67,0xa0,0x20,0x4d] +; CHECK: st4.d { v7, v8, v9, v10 }[1], [x3] ; encoding: [0x67,0xa4,0x20,0x4d] +; CHECK: st4.b { v7, v8, v9, v10 }[13], [x3], x5 ; encoding: [0x67,0x34,0xa5,0x4d] +; CHECK: st4.h { v7, v8, v9, v10 }[2], [x3], x5 ; encoding: [0x67,0x70,0xa5,0x0d] +; CHECK: st4.s { v7, v8, v9, v10 }[2], [x3], x5 ; encoding: [0x67,0xa0,0xa5,0x4d] +; CHECK: st4.d { v7, v8, v9, v10 }[1], [x3], x5 ; encoding: [0x67,0xa4,0xa5,0x4d] +; CHECK: st4.b { v7, v8, v9, v10 }[13], [x3], #4 ; encoding: [0x67,0x34,0xbf,0x4d] +; CHECK: st4.h { v7, v8, v9, v10 }[2], [x3], #8 ; encoding: [0x67,0x70,0xbf,0x0d] +; CHECK: st4.s { v7, v8, v9, v10 }[2], [x3], #16 ; encoding: [0x67,0xa0,0xbf,0x4d] +; CHECK: st4.d { v7, v8, v9, v10 }[1], [x3], #32 ; encoding: [0x67,0xa4,0xbf,0x4d] diff --git a/test/MC/ARM64/small-data-fixups.s b/test/MC/ARM64/small-data-fixups.s new file mode 100644 index 0000000000..3fe7c75c01 --- /dev/null +++ b/test/MC/ARM64/small-data-fixups.s @@ -0,0 +1,24 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -filetype=obj -o - %s | macho-dump | FileCheck %s + +foo: + .long 0 +bar: + .long 1 + +baz: + .byte foo - bar + .short foo - bar + +; CHECK: # Relocation 0 +; CHECK: (('word-0', 0x9), +; CHECK: ('word-1', 0x1a000002)), +; CHECK: # Relocation 1 +; CHECK: (('word-0', 0x9), +; CHECK: ('word-1', 0xa000001)), +; CHECK: # Relocation 2 +; CHECK: (('word-0', 0x8), +; CHECK: ('word-1', 0x18000002)), +; CHECK: # Relocation 3 +; CHECK: (('word-0', 0x8), +; CHECK: ('word-1', 0x8000001)), + diff --git a/test/MC/ARM64/system-encoding.s b/test/MC/ARM64/system-encoding.s new file mode 100644 index 0000000000..9f0d3c4e44 --- /dev/null +++ b/test/MC/ARM64/system-encoding.s @@ -0,0 +1,679 @@ +; RUN: not llvm-mc -triple arm64-apple-darwin -show-encoding < %s 2> %t | FileCheck %s +; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s + +foo: + +;----------------------------------------------------------------------------- +; Simple encodings (instuctions w/ no operands) +;----------------------------------------------------------------------------- + + nop + sev + sevl + wfe + wfi + yield + +; CHECK: nop ; encoding: [0x1f,0x20,0x03,0xd5] +; CHECK: sev ; encoding: [0x9f,0x20,0x03,0xd5] +; CHECK: sevl ; encoding: [0xbf,0x20,0x03,0xd5] +; CHECK: wfe ; encoding: [0x5f,0x20,0x03,0xd5] +; CHECK: wfi ; encoding: [0x7f,0x20,0x03,0xd5] +; CHECK: yield ; encoding: [0x3f,0x20,0x03,0xd5] + +;----------------------------------------------------------------------------- +; Single-immediate operand instructions +;----------------------------------------------------------------------------- + + clrex #10 +; CHECK: clrex #10 ; encoding: [0x5f,0x3a,0x03,0xd5] + isb #15 + isb sy +; CHECK: isb ; encoding: [0xdf,0x3f,0x03,0xd5] +; CHECK: isb ; encoding: [0xdf,0x3f,0x03,0xd5] + dmb #3 + dmb osh +; CHECK: dmb osh ; encoding: [0xbf,0x33,0x03,0xd5] +; CHECK: dmb osh ; encoding: [0xbf,0x33,0x03,0xd5] + dsb #7 + dsb nsh +; CHECK: dsb nsh ; encoding: [0x9f,0x37,0x03,0xd5] +; CHECK: dsb nsh ; encoding: [0x9f,0x37,0x03,0xd5] + +;----------------------------------------------------------------------------- +; Generic system instructions +;----------------------------------------------------------------------------- + sys #2, c0, c5, #7 +; CHECK: encoding: [0xff,0x05,0x0a,0xd5] + sys #7, C6, c10, #7, x7 +; CHECK: encoding: [0xe7,0x6a,0x0f,0xd5] + sysl x20, #6, c3, C15, #7 +; CHECK: encoding: [0xf4,0x3f,0x2e,0xd5] + +; Check for error on invalid 'C' operand value. + sys #2, c16, c5, #7 +; CHECK-ERRORS: invalid operand for instruction + +;----------------------------------------------------------------------------- +; MSR/MRS instructions +;----------------------------------------------------------------------------- + msr ACTLR_EL1, x3 + msr ACTLR_EL2, x3 + msr ACTLR_EL3, x3 + msr ADFSR_EL1, x3 + msr ADFSR_EL2, x3 + msr ADFSR_EL3, x3 + msr AIDR_EL1, x3 + msr AIFSR_EL1, x3 + msr AIFSR_EL2, x3 + msr AIFSR_EL3, x3 + msr AMAIR_EL1, x3 + msr AMAIR_EL2, x3 + msr AMAIR_EL3, x3 + msr CCSIDR_EL1, x3 + msr CLIDR_EL1, x3 + msr CNTFRQ_EL0, x3 + msr CNTHCTL_EL2, x3 + msr CNTHP_CTL_EL2, x3 + msr CNTHP_CVAL_EL2, x3 + msr CNTHP_TVAL_EL2, x3 + msr CNTKCTL_EL1, x3 + msr CNTPCT_EL0, x3 + msr CNTP_CTL_EL0, x3 + msr CNTP_CVAL_EL0, x3 + msr CNTP_TVAL_EL0, x3 + msr CNTVCT_EL0, x3 + msr CNTVOFF_EL2, x3 + msr CNTV_CTL_EL0, x3 + msr CNTV_CVAL_EL0, x3 + msr CNTV_TVAL_EL0, x3 + msr CONTEXTIDR_EL1, x3 + msr CPACR_EL1, x3 + msr CPTR_EL2, x3 + msr CPTR_EL3, x3 + msr CSSELR_EL1, x3 + msr CTR_EL0, x3 + msr CURRENT_EL, x3 + msr DACR32_EL2, x3 + msr DCZID_EL0, x3 + msr ECOIDR_EL1, x3 + msr ESR_EL1, x3 + msr ESR_EL2, x3 + msr ESR_EL3, x3 + msr FAR_EL1, x3 + msr FAR_EL2, x3 + msr FAR_EL3, x3 + msr FPEXC32_EL2, x3 + msr HACR_EL2, x3 + msr HCR_EL2, x3 + msr HPFAR_EL2, x3 + msr HSTR_EL2, x3 + msr ID_AA64DFR0_EL1, x3 + msr ID_AA64DFR1_EL1, x3 + msr ID_AA64ISAR0_EL1, x3 + msr ID_AA64ISAR1_EL1, x3 + msr ID_AA64MMFR0_EL1, x3 + msr ID_AA64MMFR1_EL1, x3 + msr ID_AA64PFR0_EL1, x3 + msr ID_AA64PFR1_EL1, x3 + msr IFSR32_EL2, x3 + msr ISR_EL1, x3 + msr MAIR_EL1, x3 + msr MAIR_EL2, x3 + msr MAIR_EL3, x3 + msr MDCR_EL2, x3 + msr MDCR_EL3, x3 + msr MIDR_EL1, x3 + msr MPIDR_EL1, x3 + msr MVFR0_EL1, x3 + msr MVFR1_EL1, x3 + msr PAR_EL1, x3 + msr RVBAR_EL1, x3 + msr RVBAR_EL2, x3 + msr RVBAR_EL3, x3 + msr SCR_EL3, x3 + msr SCTLR_EL1, x3 + msr SCTLR_EL2, x3 + msr SCTLR_EL3, x3 + msr SDER32_EL3, x3 + msr TCR_EL1, x3 + msr TCR_EL2, x3 + msr TCR_EL3, x3 + msr TEECR32_EL1, x3 + msr TEEHBR32_EL1, x3 + msr TPIDRRO_EL0, x3 + msr TPIDR_EL0, x3 + msr TPIDR_EL1, x3 + msr TPIDR_EL2, x3 + msr TPIDR_EL3, x3 + msr TTBR0_EL1, x3 + msr TTBR0_EL2, x3 + msr TTBR0_EL3, x3 + msr TTBR1_EL1, x3 + msr VBAR_EL1, x3 + msr VBAR_EL2, x3 + msr VBAR_EL3, x3 + msr VMPIDR_EL2, x3 + msr VPIDR_EL2, x3 + msr VTCR_EL2, x3 + msr VTTBR_EL2, x3 + msr SPSel, x3 + msr S2_2_C4_C6_4, x1 +; CHECK: msr ACTLR_EL1, x3 ; encoding: [0x23,0x10,0x18,0xd5] +; CHECK: msr ACTLR_EL2, x3 ; encoding: [0x23,0x10,0x1c,0xd5] +; CHECK: msr ACTLR_EL3, x3 ; encoding: [0x23,0x10,0x1e,0xd5] +; CHECK: msr AFSR0_EL1, x3 ; encoding: [0x03,0x51,0x18,0xd5] +; CHECK: msr ADFSR_EL2, x3 ; encoding: [0x03,0x51,0x1c,0xd5] +; CHECK: msr ADFSR_EL3, x3 ; encoding: [0x03,0x51,0x1e,0xd5] +; CHECK: msr AIDR_EL1, x3 ; encoding: [0xe3,0x00,0x19,0xd5] +; CHECK: msr AFSR1_EL1, x3 ; encoding: [0x23,0x51,0x18,0xd5] +; CHECK: msr AIFSR_EL2, x3 ; encoding: [0x23,0x51,0x1c,0xd5] +; CHECK: msr AIFSR_EL3, x3 ; encoding: [0x23,0x51,0x1e,0xd5] +; CHECK: msr AMAIR_EL1, x3 ; encoding: [0x03,0xa3,0x18,0xd5] +; CHECK: msr AMAIR_EL2, x3 ; encoding: [0x03,0xa3,0x1c,0xd5] +; CHECK: msr AMAIR_EL3, x3 ; encoding: [0x03,0xa3,0x1e,0xd5] +; CHECK: msr CCSIDR_EL1, x3 ; encoding: [0x03,0x00,0x19,0xd5] +; CHECK: msr CLIDR_EL1, x3 ; encoding: [0x23,0x00,0x19,0xd5] +; CHECK: msr CNTFRQ_EL0, x3 ; encoding: [0x03,0xe0,0x1b,0xd5] +; CHECK: msr CNTHCTL_EL2, x3 ; encoding: [0x03,0xe1,0x1c,0xd5] +; CHECK: msr CNTHP_CTL_EL2, x3 ; encoding: [0x23,0xe2,0x1c,0xd5] +; CHECK: msr CNTHP_CVAL_EL2, x3 ; encoding: [0x43,0xe2,0x1c,0xd5] +; CHECK: msr CNTHP_TVAL_EL2, x3 ; encoding: [0x03,0xe2,0x1c,0xd5] +; CHECK: msr CNTKCTL_EL1, x3 ; encoding: [0x03,0xe1,0x18,0xd5] +; CHECK: msr CNTPCT_EL0, x3 ; encoding: [0x23,0xe0,0x1b,0xd5] +; CHECK: msr CNTP_CTL_EL0, x3 ; encoding: [0x23,0xe2,0x1b,0xd5] +; CHECK: msr CNTP_CVAL_EL0, x3 ; encoding: [0x43,0xe2,0x1b,0xd5] +; CHECK: msr CNTP_TVAL_EL0, x3 ; encoding: [0x03,0xe2,0x1b,0xd5] +; CHECK: msr CNTVCT_EL0, x3 ; encoding: [0x43,0xe0,0x1b,0xd5] +; CHECK: msr CNTVOFF_EL2, x3 ; encoding: [0x63,0xe0,0x1c,0xd5] +; CHECK: msr CNTV_CTL_EL0, x3 ; encoding: [0x23,0xe3,0x1b,0xd5] +; CHECK: msr CNTV_CVAL_EL0, x3 ; encoding: [0x43,0xe3,0x1b,0xd5] +; CHECK: msr CNTV_TVAL_EL0, x3 ; encoding: [0x03,0xe3,0x1b,0xd5] +; CHECK: msr CONTEXTIDR_EL1, x3 ; encoding: [0x23,0xd0,0x18,0xd5] +; CHECK: msr CPACR_EL1, x3 ; encoding: [0x43,0x10,0x18,0xd5] +; CHECK: msr CPTR_EL2, x3 ; encoding: [0x43,0x11,0x1c,0xd5] +; CHECK: msr CPTR_EL3, x3 ; encoding: [0x43,0x11,0x1e,0xd5] +; CHECK: msr CSSELR_EL1, x3 ; encoding: [0x03,0x00,0x1a,0xd5] +; CHECK: msr CTR_EL0, x3 ; encoding: [0x23,0x00,0x1b,0xd5] +; CHECK: msr CurrentEL, x3 ; encoding: [0x43,0x42,0x18,0xd5] +; CHECK: msr DACR32_EL2, x3 ; encoding: [0x03,0x30,0x1c,0xd5] +; CHECK: msr DCZID_EL0, x3 ; encoding: [0xe3,0x00,0x1b,0xd5] +; CHECK: msr REVIDR_EL1, x3 ; encoding: [0xc3,0x00,0x18,0xd5] +; CHECK: msr ESR_EL1, x3 ; encoding: [0x03,0x52,0x18,0xd5] +; CHECK: msr ESR_EL2, x3 ; encoding: [0x03,0x52,0x1c,0xd5] +; CHECK: msr ESR_EL3, x3 ; encoding: [0x03,0x52,0x1e,0xd5] +; CHECK: msr FAR_EL1, x3 ; encoding: [0x03,0x60,0x18,0xd5] +; CHECK: msr FAR_EL2, x3 ; encoding: [0x03,0x60,0x1c,0xd5] +; CHECK: msr FAR_EL3, x3 ; encoding: [0x03,0x60,0x1e,0xd5] +; CHECK: msr FPEXC32_EL2, x3 ; encoding: [0x03,0x53,0x1c,0xd5] +; CHECK: msr HACR_EL2, x3 ; encoding: [0xe3,0x11,0x1c,0xd5] +; CHECK: msr HCR_EL2, x3 ; encoding: [0x03,0x11,0x1c,0xd5] +; CHECK: msr HPFAR_EL2, x3 ; encoding: [0x83,0x60,0x1c,0xd5] +; CHECK: msr HSTR_EL2, x3 ; encoding: [0x63,0x11,0x1c,0xd5] +; CHECK: msr ID_AA64DFR0_EL1, x3 ; encoding: [0x03,0x05,0x18,0xd5] +; CHECK: msr ID_AA64DFR1_EL1, x3 ; encoding: [0x23,0x05,0x18,0xd5] +; CHECK: msr ID_AA64ISAR0_EL1, x3 ; encoding: [0x03,0x06,0x18,0xd5] +; CHECK: msr ID_AA64ISAR1_EL1, x3 ; encoding: [0x23,0x06,0x18,0xd5] +; CHECK: msr ID_AA64MMFR0_EL1, x3 ; encoding: [0x03,0x07,0x18,0xd5] +; CHECK: msr ID_AA64MMFR1_EL1, x3 ; encoding: [0x23,0x07,0x18,0xd5] +; CHECK: msr ID_AA64PFR0_EL1, x3 ; encoding: [0x03,0x04,0x18,0xd5] +; CHECK: msr ID_AA64PFR1_EL1, x3 ; encoding: [0x23,0x04,0x18,0xd5] +; CHECK: msr IFSR32_EL2, x3 ; encoding: [0x23,0x50,0x1c,0xd5] +; CHECK: msr ISR_EL1, x3 ; encoding: [0x03,0xc1,0x18,0xd5] +; CHECK: msr MAIR_EL1, x3 ; encoding: [0x03,0xa2,0x18,0xd5] +; CHECK: msr MAIR_EL2, x3 ; encoding: [0x03,0xa2,0x1c,0xd5] +; CHECK: msr MAIR_EL3, x3 ; encoding: [0x03,0xa2,0x1e,0xd5] +; CHECK: msr MDCR_EL2, x3 ; encoding: [0x23,0x11,0x1c,0xd5] +; CHECK: msr MDCR_EL3, x3 ; encoding: [0x23,0x13,0x1e,0xd5] +; CHECK: msr MIDR_EL1, x3 ; encoding: [0x03,0x00,0x18,0xd5] +; CHECK: msr MPIDR_EL1, x3 ; encoding: [0xa3,0x00,0x18,0xd5] +; CHECK: msr MVFR0_EL1, x3 ; encoding: [0x03,0x03,0x18,0xd5] +; CHECK: msr MVFR1_EL1, x3 ; encoding: [0x23,0x03,0x18,0xd5] +; CHECK: msr PAR_EL1, x3 ; encoding: [0x03,0x74,0x18,0xd5] +; CHECK: msr RVBAR_EL1, x3 ; encoding: [0x23,0xc0,0x18,0xd5] +; CHECK: msr RVBAR_EL2, x3 ; encoding: [0x23,0xc0,0x1c,0xd5] +; CHECK: msr RVBAR_EL3, x3 ; encoding: [0x23,0xc0,0x1e,0xd5] +; CHECK: msr SCR_EL3, x3 ; encoding: [0x03,0x11,0x1e,0xd5] +; CHECK: msr SCTLR_EL1, x3 ; encoding: [0x03,0x10,0x18,0xd5] +; CHECK: msr SCTLR_EL2, x3 ; encoding: [0x03,0x10,0x1c,0xd5] +; CHECK: msr SCTLR_EL3, x3 ; encoding: [0x03,0x10,0x1e,0xd5] +; CHECK: msr SDER32_EL3, x3 ; encoding: [0x23,0x11,0x1e,0xd5] +; CHECK: msr TCR_EL1, x3 ; encoding: [0x43,0x20,0x18,0xd5] +; CHECK: msr TCR_EL2, x3 ; encoding: [0x43,0x20,0x1c,0xd5] +; CHECK: msr TCR_EL3, x3 ; encoding: [0x43,0x20,0x1e,0xd5] +; CHECK: msr TEECR32_EL1, x3 ; encoding: [0x03,0x00,0x12,0xd5] +; CHECK: msr TEEHBR32_EL1, x3 ; encoding: [0x03,0x10,0x12,0xd5] +; CHECK: msr TPIDRRO_EL0, x3 ; encoding: [0x63,0xd0,0x1b,0xd5] +; CHECK: msr TPIDR_EL0, x3 ; encoding: [0x43,0xd0,0x1b,0xd5] +; CHECK: msr TPIDR_EL1, x3 ; encoding: [0x83,0xd0,0x18,0xd5] +; CHECK: msr TPIDR_EL2, x3 ; encoding: [0x43,0xd0,0x1c,0xd5] +; CHECK: msr TPIDR_EL3, x3 ; encoding: [0x43,0xd0,0x1e,0xd5] +; CHECK: msr TTBR0_EL1, x3 ; encoding: [0x03,0x20,0x18,0xd5] +; CHECK: msr TTBR0_EL2, x3 ; encoding: [0x03,0x20,0x1c,0xd5] +; CHECK: msr TTBR0_EL3, x3 ; encoding: [0x03,0x20,0x1e,0xd5] +; CHECK: msr TTBR1_EL1, x3 ; encoding: [0x23,0x20,0x18,0xd5] +; CHECK: msr VBAR_EL1, x3 ; encoding: [0x03,0xc0,0x18,0xd5] +; CHECK: msr VBAR_EL2, x3 ; encoding: [0x03,0xc0,0x1c,0xd5] +; CHECK: msr VBAR_EL3, x3 ; encoding: [0x03,0xc0,0x1e,0xd5] +; CHECK: msr VMPIDR_EL2, x3 ; encoding: [0xa3,0x00,0x1c,0xd5] +; CHECK: msr VPIDR_EL2, x3 ; encoding: [0x03,0x00,0x1c,0xd5] +; CHECK: msr VTCR_EL2, x3 ; encoding: [0x43,0x21,0x1c,0xd5] +; CHECK: msr VTTBR_EL2, x3 ; encoding: [0x03,0x21,0x1c,0xd5] +; CHECK: msr SPSel, x3 ; encoding: [0x03,0x42,0x18,0xd5] +; CHECK: msr S2_2_C4_C6_4, x1 ; encoding: [0x81,0x46,0x12,0xd5] + + mrs x3, ACTLR_EL1 + mrs x3, ACTLR_EL2 + mrs x3, ACTLR_EL3 + mrs x3, ADFSR_EL1 + mrs x3, ADFSR_EL2 + mrs x3, ADFSR_EL3 + mrs x3, AIDR_EL1 + mrs x3, AIFSR_EL1 + mrs x3, AIFSR_EL2 + mrs x3, AIFSR_EL3 + mrs x3, AMAIR_EL1 + mrs x3, AMAIR_EL2 + mrs x3, AMAIR_EL3 + mrs x3, CCSIDR_EL1 + mrs x3, CLIDR_EL1 + mrs x3, CNTFRQ_EL0 + mrs x3, CNTHCTL_EL2 + mrs x3, CNTHP_CTL_EL2 + mrs x3, CNTHP_CVAL_EL2 + mrs x3, CNTHP_TVAL_EL2 + mrs x3, CNTKCTL_EL1 + mrs x3, CNTPCT_EL0 + mrs x3, CNTP_CTL_EL0 + mrs x3, CNTP_CVAL_EL0 + mrs x3, CNTP_TVAL_EL0 + mrs x3, CNTVCT_EL0 + mrs x3, CNTVOFF_EL2 + mrs x3, CNTV_CTL_EL0 + mrs x3, CNTV_CVAL_EL0 + mrs x3, CNTV_TVAL_EL0 + mrs x3, CONTEXTIDR_EL1 + mrs x3, CPACR_EL1 + mrs x3, CPTR_EL2 + mrs x3, CPTR_EL3 + mrs x3, CSSELR_EL1 + mrs x3, CTR_EL0 + mrs x3, CURRENT_EL + mrs x3, DACR32_EL2 + mrs x3, DCZID_EL0 + mrs x3, ECOIDR_EL1 + mrs x3, ESR_EL1 + mrs x3, ESR_EL2 + mrs x3, ESR_EL3 + mrs x3, FAR_EL1 + mrs x3, FAR_EL2 + mrs x3, FAR_EL3 + mrs x3, FPEXC32_EL2 + mrs x3, HACR_EL2 + mrs x3, HCR_EL2 + mrs x3, HPFAR_EL2 + mrs x3, HSTR_EL2 + mrs x3, ID_AA64DFR0_EL1 + mrs x3, ID_AA64DFR1_EL1 + mrs x3, ID_AA64ISAR0_EL1 + mrs x3, ID_AA64ISAR1_EL1 + mrs x3, ID_AA64MMFR0_EL1 + mrs x3, ID_AA64MMFR1_EL1 + mrs x3, ID_AA64PFR0_EL1 + mrs x3, ID_AA64PFR1_EL1 + mrs x3, IFSR32_EL2 + mrs x3, ISR_EL1 + mrs x3, MAIR_EL1 + mrs x3, MAIR_EL2 + mrs x3, MAIR_EL3 + mrs x3, MDCR_EL2 + mrs x3, MDCR_EL3 + mrs x3, MIDR_EL1 + mrs x3, MPIDR_EL1 + mrs x3, MVFR0_EL1 + mrs x3, MVFR1_EL1 + mrs x3, PAR_EL1 + mrs x3, RVBAR_EL1 + mrs x3, RVBAR_EL2 + mrs x3, RVBAR_EL3 + mrs x3, SCR_EL3 + mrs x3, SCTLR_EL1 + mrs x3, SCTLR_EL2 + mrs x3, SCTLR_EL3 + mrs x3, SDER32_EL3 + mrs x3, TCR_EL1 + mrs x3, TCR_EL2 + mrs x3, TCR_EL3 + mrs x3, TEECR32_EL1 + mrs x3, TEEHBR32_EL1 + mrs x3, TPIDRRO_EL0 + mrs x3, TPIDR_EL0 + mrs x3, TPIDR_EL1 + mrs x3, TPIDR_EL2 + mrs x3, TPIDR_EL3 + mrs x3, TTBR0_EL1 + mrs x3, TTBR0_EL2 + mrs x3, TTBR0_EL3 + mrs x3, TTBR1_EL1 + mrs x3, VBAR_EL1 + mrs x3, VBAR_EL2 + mrs x3, VBAR_EL3 + mrs x3, VMPIDR_EL2 + mrs x3, VPIDR_EL2 + mrs x3, VTCR_EL2 + mrs x3, VTTBR_EL2 + + mrs x3, MDCCSR_EL0 + mrs x3, MDCCINT_EL1 + mrs x3, DBGDTR_EL0 + mrs x3, DBGDTRRX_EL0 + mrs x3, DBGDTRTX_EL0 + mrs x3, DBGVCR32_EL2 + mrs x3, OSDTRRX_EL1 + mrs x3, MDSCR_EL1 + mrs x3, OSDTRTX_EL1 + mrs x3, OSECCR_EL11 + mrs x3, DBGBVR0_EL1 + mrs x3, DBGBVR1_EL1 + mrs x3, DBGBVR2_EL1 + mrs x3, DBGBVR3_EL1 + mrs x3, DBGBVR4_EL1 + mrs x3, DBGBVR5_EL1 + mrs x3, DBGBVR6_EL1 + mrs x3, DBGBVR7_EL1 + mrs x3, DBGBVR8_EL1 + mrs x3, DBGBVR9_EL1 + mrs x3, DBGBVR10_EL1 + mrs x3, DBGBVR11_EL1 + mrs x3, DBGBVR12_EL1 + mrs x3, DBGBVR13_EL1 + mrs x3, DBGBVR14_EL1 + mrs x3, DBGBVR15_EL1 + mrs x3, DBGBCR0_EL1 + mrs x3, DBGBCR1_EL1 + mrs x3, DBGBCR2_EL1 + mrs x3, DBGBCR3_EL1 + mrs x3, DBGBCR4_EL1 + mrs x3, DBGBCR5_EL1 + mrs x3, DBGBCR6_EL1 + mrs x3, DBGBCR7_EL1 + mrs x3, DBGBCR8_EL1 + mrs x3, DBGBCR9_EL1 + mrs x3, DBGBCR10_EL1 + mrs x3, DBGBCR11_EL1 + mrs x3, DBGBCR12_EL1 + mrs x3, DBGBCR13_EL1 + mrs x3, DBGBCR14_EL1 + mrs x3, DBGBCR15_EL1 + mrs x3, DBGWVR0_EL1 + mrs x3, DBGWVR1_EL1 + mrs x3, DBGWVR2_EL1 + mrs x3, DBGWVR3_EL1 + mrs x3, DBGWVR4_EL1 + mrs x3, DBGWVR5_EL1 + mrs x3, DBGWVR6_EL1 + mrs x3, DBGWVR7_EL1 + mrs x3, DBGWVR8_EL1 + mrs x3, DBGWVR9_EL1 + mrs x3, DBGWVR10_EL1 + mrs x3, DBGWVR11_EL1 + mrs x3, DBGWVR12_EL1 + mrs x3, DBGWVR13_EL1 + mrs x3, DBGWVR14_EL1 + mrs x3, DBGWVR15_EL1 + mrs x3, DBGWCR0_EL1 + mrs x3, DBGWCR1_EL1 + mrs x3, DBGWCR2_EL1 + mrs x3, DBGWCR3_EL1 + mrs x3, DBGWCR4_EL1 + mrs x3, DBGWCR5_EL1 + mrs x3, DBGWCR6_EL1 + mrs x3, DBGWCR7_EL1 + mrs x3, DBGWCR8_EL1 + mrs x3, DBGWCR9_EL1 + mrs x3, DBGWCR10_EL1 + mrs x3, DBGWCR11_EL1 + mrs x3, DBGWCR12_EL1 + mrs x3, DBGWCR13_EL1 + mrs x3, DBGWCR14_EL1 + mrs x3, DBGWCR15_EL1 + mrs x3, MDRAR_EL1 + mrs x3, OSLAR_EL1 + mrs x3, OSLSR_EL1 + mrs x3, OSDLR_EL1 + mrs x3, DBGPRCR_EL1 + mrs x3, DBGCLAIMSET_EL1 + mrs x3, DBGCLAIMCLR_EL1 + mrs x3, DBGAUTHSTATUS_EL1 + mrs x3, DBGDEVID2 + mrs x3, DBGDEVID1 + mrs x3, DBGDEVID0 + mrs x1, S2_2_C4_C6_4 + mrs x3, s2_3_c2_c1_4 + mrs x3, S2_3_c2_c1_4 + +; CHECK: mrs x3, ACTLR_EL1 ; encoding: [0x23,0x10,0x38,0xd5] +; CHECK: mrs x3, ACTLR_EL2 ; encoding: [0x23,0x10,0x3c,0xd5] +; CHECK: mrs x3, ACTLR_EL3 ; encoding: [0x23,0x10,0x3e,0xd5] +; CHECK: mrs x3, AFSR0_EL1 ; encoding: [0x03,0x51,0x38,0xd5] +; CHECK: mrs x3, ADFSR_EL2 ; encoding: [0x03,0x51,0x3c,0xd5] +; CHECK: mrs x3, ADFSR_EL3 ; encoding: [0x03,0x51,0x3e,0xd5] +; CHECK: mrs x3, AIDR_EL1 ; encoding: [0xe3,0x00,0x39,0xd5] +; CHECK: mrs x3, AFSR1_EL1 ; encoding: [0x23,0x51,0x38,0xd5] +; CHECK: mrs x3, AIFSR_EL2 ; encoding: [0x23,0x51,0x3c,0xd5] +; CHECK: mrs x3, AIFSR_EL3 ; encoding: [0x23,0x51,0x3e,0xd5] +; CHECK: mrs x3, AMAIR_EL1 ; encoding: [0x03,0xa3,0x38,0xd5] +; CHECK: mrs x3, AMAIR_EL2 ; encoding: [0x03,0xa3,0x3c,0xd5] +; CHECK: mrs x3, AMAIR_EL3 ; encoding: [0x03,0xa3,0x3e,0xd5] +; CHECK: mrs x3, CCSIDR_EL1 ; encoding: [0x03,0x00,0x39,0xd5] +; CHECK: mrs x3, CLIDR_EL1 ; encoding: [0x23,0x00,0x39,0xd5] +; CHECK: mrs x3, CNTFRQ_EL0 ; encoding: [0x03,0xe0,0x3b,0xd5] +; CHECK: mrs x3, CNTHCTL_EL2 ; encoding: [0x03,0xe1,0x3c,0xd5] +; CHECK: mrs x3, CNTHP_CTL_EL2 ; encoding: [0x23,0xe2,0x3c,0xd5] +; CHECK: mrs x3, CNTHP_CVAL_EL2 ; encoding: [0x43,0xe2,0x3c,0xd5] +; CHECK: mrs x3, CNTHP_TVAL_EL2 ; encoding: [0x03,0xe2,0x3c,0xd5] +; CHECK: mrs x3, CNTKCTL_EL1 ; encoding: [0x03,0xe1,0x38,0xd5] +; CHECK: mrs x3, CNTPCT_EL0 ; encoding: [0x23,0xe0,0x3b,0xd5] +; CHECK: mrs x3, CNTP_CTL_EL0 ; encoding: [0x23,0xe2,0x3b,0xd5] +; CHECK: mrs x3, CNTP_CVAL_EL0 ; encoding: [0x43,0xe2,0x3b,0xd5] +; CHECK: mrs x3, CNTP_TVAL_EL0 ; encoding: [0x03,0xe2,0x3b,0xd5] +; CHECK: mrs x3, CNTVCT_EL0 ; encoding: [0x43,0xe0,0x3b,0xd5] +; CHECK: mrs x3, CNTVOFF_EL2 ; encoding: [0x63,0xe0,0x3c,0xd5] +; CHECK: mrs x3, CNTV_CTL_EL0 ; encoding: [0x23,0xe3,0x3b,0xd5] +; CHECK: mrs x3, CNTV_CVAL_EL0 ; encoding: [0x43,0xe3,0x3b,0xd5] +; CHECK: mrs x3, CNTV_TVAL_EL0 ; encoding: [0x03,0xe3,0x3b,0xd5] +; CHECK: mrs x3, CONTEXTIDR_EL1 ; encoding: [0x23,0xd0,0x38,0xd5] +; CHECK: mrs x3, CPACR_EL1 ; encoding: [0x43,0x10,0x38,0xd5] +; CHECK: mrs x3, CPTR_EL2 ; encoding: [0x43,0x11,0x3c,0xd5] +; CHECK: mrs x3, CPTR_EL3 ; encoding: [0x43,0x11,0x3e,0xd5] +; CHECK: mrs x3, CSSELR_EL1 ; encoding: [0x03,0x00,0x3a,0xd5] +; CHECK: mrs x3, CTR_EL0 ; encoding: [0x23,0x00,0x3b,0xd5] +; CHECK: mrs x3, CurrentEL ; encoding: [0x43,0x42,0x38,0xd5] +; CHECK: mrs x3, DACR32_EL2 ; encoding: [0x03,0x30,0x3c,0xd5] +; CHECK: mrs x3, DCZID_EL0 ; encoding: [0xe3,0x00,0x3b,0xd5] +; CHECK: mrs x3, REVIDR_EL1 ; encoding: [0xc3,0x00,0x38,0xd5] +; CHECK: mrs x3, ESR_EL1 ; encoding: [0x03,0x52,0x38,0xd5] +; CHECK: mrs x3, ESR_EL2 ; encoding: [0x03,0x52,0x3c,0xd5] +; CHECK: mrs x3, ESR_EL3 ; encoding: [0x03,0x52,0x3e,0xd5] +; CHECK: mrs x3, FAR_EL1 ; encoding: [0x03,0x60,0x38,0xd5] +; CHECK: mrs x3, FAR_EL2 ; encoding: [0x03,0x60,0x3c,0xd5] +; CHECK: mrs x3, FAR_EL3 ; encoding: [0x03,0x60,0x3e,0xd5] +; CHECK: mrs x3, FPEXC32_EL2 ; encoding: [0x03,0x53,0x3c,0xd5] +; CHECK: mrs x3, HACR_EL2 ; encoding: [0xe3,0x11,0x3c,0xd5] +; CHECK: mrs x3, HCR_EL2 ; encoding: [0x03,0x11,0x3c,0xd5] +; CHECK: mrs x3, HPFAR_EL2 ; encoding: [0x83,0x60,0x3c,0xd5] +; CHECK: mrs x3, HSTR_EL2 ; encoding: [0x63,0x11,0x3c,0xd5] +; CHECK: mrs x3, ID_AA64DFR0_EL1 ; encoding: [0x03,0x05,0x38,0xd5] +; CHECK: mrs x3, ID_AA64DFR1_EL1 ; encoding: [0x23,0x05,0x38,0xd5] +; CHECK: mrs x3, ID_AA64ISAR0_EL1 ; encoding: [0x03,0x06,0x38,0xd5] +; CHECK: mrs x3, ID_AA64ISAR1_EL1 ; encoding: [0x23,0x06,0x38,0xd5] +; CHECK: mrs x3, ID_AA64MMFR0_EL1 ; encoding: [0x03,0x07,0x38,0xd5] +; CHECK: mrs x3, ID_AA64MMFR1_EL1 ; encoding: [0x23,0x07,0x38,0xd5] +; CHECK: mrs x3, ID_AA64PFR0_EL1 ; encoding: [0x03,0x04,0x38,0xd5] +; CHECK: mrs x3, ID_AA64PFR1_EL1 ; encoding: [0x23,0x04,0x38,0xd5] +; CHECK: mrs x3, IFSR32_EL2 ; encoding: [0x23,0x50,0x3c,0xd5] +; CHECK: mrs x3, ISR_EL1 ; encoding: [0x03,0xc1,0x38,0xd5] +; CHECK: mrs x3, MAIR_EL1 ; encoding: [0x03,0xa2,0x38,0xd5] +; CHECK: mrs x3, MAIR_EL2 ; encoding: [0x03,0xa2,0x3c,0xd5] +; CHECK: mrs x3, MAIR_EL3 ; encoding: [0x03,0xa2,0x3e,0xd5] +; CHECK: mrs x3, MDCR_EL2 ; encoding: [0x23,0x11,0x3c,0xd5] +; CHECK: mrs x3, MDCR_EL3 ; encoding: [0x23,0x13,0x3e,0xd5] +; CHECK: mrs x3, MIDR_EL1 ; encoding: [0x03,0x00,0x38,0xd5] +; CHECK: mrs x3, MPIDR_EL1 ; encoding: [0xa3,0x00,0x38,0xd5] +; CHECK: mrs x3, MVFR0_EL1 ; encoding: [0x03,0x03,0x38,0xd5] +; CHECK: mrs x3, MVFR1_EL1 ; encoding: [0x23,0x03,0x38,0xd5] +; CHECK: mrs x3, PAR_EL1 ; encoding: [0x03,0x74,0x38,0xd5] +; CHECK: mrs x3, RVBAR_EL1 ; encoding: [0x23,0xc0,0x38,0xd5] +; CHECK: mrs x3, RVBAR_EL2 ; encoding: [0x23,0xc0,0x3c,0xd5] +; CHECK: mrs x3, RVBAR_EL3 ; encoding: [0x23,0xc0,0x3e,0xd5] +; CHECK: mrs x3, SCR_EL3 ; encoding: [0x03,0x11,0x3e,0xd5] +; CHECK: mrs x3, SCTLR_EL1 ; encoding: [0x03,0x10,0x38,0xd5] +; CHECK: mrs x3, SCTLR_EL2 ; encoding: [0x03,0x10,0x3c,0xd5] +; CHECK: mrs x3, SCTLR_EL3 ; encoding: [0x03,0x10,0x3e,0xd5] +; CHECK: mrs x3, SDER32_EL3 ; encoding: [0x23,0x11,0x3e,0xd5] +; CHECK: mrs x3, TCR_EL1 ; encoding: [0x43,0x20,0x38,0xd5] +; CHECK: mrs x3, TCR_EL2 ; encoding: [0x43,0x20,0x3c,0xd5] +; CHECK: mrs x3, TCR_EL3 ; encoding: [0x43,0x20,0x3e,0xd5] +; CHECK: mrs x3, TEECR32_EL1 ; encoding: [0x03,0x00,0x32,0xd5] +; CHECK: mrs x3, TEEHBR32_EL1 ; encoding: [0x03,0x10,0x32,0xd5] +; CHECK: mrs x3, TPIDRRO_EL0 ; encoding: [0x63,0xd0,0x3b,0xd5] +; CHECK: mrs x3, TPIDR_EL0 ; encoding: [0x43,0xd0,0x3b,0xd5] +; CHECK: mrs x3, TPIDR_EL1 ; encoding: [0x83,0xd0,0x38,0xd5] +; CHECK: mrs x3, TPIDR_EL2 ; encoding: [0x43,0xd0,0x3c,0xd5] +; CHECK: mrs x3, TPIDR_EL3 ; encoding: [0x43,0xd0,0x3e,0xd5] +; CHECK: mrs x3, TTBR0_EL1 ; encoding: [0x03,0x20,0x38,0xd5] +; CHECK: mrs x3, TTBR0_EL2 ; encoding: [0x03,0x20,0x3c,0xd5] +; CHECK: mrs x3, TTBR0_EL3 ; encoding: [0x03,0x20,0x3e,0xd5] +; CHECK: mrs x3, TTBR1_EL1 ; encoding: [0x23,0x20,0x38,0xd5] +; CHECK: mrs x3, VBAR_EL1 ; encoding: [0x03,0xc0,0x38,0xd5] +; CHECK: mrs x3, VBAR_EL2 ; encoding: [0x03,0xc0,0x3c,0xd5] +; CHECK: mrs x3, VBAR_EL3 ; encoding: [0x03,0xc0,0x3e,0xd5] +; CHECK: mrs x3, VMPIDR_EL2 ; encoding: [0xa3,0x00,0x3c,0xd5] +; CHECK: mrs x3, VPIDR_EL2 ; encoding: [0x03,0x00,0x3c,0xd5] +; CHECK: mrs x3, VTCR_EL2 ; encoding: [0x43,0x21,0x3c,0xd5] +; CHECK: mrs x3, VTTBR_EL2 ; encoding: [0x03,0x21,0x3c,0xd5] +; CHECK: mrs x3, MDCCSR_EL0 ; encoding: [0x03,0x01,0x33,0xd5] +; CHECK: mrs x3, MDCCINT_EL1 ; encoding: [0x03,0x02,0x30,0xd5] +; CHECK: mrs x3, DBGDTR_EL0 ; encoding: [0x03,0x04,0x33,0xd5] +; CHECK: mrs x3, DBGDTRRX_EL0 ; encoding: [0x03,0x05,0x33,0xd5] +; CHECK: mrs x3, DBGDTRRX_EL0 ; encoding: [0x03,0x05,0x33,0xd5] +; CHECK: mrs x3, DBGVCR32_EL2 ; encoding: [0x03,0x07,0x34,0xd5] +; CHECK: mrs x3, OSDTRRX_EL1 ; encoding: [0x43,0x00,0x30,0xd5] +; CHECK: mrs x3, MDSCR_EL1 ; encoding: [0x43,0x02,0x30,0xd5] +; CHECK: mrs x3, OSDTRTX_EL1 ; encoding: [0x43,0x03,0x30,0xd5] +; CHECK: mrs x3, OSECCR_EL11 ; encoding: [0x43,0x06,0x30,0xd5] +; CHECK: mrs x3, DBGBVR0_EL1 ; encoding: [0x83,0x00,0x30,0xd5] +; CHECK: mrs x3, DBGBVR1_EL1 ; encoding: [0x83,0x01,0x30,0xd5] +; CHECK: mrs x3, DBGBVR2_EL1 ; encoding: [0x83,0x02,0x30,0xd5] +; CHECK: mrs x3, DBGBVR3_EL1 ; encoding: [0x83,0x03,0x30,0xd5] +; CHECK: mrs x3, DBGBVR4_EL1 ; encoding: [0x83,0x04,0x30,0xd5] +; CHECK: mrs x3, DBGBVR5_EL1 ; encoding: [0x83,0x05,0x30,0xd5] +; CHECK: mrs x3, DBGBVR6_EL1 ; encoding: [0x83,0x06,0x30,0xd5] +; CHECK: mrs x3, DBGBVR7_EL1 ; encoding: [0x83,0x07,0x30,0xd5] +; CHECK: mrs x3, DBGBVR8_EL1 ; encoding: [0x83,0x08,0x30,0xd5] +; CHECK: mrs x3, DBGBVR9_EL1 ; encoding: [0x83,0x09,0x30,0xd5] +; CHECK: mrs x3, DBGBVR10_EL1 ; encoding: [0x83,0x0a,0x30,0xd5] +; CHECK: mrs x3, DBGBVR11_EL1 ; encoding: [0x83,0x0b,0x30,0xd5] +; CHECK: mrs x3, DBGBVR12_EL1 ; encoding: [0x83,0x0c,0x30,0xd5] +; CHECK: mrs x3, DBGBVR13_EL1 ; encoding: [0x83,0x0d,0x30,0xd5] +; CHECK: mrs x3, DBGBVR14_EL1 ; encoding: [0x83,0x0e,0x30,0xd5] +; CHECK: mrs x3, DBGBVR15_EL1 ; encoding: [0x83,0x0f,0x30,0xd5] +; CHECK: mrs x3, DBGBCR0_EL1 ; encoding: [0xa3,0x00,0x30,0xd5] +; CHECK: mrs x3, DBGBCR1_EL1 ; encoding: [0xa3,0x01,0x30,0xd5] +; CHECK: mrs x3, DBGBCR2_EL1 ; encoding: [0xa3,0x02,0x30,0xd5] +; CHECK: mrs x3, DBGBCR3_EL1 ; encoding: [0xa3,0x03,0x30,0xd5] +; CHECK: mrs x3, DBGBCR4_EL1 ; encoding: [0xa3,0x04,0x30,0xd5] +; CHECK: mrs x3, DBGBCR5_EL1 ; encoding: [0xa3,0x05,0x30,0xd5] +; CHECK: mrs x3, DBGBCR6_EL1 ; encoding: [0xa3,0x06,0x30,0xd5] +; CHECK: mrs x3, DBGBCR7_EL1 ; encoding: [0xa3,0x07,0x30,0xd5] +; CHECK: mrs x3, DBGBCR8_EL1 ; encoding: [0xa3,0x08,0x30,0xd5] +; CHECK: mrs x3, DBGBCR9_EL1 ; encoding: [0xa3,0x09,0x30,0xd5] +; CHECK: mrs x3, DBGBCR10_EL1 ; encoding: [0xa3,0x0a,0x30,0xd5] +; CHECK: mrs x3, DBGBCR11_EL1 ; encoding: [0xa3,0x0b,0x30,0xd5] +; CHECK: mrs x3, DBGBCR12_EL1 ; encoding: [0xa3,0x0c,0x30,0xd5] +; CHECK: mrs x3, DBGBCR13_EL1 ; encoding: [0xa3,0x0d,0x30,0xd5] +; CHECK: mrs x3, DBGBCR14_EL1 ; encoding: [0xa3,0x0e,0x30,0xd5] +; CHECK: mrs x3, DBGBCR15_EL1 ; encoding: [0xa3,0x0f,0x30,0xd5] +; CHECK: mrs x3, DBGWVR0_EL1 ; encoding: [0xc3,0x00,0x30,0xd5] +; CHECK: mrs x3, DBGWVR1_EL1 ; encoding: [0xc3,0x01,0x30,0xd5] +; CHECK: mrs x3, DBGWVR2_EL1 ; encoding: [0xc3,0x02,0x30,0xd5] +; CHECK: mrs x3, DBGWVR3_EL1 ; encoding: [0xc3,0x03,0x30,0xd5] +; CHECK: mrs x3, DBGWVR4_EL1 ; encoding: [0xc3,0x04,0x30,0xd5] +; CHECK: mrs x3, DBGWVR5_EL1 ; encoding: [0xc3,0x05,0x30,0xd5] +; CHECK: mrs x3, DBGWVR6_EL1 ; encoding: [0xc3,0x06,0x30,0xd5] +; CHECK: mrs x3, DBGWVR7_EL1 ; encoding: [0xc3,0x07,0x30,0xd5] +; CHECK: mrs x3, DBGWVR8_EL1 ; encoding: [0xc3,0x08,0x30,0xd5] +; CHECK: mrs x3, DBGWVR9_EL1 ; encoding: [0xc3,0x09,0x30,0xd5] +; CHECK: mrs x3, DBGWVR10_EL1 ; encoding: [0xc3,0x0a,0x30,0xd5] +; CHECK: mrs x3, DBGWVR11_EL1 ; encoding: [0xc3,0x0b,0x30,0xd5] +; CHECK: mrs x3, DBGWVR12_EL1 ; encoding: [0xc3,0x0c,0x30,0xd5] +; CHECK: mrs x3, DBGWVR13_EL1 ; encoding: [0xc3,0x0d,0x30,0xd5] +; CHECK: mrs x3, DBGWVR14_EL1 ; encoding: [0xc3,0x0e,0x30,0xd5] +; CHECK: mrs x3, DBGWVR15_EL1 ; encoding: [0xc3,0x0f,0x30,0xd5] +; CHECK: mrs x3, DBGWCR0_EL1 ; encoding: [0xe3,0x00,0x30,0xd5] +; CHECK: mrs x3, DBGWCR1_EL1 ; encoding: [0xe3,0x01,0x30,0xd5] +; CHECK: mrs x3, DBGWCR2_EL1 ; encoding: [0xe3,0x02,0x30,0xd5] +; CHECK: mrs x3, DBGWCR3_EL1 ; encoding: [0xe3,0x03,0x30,0xd5] +; CHECK: mrs x3, DBGWCR4_EL1 ; encoding: [0xe3,0x04,0x30,0xd5] +; CHECK: mrs x3, DBGWCR5_EL1 ; encoding: [0xe3,0x05,0x30,0xd5] +; CHECK: mrs x3, DBGWCR6_EL1 ; encoding: [0xe3,0x06,0x30,0xd5] +; CHECK: mrs x3, DBGWCR7_EL1 ; encoding: [0xe3,0x07,0x30,0xd5] +; CHECK: mrs x3, DBGWCR8_EL1 ; encoding: [0xe3,0x08,0x30,0xd5] +; CHECK: mrs x3, DBGWCR9_EL1 ; encoding: [0xe3,0x09,0x30,0xd5] +; CHECK: mrs x3, DBGWCR10_EL1 ; encoding: [0xe3,0x0a,0x30,0xd5] +; CHECK: mrs x3, DBGWCR11_EL1 ; encoding: [0xe3,0x0b,0x30,0xd5] +; CHECK: mrs x3, DBGWCR12_EL1 ; encoding: [0xe3,0x0c,0x30,0xd5] +; CHECK: mrs x3, DBGWCR13_EL1 ; encoding: [0xe3,0x0d,0x30,0xd5] +; CHECK: mrs x3, DBGWCR14_EL1 ; encoding: [0xe3,0x0e,0x30,0xd5] +; CHECK: mrs x3, DBGWCR15_EL1 ; encoding: [0xe3,0x0f,0x30,0xd5] +; CHECK: mrs x3, MDRAR_EL1 ; encoding: [0x03,0x10,0x30,0xd5] +; CHECK: mrs x3, OSLAR_EL1 ; encoding: [0x83,0x10,0x30,0xd5] +; CHECK: mrs x3, OSLSR_EL1 ; encoding: [0x83,0x11,0x30,0xd5] +; CHECK: mrs x3, OSDLR_EL1 ; encoding: [0x83,0x13,0x30,0xd5] +; CHECK: mrs x3, DBGPRCR_EL1 ; encoding: [0x83,0x14,0x30,0xd5] +; CHECK: mrs x3, DBGCLAIMSET_EL1 ; encoding: [0xc3,0x78,0x30,0xd5] +; CHECK: mrs x3, DBGCLAIMCLR_EL1 ; encoding: [0xc3,0x79,0x30,0xd5] +; CHECK: mrs x3, DBGAUTHSTATUS_EL1 ; encoding: [0xc3,0x7e,0x30,0xd5] +; CHECK: mrs x3, DBGDEVID2 ; encoding: [0xe3,0x70,0x30,0xd5] +; CHECK: mrs x3, DBGDEVID1 ; encoding: [0xe3,0x71,0x30,0xd5] +; CHECK: mrs x3, DBGDEVID0 ; encoding: [0xe3,0x72,0x30,0xd5] +; CHECK: mrs x1, S2_2_C4_C6_4 ; encoding: [0x81,0x46,0x32,0xd5] +; CHECK: mrs x3, S2_3_C2_C1_4 ; encoding: [0x83,0x21,0x33,0xd5] +; CHECK: mrs x3, S2_3_C2_C1_4 ; encoding: [0x83,0x21,0x33,0xd5] + + msr RMR_EL3, x0 + msr RMR_EL2, x0 + msr RMR_EL1, x0 + msr CPM_IOACC_CTL_EL3, x0 + +; CHECK: msr RMR_EL3, x0 ; encoding: [0x40,0xc0,0x1e,0xd5] +; CHECK: msr RMR_EL2, x0 ; encoding: [0x40,0xc0,0x1a,0xd5] +; CHECK: msr RMR_EL1, x0 ; encoding: [0x40,0xc0,0x19,0xd5] +; CHECK: msr CPM_IOACC_CTL_EL3, x0 ; encoding: [0x00,0xf2,0x1f,0xd5] + + mrs x0, ID_PFR0_EL1 + mrs x0, ID_PFR1_EL1 + mrs x0, ID_DFR0_EL1 + mrs x0, ID_AFR0_EL1 + mrs x0, ID_ISAR0_EL1 + mrs x0, ID_ISAR1_EL1 + mrs x0, ID_ISAR2_EL1 + mrs x0, ID_ISAR3_EL1 + mrs x0, ID_ISAR4_EL1 + mrs x0, ID_ISAR5_EL1 + mrs x0, AFSR1_EL1 + mrs x0, AFSR0_EL1 + mrs x0, REVIDR_EL1 +; CHECK: mrs x0, ID_PFR0_EL1 ; encoding: [0x00,0x01,0x38,0xd5] +; CHECK: mrs x0, ID_PFR1_EL1 ; encoding: [0x20,0x01,0x38,0xd5] +; CHECK: mrs x0, ID_DFR0_EL1 ; encoding: [0x40,0x01,0x38,0xd5] +; CHECK: mrs x0, ID_AFR0_EL1 ; encoding: [0x60,0x01,0x38,0xd5] +; CHECK: mrs x0, ID_ISAR0_EL1 ; encoding: [0x00,0x02,0x38,0xd5] +; CHECK: mrs x0, ID_ISAR1_EL1 ; encoding: [0x20,0x02,0x38,0xd5] +; CHECK: mrs x0, ID_ISAR2_EL1 ; encoding: [0x40,0x02,0x38,0xd5] +; CHECK: mrs x0, ID_ISAR3_EL1 ; encoding: [0x60,0x02,0x38,0xd5] +; CHECK: mrs x0, ID_ISAR4_EL1 ; encoding: [0x80,0x02,0x38,0xd5] +; CHECK: mrs x0, ID_ISAR5_EL1 ; encoding: [0xa0,0x02,0x38,0xd5] +; CHECK: mrs x0, AFSR1_EL1 ; encoding: [0x20,0x51,0x38,0xd5] +; CHECK: mrs x0, AFSR0_EL1 ; encoding: [0x00,0x51,0x38,0xd5] +; CHECK: mrs x0, REVIDR_EL1 ; encoding: [0xc0,0x00,0x38,0xd5] diff --git a/test/MC/ARM64/tls-modifiers-darwin.s b/test/MC/ARM64/tls-modifiers-darwin.s new file mode 100644 index 0000000000..6478d2692f --- /dev/null +++ b/test/MC/ARM64/tls-modifiers-darwin.s @@ -0,0 +1,13 @@ +; RUN: llvm-mc -triple=arm64-apple-ios7.0 %s -o - | FileCheck %s +; RUN: llvm-mc -triple=arm64-apple-ios7.0 -filetype=obj %s -o - | llvm-objdump -r - | FileCheck %s --check-prefix=CHECK-OBJ + + adrp x2, _var@TLVPPAGE + ldr x0, [x15, _var@TLVPPAGEOFF] + add lr, x0, _var@TLVPPAGEOFF +; CHECK: adrp x2, _var@TLVPPAG +; CHECK: ldr x0, [x15, _var@TLVPPAGEOFF] +; CHECK: add lr, x0, _var@TLVPPAGEOFF + +; CHECK-OBJ: 8 ARM64_RELOC_TLVP_LOAD_PAGEOFF12 _var +; CHECK-OBJ: 4 ARM64_RELOC_TLVP_LOAD_PAGEOFF12 _var +; CHECK-OBJ: 0 ARM64_RELOC_TLVP_LOAD_PAGE21 _var diff --git a/test/MC/ARM64/tls-relocs.s b/test/MC/ARM64/tls-relocs.s new file mode 100644 index 0000000000..7e8b7545b4 --- /dev/null +++ b/test/MC/ARM64/tls-relocs.s @@ -0,0 +1,320 @@ +// RUN: llvm-mc -triple=arm64-none-linux-gnu -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj < %s -o - | \ +// RUN: llvm-readobj -r -t | FileCheck --check-prefix=CHECK-ELF %s + + +//////////////////////////////////////////////////////////////////////////////// +// TLS initial-exec forms +//////////////////////////////////////////////////////////////////////////////// + + movz x15, #:gottprel_g1:var +// CHECK: movz x15, #:gottprel_g1:var // encoding: [0bAAA01111,A,0b101AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :gottprel_g1:var, kind: fixup_arm64_movw + +// CHECK-ELF: {{0x[0-9A-F]+}} R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 [[VARSYM:[^ ]+]] + + + movk x13, #:gottprel_g0_nc:var +// CHECK: movk x13, #:gottprel_g0_nc:var // encoding: [0bAAA01101,A,0b100AAAAA,0xf2] +// CHECK-NEXT: // fixup A - offset: 0, value: :gottprel_g0_nc:var, kind: fixup_arm64_movw + + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC [[VARSYM]] + + adrp x11, :gottprel:var + ldr x10, [x0, #:gottprel_lo12:var] + ldr x9, :gottprel:var +// CHECK: adrp x11, :gottprel:var // encoding: [0x0b'A',A,A,0x90'A'] +// CHECK-NEXT: // fixup A - offset: 0, value: :gottprel:var, kind: fixup_arm64_pcrel_adrp_imm21 +// CHECK: ldr x10, [x0, :gottprel_lo12:var] // encoding: [0x0a,0bAAAAAA00,0b01AAAAAA,0xf9] +// CHECK-NEXT: // fixup A - offset: 0, value: :gottprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale8 +// CHECK: ldr x9, :gottprel:var // encoding: [0bAAA01001,A,A,0x58] +// CHECK-NEXT: // fixup A - offset: 0, value: :gottprel:var, kind: fixup_arm64_pcrel_imm19 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 [[VARSYM]] + + +//////////////////////////////////////////////////////////////////////////////// +// TLS local-exec forms +//////////////////////////////////////////////////////////////////////////////// + + movz x3, #:tprel_g2:var + movn x4, #:tprel_g2:var +// CHECK: movz x3, #:tprel_g2:var // encoding: [0bAAA00011,A,0b110AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g2:var, kind: fixup_arm64_movw +// CHECK: movn x4, #:tprel_g2:var // encoding: [0bAAA00100,A,0b110AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g2:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G2 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G2 [[VARSYM]] + + + movz x5, #:tprel_g1:var + movn x6, #:tprel_g1:var + movz w7, #:tprel_g1:var +// CHECK: movz x5, #:tprel_g1:var // encoding: [0bAAA00101,A,0b101AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_arm64_movw +// CHECK: movn x6, #:tprel_g1:var // encoding: [0bAAA00110,A,0b101AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_arm64_movw +// CHECK: movz w7, #:tprel_g1:var // encoding: [0bAAA00111,A,0b101AAAAA,0x12] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]] + + + movk x9, #:tprel_g1_nc:var + movk w10, #:tprel_g1_nc:var +// CHECK: movk x9, #:tprel_g1_nc:var // encoding: [0bAAA01001,A,0b101AAAAA,0xf2] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1_nc:var, kind: fixup_arm64_movw +// CHECK: movk w10, #:tprel_g1_nc:var // encoding: [0bAAA01010,A,0b101AAAAA,0x72] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1_nc:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1_NC [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G1_NC [[VARSYM]] + + + movz x11, #:tprel_g0:var + movn x12, #:tprel_g0:var + movz w13, #:tprel_g0:var +// CHECK: movz x11, #:tprel_g0:var // encoding: [0bAAA01011,A,0b100AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_arm64_movw +// CHECK: movn x12, #:tprel_g0:var // encoding: [0bAAA01100,A,0b100AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_arm64_movw +// CHECK: movz w13, #:tprel_g0:var // encoding: [0bAAA01101,A,0b100AAAAA,0x12] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]] + + + movk x15, #:tprel_g0_nc:var + movk w16, #:tprel_g0_nc:var +// CHECK: movk x15, #:tprel_g0_nc:var // encoding: [0bAAA01111,A,0b100AAAAA,0xf2] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0_nc:var, kind: fixup_arm64_movw +// CHECK: movk w16, #:tprel_g0_nc:var // encoding: [0bAAA10000,A,0b100AAAAA,0x72] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0_nc:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0_NC [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_MOVW_TPREL_G0_NC [[VARSYM]] + + + add x21, x22, #:tprel_lo12:var +// CHECK: add x21, x22, :tprel_lo12:var // encoding: [0xd5,0bAAAAAA10,0b00AAAAAA,0x91] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_add_imm12 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_ADD_TPREL_LO12 [[VARSYM]] + + + add x25, x26, #:tprel_lo12_nc:var +// CHECK: add x25, x26, :tprel_lo12_nc:var // encoding: [0x59,0bAAAAAA11,0b00AAAAAA,0x91] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_add_imm12 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_ADD_TPREL_LO12_NC [[VARSYM]] + + + ldrb w29, [x30, #:tprel_lo12:var] + ldrsb x29, [x28, #:tprel_lo12_nc:var] +// CHECK: ldrb w29, [lr, :tprel_lo12:var] // encoding: [0xdd,0bAAAAAA11,0b01AAAAAA,0x39] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale1 +// CHECK: ldrsb fp, [x28, :tprel_lo12_nc:var] // encoding: [0x9d,0bAAAAAA11,0b10AAAAAA,0x39] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale1 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST8_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC [[VARSYM]] + + + strh w27, [x26, #:tprel_lo12:var] + ldrsh x25, [x24, #:tprel_lo12_nc:var] +// CHECK: strh w27, [x26, :tprel_lo12:var] // encoding: [0x5b,0bAAAAAA11,0b00AAAAAA,0x79] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale2 +// CHECK: ldrsh x25, [x24, :tprel_lo12_nc:var] // encoding: [0x19,0bAAAAAA11,0b10AAAAAA,0x79] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale2 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST16_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC [[VARSYM]] + + + ldr w23, [x22, #:tprel_lo12:var] + ldrsw x21, [x20, #:tprel_lo12_nc:var] +// CHECK: ldr w23, [x22, :tprel_lo12:var] // encoding: [0xd7,0bAAAAAA10,0b01AAAAAA,0xb9] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale4 +// CHECK: ldrsw x21, [x20, :tprel_lo12_nc:var] // encoding: [0x95,0bAAAAAA10,0b10AAAAAA,0xb9] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale4 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST32_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC [[VARSYM]] + + ldr x19, [x18, #:tprel_lo12:var] + str x17, [x16, #:tprel_lo12_nc:var] +// CHECK: ldr x19, [x18, :tprel_lo12:var] // encoding: [0x53,0bAAAAAA10,0b01AAAAAA,0xf9] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale8 +// CHECK: str x17, [x16, :tprel_lo12_nc:var] // encoding: [0x11,0bAAAAAA10,0b00AAAAAA,0xf9] +// CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale8 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST64_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC [[VARSYM]] + + +//////////////////////////////////////////////////////////////////////////////// +// TLS local-dynamic forms +//////////////////////////////////////////////////////////////////////////////// + + movz x3, #:dtprel_g2:var + movn x4, #:dtprel_g2:var +// CHECK: movz x3, #:dtprel_g2:var // encoding: [0bAAA00011,A,0b110AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_arm64_movw +// CHECK: movn x4, #:dtprel_g2:var // encoding: [0bAAA00100,A,0b110AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]] + + + movz x5, #:dtprel_g1:var + movn x6, #:dtprel_g1:var + movz w7, #:dtprel_g1:var +// CHECK: movz x5, #:dtprel_g1:var // encoding: [0bAAA00101,A,0b101AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_arm64_movw +// CHECK: movn x6, #:dtprel_g1:var // encoding: [0bAAA00110,A,0b101AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_arm64_movw +// CHECK: movz w7, #:dtprel_g1:var // encoding: [0bAAA00111,A,0b101AAAAA,0x12] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]] + + + movk x9, #:dtprel_g1_nc:var + movk w10, #:dtprel_g1_nc:var +// CHECK: movk x9, #:dtprel_g1_nc:var // encoding: [0bAAA01001,A,0b101AAAAA,0xf2] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g1_nc:var, kind: fixup_arm64_movw +// CHECK: movk w10, #:dtprel_g1_nc:var // encoding: [0bAAA01010,A,0b101AAAAA,0x72] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g1_nc:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC [[VARSYM]] + + + movz x11, #:dtprel_g0:var + movn x12, #:dtprel_g0:var + movz w13, #:dtprel_g0:var +// CHECK: movz x11, #:dtprel_g0:var // encoding: [0bAAA01011,A,0b100AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_arm64_movw +// CHECK: movn x12, #:dtprel_g0:var // encoding: [0bAAA01100,A,0b100AAAAA,0x92] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_arm64_movw +// CHECK: movz w13, #:dtprel_g0:var // encoding: [0bAAA01101,A,0b100AAAAA,0x12] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]] + + + movk x15, #:dtprel_g0_nc:var + movk w16, #:dtprel_g0_nc:var +// CHECK: movk x15, #:dtprel_g0_nc:var // encoding: [0bAAA01111,A,0b100AAAAA,0xf2] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0_nc:var, kind: fixup_arm64_movw +// CHECK: movk w16, #:dtprel_g0_nc:var // encoding: [0bAAA10000,A,0b100AAAAA,0x72] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0_nc:var, kind: fixup_arm64_movw + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC [[VARSYM]] + + + add x21, x22, #:dtprel_lo12:var +// CHECK: add x21, x22, :dtprel_lo12:var // encoding: [0xd5,0bAAAAAA10,0b00AAAAAA,0x91] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_add_imm12 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_ADD_DTPREL_LO12 [[VARSYM]] + + + add x25, x26, #:dtprel_lo12_nc:var +// CHECK: add x25, x26, :dtprel_lo12_nc:var // encoding: [0x59,0bAAAAAA11,0b00AAAAAA,0x91] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_add_imm12 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC [[VARSYM]] + + + ldrb w29, [x30, #:dtprel_lo12:var] + ldrsb x29, [x28, #:dtprel_lo12_nc:var] +// CHECK: ldrb w29, [lr, :dtprel_lo12:var] // encoding: [0xdd,0bAAAAAA11,0b01AAAAAA,0x39] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale1 +// CHECK: ldrsb fp, [x28, :dtprel_lo12_nc:var] // encoding: [0x9d,0bAAAAAA11,0b10AAAAAA,0x39] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale1 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST8_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC [[VARSYM]] + + + strh w27, [x26, #:dtprel_lo12:var] + ldrsh x25, [x24, #:dtprel_lo12_nc:var] +// CHECK: strh w27, [x26, :dtprel_lo12:var] // encoding: [0x5b,0bAAAAAA11,0b00AAAAAA,0x79] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale2 +// CHECK: ldrsh x25, [x24, :dtprel_lo12_nc:var] // encoding: [0x19,0bAAAAAA11,0b10AAAAAA,0x79] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale2 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST16_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC [[VARSYM]] + + + ldr w23, [x22, #:dtprel_lo12:var] + ldrsw x21, [x20, #:dtprel_lo12_nc:var] +// CHECK: ldr w23, [x22, :dtprel_lo12:var] // encoding: [0xd7,0bAAAAAA10,0b01AAAAAA,0xb9] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale4 +// CHECK: ldrsw x21, [x20, :dtprel_lo12_nc:var] // encoding: [0x95,0bAAAAAA10,0b10AAAAAA,0xb9] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale4 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST32_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC [[VARSYM]] + + ldr x19, [x18, #:dtprel_lo12:var] + str x17, [x16, #:dtprel_lo12_nc:var] +// CHECK: ldr x19, [x18, :dtprel_lo12:var] // encoding: [0x53,0bAAAAAA10,0b01AAAAAA,0xf9] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_arm64_ldst_imm12_scale8 +// CHECK: str x17, [x16, :dtprel_lo12_nc:var] // encoding: [0x11,0bAAAAAA10,0b00AAAAAA,0xf9] +// CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_arm64_ldst_imm12_scale8 + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST64_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC [[VARSYM]] + +//////////////////////////////////////////////////////////////////////////////// +// TLS descriptor forms +//////////////////////////////////////////////////////////////////////////////// + + adrp x8, :tlsdesc:var + ldr x7, [x6, #:tlsdesc_lo12:var] + add x5, x4, #:tlsdesc_lo12:var + .tlsdesccall var + blr x3 + +// CHECK: adrp x8, :tlsdesc:var // encoding: [0x08'A',A,A,0x90'A'] +// CHECK-NEXT: // fixup A - offset: 0, value: :tlsdesc:var, kind: fixup_arm64_pcrel_adrp_imm21 +// CHECK: ldr x7, [x6, :tlsdesc_lo12:var] // encoding: [0xc7,0bAAAAAA00,0b01AAAAAA,0xf9] +// CHECK-NEXT: // fixup A - offset: 0, value: :tlsdesc_lo12:var, kind: fixup_arm64_ldst_imm12_scale8 +// CHECK: add x5, x4, :tlsdesc_lo12:var // encoding: [0x85,0bAAAAAA00,0b00AAAAAA,0x91] +// CHECK-NEXT: // fixup A - offset: 0, value: :tlsdesc_lo12:var, kind: fixup_arm64_add_imm12 +// CHECK: .tlsdesccall var // encoding: [] +// CHECK-NEXT: // fixup A - offset: 0, value: var, kind: fixup_arm64_tlsdesc_call +// CHECK: blr x3 // encoding: [0x60,0x00,0x3f,0xd6] + + +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADR_PAGE [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_CALL [[VARSYM]] + + // Make sure symbol 5 has type STT_TLS: + +// CHECK-ELF: Symbols [ +// CHECK-ELF: Symbol { +// CHECK-ELF: Name: var (6) +// CHECK-ELF-NEXT: Value: +// CHECK-ELF-NEXT: Size: +// CHECK-ELF-NEXT: Binding: Global +// CHECK-ELF-NEXT: Type: TLS diff --git a/test/MC/ARM64/variable-exprs.s b/test/MC/ARM64/variable-exprs.s new file mode 100644 index 0000000000..01204425c7 --- /dev/null +++ b/test/MC/ARM64/variable-exprs.s @@ -0,0 +1,40 @@ +// RUN: llvm-mc -triple arm64-apple-darwin10 %s -filetype=obj -o %t.o + +.data + + .long 0 +a: + .long 0 +b = a + +c: .long b + +d2 = d +.globl d2 +d3 = d + 4 +.globl d3 + +e = a + 4 + +g: +f = g + .long 0 + + .long b + .long e + .long a + 4 + .long d + .long d2 + .long d3 + .long f + .long g + +/// + .text +t0: +Lt0_a: + .long 0 + + .section __DWARF,__debug_frame,regular,debug +Lt1 = Lt0_a + .long Lt1 diff --git a/test/MC/Disassembler/ARM64/advsimd.txt b/test/MC/Disassembler/ARM64/advsimd.txt new file mode 100644 index 0000000000..486dd16e10 --- /dev/null +++ b/test/MC/Disassembler/ARM64/advsimd.txt @@ -0,0 +1,2282 @@ +# RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 --disassemble < %s | FileCheck %s + +0x00 0xb8 0x20 0x0e +0x00 0xb8 0x20 0x4e +0x00 0xb8 0x60 0x0e +0x00 0xb8 0x60 0x4e +0x00 0xb8 0xa0 0x0e +0x00 0xb8 0xa0 0x4e + +# CHECK: abs.8b v0, v0 +# CHECK: abs.16b v0, v0 +# CHECK: abs.4h v0, v0 +# CHECK: abs.8h v0, v0 +# CHECK: abs.2s v0, v0 +# CHECK: abs.4s v0, v0 + +0x00 0x84 0x20 0x0e +0x00 0x84 0x20 0x4e +0x00 0x84 0x60 0x0e +0x00 0x84 0x60 0x4e +0x00 0x84 0xa0 0x0e +0x00 0x84 0xa0 0x4e +0x00 0x84 0xe0 0x4e + +# CHECK: add.8b v0, v0, v0 +# CHECK: add.16b v0, v0, v0 +# CHECK: add.4h v0, v0, v0 +# CHECK: add.8h v0, v0, v0 +# CHECK: add.2s v0, v0, v0 +# CHECK: add.4s v0, v0, v0 +# CHECK: add.2d v0, v0, v0 + +0x41 0x84 0xe3 0x5e + +# CHECK: add d1, d2, d3 + +0x00 0x40 0x20 0x0e +0x00 0x40 0x20 0x4e +0x00 0x40 0x60 0x0e +0x00 0x40 0x60 0x4e +0x00 0x40 0xa0 0x0e +0x00 0x40 0xa0 0x4e + +# CHECK: addhn.8b v0, v0, v0 +# CHECK: addhn2.16b v0, v0, v0 +# CHECK: addhn.4h v0, v0, v0 +# CHECK: addhn2.8h v0, v0, v0 +# CHECK: addhn.2s v0, v0, v0 +# CHECK: addhn2.4s v0, v0, v0 + +0x00 0xbc 0x20 0x0e +0x00 0xbc 0x20 0x4e +0x00 0xbc 0x60 0x0e +0x00 0xbc 0x60 0x4e +0x00 0xbc 0xa0 0x0e +0x00 0xbc 0xa0 0x4e +0x00 0xbc 0xe0 0x4e + +# CHECK: addp.8b v0, v0, v0 +# CHECK: addp.16b v0, v0, v0 +# CHECK: addp.4h v0, v0, v0 +# CHECK: addp.8h v0, v0, v0 +# CHECK: addp.2s v0, v0, v0 +# CHECK: addp.4s v0, v0, v0 +# CHECK: addp.2d v0, v0, v0 + +0x00 0xb8 0xf1 0x5e + +# CHECK: addp.2d d0, v0 + +0x00 0xb8 0x31 0x0e +0x00 0xb8 0x31 0x4e +0x00 0xb8 0x71 0x0e +0x00 0xb8 0x71 0x4e +0x00 0xb8 0xb1 0x4e + +# CHECK: addv.8b b0, v0 +# CHECK: addv.16b b0, v0 +# CHECK: addv.4h h0, v0 +# CHECK: addv.8h h0, v0 +# CHECK: addv.4s s0, v0 + + +# INS/DUP +0x60 0x0c 0x08 0x4e +0x60 0x0c 0x04 0x4e +0x60 0x0c 0x04 0x0e +0x60 0x0c 0x02 0x4e +0x60 0x0c 0x02 0x0e +0x60 0x0c 0x01 0x4e +0x60 0x0c 0x01 0x0e + +# CHECK: dup.2d v0, x3 +# CHECK: dup.4s v0, w3 +# CHECK: dup.2s v0, w3 +# CHECK: dup.8h v0, w3 +# CHECK: dup.4h v0, w3 +# CHECK: dup.16b v0, w3 +# CHECK: dup.8b v0, w3 + +0x60 0x04 0x18 0x4e +0x60 0x04 0x0c 0x0e +0x60 0x04 0x0c 0x4e +0x60 0x04 0x06 0x0e +0x60 0x04 0x06 0x4e +0x60 0x04 0x03 0x0e +0x60 0x04 0x03 0x4e + +# CHECK: dup.2d v0, v3[1] +# CHECK: dup.2s v0, v3[1] +# CHECK: dup.4s v0, v3[1] +# CHECK: dup.4h v0, v3[1] +# CHECK: dup.8h v0, v3[1] +# CHECK: dup.8b v0, v3[1] +# CHECK: dup.16b v0, v3[1] + + +0x43 0x2c 0x14 0x4e +0x43 0x2c 0x14 0x4e +0x43 0x3c 0x14 0x0e +0x43 0x3c 0x14 0x0e +0x43 0x3c 0x18 0x4e +0x43 0x3c 0x18 0x4e + +# CHECK: smov.s x3, v2[2] +# CHECK: smov.s x3, v2[2] +# CHECK: umov.s w3, v2[2] +# CHECK: umov.s w3, v2[2] +# CHECK: umov.d x3, v2[1] +# CHECK: umov.d x3, v2[1] + +0xa2 0x1c 0x18 0x4e +0xa2 0x1c 0x0c 0x4e +0xa2 0x1c 0x06 0x4e +0xa2 0x1c 0x03 0x4e + +0xa2 0x1c 0x18 0x4e +0xa2 0x1c 0x0c 0x4e +0xa2 0x1c 0x06 0x4e +0xa2 0x1c 0x03 0x4e + +# CHECK: ins.d v2[1], x5 +# CHECK: ins.s v2[1], w5 +# CHECK: ins.h v2[1], w5 +# CHECK: ins.b v2[1], w5 + +# CHECK: ins.d v2[1], x5 +# CHECK: ins.s v2[1], w5 +# CHECK: ins.h v2[1], w5 +# CHECK: ins.b v2[1], w5 + +0xe2 0x45 0x18 0x6e +0xe2 0x25 0x0c 0x6e +0xe2 0x15 0x06 0x6e +0xe2 0x0d 0x03 0x6e + +0xe2 0x05 0x18 0x6e +0xe2 0x45 0x1c 0x6e +0xe2 0x35 0x1e 0x6e +0xe2 0x2d 0x15 0x6e + +# CHECK: ins.d v2[1], v15[1] +# CHECK: ins.s v2[1], v15[1] +# CHECK: ins.h v2[1], v15[1] +# CHECK: ins.b v2[1], v15[1] + +# CHECK: ins.d v2[1], v15[0] +# CHECK: ins.s v2[3], v15[2] +# CHECK: ins.h v2[7], v15[3] +# CHECK: ins.b v2[10], v15[5] + +0x00 0x1c 0x20 0x0e +0x00 0x1c 0x20 0x4e + +# CHECK: and.8b v0, v0, v0 +# CHECK: and.16b v0, v0, v0 + +0x00 0x1c 0x60 0x0e + +# CHECK: bic.8b v0, v0, v0 + +0x00 0x8c 0x20 0x2e +0x00 0x3c 0x20 0x0e +0x00 0x34 0x20 0x0e +0x00 0x34 0x20 0x2e +0x00 0x3c 0x20 0x2e +0x00 0x8c 0x20 0x0e +0x00 0xd4 0xa0 0x2e +0x00 0xec 0x20 0x2e +0x00 0xec 0xa0 0x2e +0x00 0xd4 0x20 0x2e +0x00 0xd4 0x20 0x0e +0x00 0xe4 0x20 0x0e +0x00 0xe4 0x20 0x2e +0x00 0xe4 0xa0 0x2e +0x00 0xfc 0x20 0x2e +0x00 0xc4 0x20 0x2e +0x00 0xc4 0x20 0x0e +0x00 0xf4 0x20 0x2e +0x00 0xf4 0x20 0x0e +0x00 0xc4 0xa0 0x2e +0x00 0xc4 0xa0 0x0e +0x00 0xf4 0xa0 0x2e +0x00 0xf4 0xa0 0x0e +0x00 0xcc 0x20 0x0e +0x00 0xcc 0xa0 0x0e +0x00 0xdc 0x20 0x0e +0x00 0xdc 0x20 0x2e +0x00 0xfc 0x20 0x0e +0x00 0xfc 0xa0 0x0e +0x00 0xd4 0xa0 0x0e +0x00 0x94 0x20 0x0e +0x00 0x94 0x20 0x2e +0x00 0x9c 0x20 0x0e +0x00 0x9c 0x20 0x2e +0x00 0x7c 0x20 0x0e +0x00 0x74 0x20 0x0e +0x00 0x04 0x20 0x0e +0x00 0x24 0x20 0x0e +0x00 0xa4 0x20 0x0e +0x00 0x64 0x20 0x0e +0x00 0xac 0x20 0x0e +0x00 0x6c 0x20 0x0e +0x00 0x0c 0x20 0x0e +0x00 0xb4 0x60 0x0e +0x00 0xb4 0x60 0x2e +0x00 0x5c 0x20 0x0e +0x00 0x4c 0x20 0x0e +0x00 0x2c 0x20 0x0e +0x00 0x14 0x20 0x0e +0x00 0x54 0x20 0x0e +0x00 0x44 0x20 0x0e +0x00 0x84 0x20 0x2e +0x00 0x7c 0x20 0x2e +0x00 0x74 0x20 0x2e +0x00 0x04 0x20 0x2e +0x00 0x24 0x20 0x2e +0x00 0xa4 0x20 0x2e +0x00 0x64 0x20 0x2e +0x00 0xac 0x20 0x2e +0x00 0x6c 0x20 0x2e +0x00 0x0c 0x20 0x2e +0x00 0x5c 0x20 0x2e +0x00 0x4c 0x20 0x2e +0x00 0x2c 0x20 0x2e +0x00 0x14 0x20 0x2e +0x00 0x54 0x20 0x2e +0x00 0x44 0x20 0x2e + +# CHECK: cmeq.8b v0, v0, v0 +# CHECK: cmge.8b v0, v0, v0 +# CHECK: cmgt.8b v0, v0, v0 +# CHECK: cmhi.8b v0, v0, v0 +# CHECK: cmhs.8b v0, v0, v0 +# CHECK: cmtst.8b v0, v0, v0 +# CHECK: fabd.2s v0, v0, v0 +# CHECK: facge.2s v0, v0, v0 +# CHECK: facgt.2s v0, v0, v0 +# CHECK: faddp.2s v0, v0, v0 +# CHECK: fadd.2s v0, v0, v0 +# CHECK: fcmeq.2s v0, v0, v0 +# CHECK: fcmge.2s v0, v0, v0 +# CHECK: fcmgt.2s v0, v0, v0 +# CHECK: fdiv.2s v0, v0, v0 +# CHECK: fmaxnmp.2s v0, v0, v0 +# CHECK: fmaxnm.2s v0, v0, v0 +# CHECK: fmaxp.2s v0, v0, v0 +# CHECK: fmax.2s v0, v0, v0 +# CHECK: fminnmp.2s v0, v0, v0 +# CHECK: fminnm.2s v0, v0, v0 +# CHECK: fminp.2s v0, v0, v0 +# CHECK: fmin.2s v0, v0, v0 +# CHECK: fmla.2s v0, v0, v0 +# CHECK: fmls.2s v0, v0, v0 +# CHECK: fmulx.2s v0, v0, v0 +# CHECK: fmul.2s v0, v0, v0 +# CHECK: frecps.2s v0, v0, v0 +# CHECK: frsqrts.2s v0, v0, v0 +# CHECK: fsub.2s v0, v0, v0 +# CHECK: mla.8b v0, v0, v0 +# CHECK: mls.8b v0, v0, v0 +# CHECK: mul.8b v0, v0, v0 +# CHECK: pmul.8b v0, v0, v0 +# CHECK: saba.8b v0, v0, v0 +# CHECK: sabd.8b v0, v0, v0 +# CHECK: shadd.8b v0, v0, v0 +# CHECK: shsub.8b v0, v0, v0 +# CHECK: smaxp.8b v0, v0, v0 +# CHECK: smax.8b v0, v0, v0 +# CHECK: sminp.8b v0, v0, v0 +# CHECK: smin.8b v0, v0, v0 +# CHECK: sqadd.8b v0, v0, v0 +# CHECK: sqdmulh.4h v0, v0, v0 +# CHECK: sqrdmulh.4h v0, v0, v0 +# CHECK: sqrshl.8b v0, v0, v0 +# CHECK: sqshl.8b v0, v0, v0 +# CHECK: sqsub.8b v0, v0, v0 +# CHECK: srhadd.8b v0, v0, v0 +# CHECK: srshl.8b v0, v0, v0 +# CHECK: sshl.8b v0, v0, v0 +# CHECK: sub.8b v0, v0, v0 +# CHECK: uaba.8b v0, v0, v0 +# CHECK: uabd.8b v0, v0, v0 +# CHECK: uhadd.8b v0, v0, v0 +# CHECK: uhsub.8b v0, v0, v0 +# CHECK: umaxp.8b v0, v0, v0 +# CHECK: umax.8b v0, v0, v0 +# CHECK: uminp.8b v0, v0, v0 +# CHECK: umin.8b v0, v0, v0 +# CHECK: uqadd.8b v0, v0, v0 +# CHECK: uqrshl.8b v0, v0, v0 +# CHECK: uqshl.8b v0, v0, v0 +# CHECK: uqsub.8b v0, v0, v0 +# CHECK: urhadd.8b v0, v0, v0 +# CHECK: urshl.8b v0, v0, v0 +# CHECK: ushl.8b v0, v0, v0 + +0x00 0x1c 0xe0 0x2e +0x00 0x1c 0xa0 0x2e +0x00 0x1c 0x60 0x2e +0x00 0x1c 0x20 0x2e +0x00 0x1c 0xe0 0x0e +0x00 0x1c 0xa0 0x0e + +# CHECK: bif.8b v0, v0, v0 +# CHECK: bit.8b v0, v0, v0 +# CHECK: bsl.8b v0, v0, v0 +# CHECK: eor.8b v0, v0, v0 +# CHECK: orn.8b v0, v0, v0 +# CHECK: orr.8b v0, v0, v0 + +0x00 0x68 0x20 0x0e +0x00 0x68 0x20 0x4e +0x00 0x68 0x60 0x0e +0x00 0x68 0x60 0x4e +0x00 0x68 0xa0 0x0e +0x00 0x68 0xa0 0x4e + +# CHECK: sadalp.4h v0, v0 +# CHECK: sadalp.8h v0, v0 +# CHECK: sadalp.2s v0, v0 +# CHECK: sadalp.4s v0, v0 +# CHECK: sadalp.1d v0, v0 +# CHECK: sadalp.2d v0, v0 + +0x00 0x48 0x20 0x0e +0x00 0x48 0x20 0x2e +0x00 0x58 0x20 0x0e +0x00 0xf8 0xa0 0x0e +0x00 0xc8 0x21 0x0e +0x00 0xc8 0x21 0x2e +0x00 0xb8 0x21 0x0e +0x00 0xb8 0x21 0x2e +0x00 0xa8 0x21 0x0e +0x00 0xa8 0x21 0x2e +0x00 0xa8 0xa1 0x0e +0x00 0xa8 0xa1 0x2e +0x00 0xb8 0xa1 0x0e +0x00 0xb8 0xa1 0x2e +0x00 0xf8 0xa0 0x2e +0x00 0xd8 0xa1 0x0e +0x00 0xd8 0xa1 0x2e +0x00 0xf8 0xa1 0x2e +0x00 0xb8 0x20 0x2e +0x00 0x58 0x20 0x2e +0x00 0x58 0x60 0x2e +0x00 0x18 0x20 0x0e +0x00 0x08 0x20 0x2e +0x00 0x08 0x20 0x0e +0x00 0x68 0x20 0x0e +0x00 0x28 0x20 0x0e +0x00 0xd8 0x21 0x0e +0x00 0x38 0x21 0x2e +0x00 0x78 0x20 0x0e +0x00 0x78 0x20 0x2e +0x00 0x48 0x21 0x0e +0x00 0x28 0x21 0x2e +0x00 0x38 0x20 0x0e +0x00 0x68 0x20 0x2e +0x00 0x28 0x20 0x2e +0x00 0xd8 0x21 0x2e +0x00 0x48 0x21 0x2e +0x00 0xc8 0xa1 0x0e +0x00 0xc8 0xa1 0x2e +0x00 0x38 0x20 0x2e +0x00 0x28 0x21 0x0e +0x00 0x48 0x20 0x0e +0x00 0x48 0x20 0x2e +0x00 0x58 0x20 0x0e +0x00 0xf8 0xa0 0x0e +0x00 0xc8 0x21 0x0e +0x00 0xc8 0x21 0x2e +0x00 0xb8 0x21 0x0e +0x00 0xb8 0x21 0x2e +0x00 0xa8 0x21 0x0e +0x00 0xa8 0x21 0x2e +0x00 0xa8 0xa1 0x0e +0x00 0xa8 0xa1 0x2e +0x00 0xb8 0xa1 0x0e +0x00 0xb8 0xa1 0x2e +0x00 0xf8 0xa0 0x2e +0x00 0xd8 0xa1 0x0e +0x00 0xd8 0xa1 0x2e +0x00 0xf8 0xa1 0x2e +0x00 0xb8 0x20 0x2e +0x00 0x58 0x20 0x2e +0x00 0x58 0x60 0x2e +0x00 0x18 0x20 0x0e +0x00 0x08 0x20 0x2e +0x00 0x08 0x20 0x0e +0x00 0x68 0x20 0x0e +0x00 0x28 0x20 0x0e +0x00 0xd8 0x21 0x0e +0x00 0x38 0x21 0x2e +0x00 0x78 0x20 0x0e +0x00 0x78 0x20 0x2e +0x00 0x48 0x21 0x0e +0x00 0x28 0x21 0x2e +0x00 0x38 0x20 0x0e +0x00 0x68 0x20 0x2e +0x00 0x28 0x20 0x2e +0x00 0xd8 0x21 0x2e +0x00 0x48 0x21 0x2e +0x00 0xc8 0xa1 0x0e +0x00 0xc8 0xa1 0x2e +0x00 0x38 0x20 0x2e +0x00 0x28 0x21 0x0e + +# CHECK: cls.8b v0, v0 +# CHECK: clz.8b v0, v0 +# CHECK: cnt.8b v0, v0 +# CHECK: fabs.2s v0, v0 +# CHECK: fcvtas.2s v0, v0 +# CHECK: fcvtau.2s v0, v0 +# CHECK: fcvtms.2s v0, v0 +# CHECK: fcvtmu.2s v0, v0 +# CHECK: fcvtns.2s v0, v0 +# CHECK: fcvtnu.2s v0, v0 +# CHECK: fcvtps.2s v0, v0 +# CHECK: fcvtpu.2s v0, v0 +# CHECK: fcvtzs.2s v0, v0 +# CHECK: fcvtzu.2s v0, v0 +# CHECK: fneg.2s v0, v0 +# CHECK: frecpe.2s v0, v0 +# CHECK: frsqrte.2s v0, v0 +# CHECK: fsqrt.2s v0, v0 +# CHECK: neg.8b v0, v0 +# CHECK: not.8b v0, v0 +# CHECK: rbit.8b v0, v0 +# CHECK: rev16.8b v0, v0 +# CHECK: rev32.8b v0, v0 +# CHECK: rev64.8b v0, v0 +# CHECK: sadalp.4h v0, v0 +# CHECK: saddlp.4h v0, v0 +# CHECK: scvtf.2s v0, v0 +# CHECK: shll.8h v0, v0, #8 +# CHECK: sqabs.8b v0, v0 +# CHECK: sqneg.8b v0, v0 +# CHECK: sqxtn.8b v0, v0 +# CHECK: sqxtun.8b v0, v0 +# CHECK: suqadd.8b v0, v0 +# CHECK: uadalp.4h v0, v0 +# CHECK: uaddlp.4h v0, v0 +# CHECK: ucvtf.2s v0, v0 +# CHECK: uqxtn.8b v0, v0 +# CHECK: urecpe.2s v0, v0 +# CHECK: ursqrte.2s v0, v0 +# CHECK: usqadd.8b v0, v0 +# CHECK: xtn.8b v0, v0 + +0x00 0x98 0x20 0x0e +0x00 0x98 0x20 0x4e +0x00 0x98 0x60 0x0e +0x00 0x98 0x60 0x4e +0x00 0x98 0xa0 0x0e +0x00 0x98 0xa0 0x4e +0x00 0x98 0xe0 0x4e + +# CHECK: cmeq.8b v0, v0, #0 +# CHECK: cmeq.16b v0, v0, #0 +# CHECK: cmeq.4h v0, v0, #0 +# CHECK: cmeq.8h v0, v0, #0 +# CHECK: cmeq.2s v0, v0, #0 +# CHECK: cmeq.4s v0, v0, #0 +# CHECK: cmeq.2d v0, v0, #0 + +0x00 0x88 0x20 0x2e +0x00 0x88 0x20 0x0e +0x00 0x98 0x20 0x2e +0x00 0xa8 0x20 0x0e +0x00 0xd8 0xa0 0x0e +0x00 0xc8 0xa0 0x2e +0x00 0xc8 0xa0 0x0e +0x00 0xd8 0xa0 0x2e +0x00 0xe8 0xa0 0x0e + +# CHECK: cmge.8b v0, v0, #0 +# CHECK: cmgt.8b v0, v0, #0 +# CHECK: cmle.8b v0, v0, #0 +# CHECK: cmlt.8b v0, v0, #0 +# CHECK: fcmeq.2s v0, v0, #0 +# CHECK: fcmge.2s v0, v0, #0 +# CHECK: fcmgt.2s v0, v0, #0 +# CHECK: fcmle.2s v0, v0, #0 +# CHECK: fcmlt.2s v0, v0, #0 + +0x00 0x78 0x21 0x0e +0x00 0x78 0x21 0x4e +0x00 0x78 0x61 0x0e +0x00 0x78 0x61 0x4e +0x00 0x68 0x21 0x0e +0x00 0x68 0x21 0x4e +0x00 0x68 0x61 0x0e +0x00 0x68 0x61 0x4e +0x00 0x68 0x61 0x2e +0x00 0x68 0x61 0x6e + +# CHECK: fcvtl v0.4s, v0.4h +# CHECK: fcvtl2 v0.4s, v0.8h +# CHECK: fcvtl v0.2d, v0.2s +# CHECK: fcvtl2 v0.2d, v0.4s +# CHECK: fcvtn v0.4h, v0.4s +# CHECK: fcvtn2 v0.8h, v0.4s +# CHECK: fcvtn v0.2s, v0.2d +# CHECK: fcvtn2 v0.4s, v0.2d +# CHECK: fcvtxn v0.2s, v0.2d +# CHECK: fcvtxn2 v0.4s, v0.2d + +#===-------------------------------------------------------------------------=== +# AdvSIMD modified immediate instructions +#===-------------------------------------------------------------------------=== + +0x20 0x14 0x00 0x2f +0x20 0x34 0x00 0x2f +0x20 0x54 0x00 0x2f +0x20 0x74 0x00 0x2f + +# CHECK: bic.2s v0, #1 +# CHECK: bic.2s v0, #1, lsl #8 +# CHECK: bic.2s v0, #1, lsl #16 +# CHECK: bic.2s v0, #1, lsl #24 + +0x20 0x94 0x00 0x2f +0x20 0x94 0x00 0x2f +0x20 0xb4 0x00 0x2f + +# CHECK: bic.4h v0, #1 +# CHECK: bic.4h v0, #1 +# FIXME: bic.4h v0, #1, lsl #8 +# 'bic.4h' should be selected over "fcvtnu.2s v0, v1, #0" + +0x20 0x14 0x00 0x6f +0x20 0x34 0x00 0x6f +0x20 0x54 0x00 0x6f +0x20 0x74 0x00 0x6f + +# CHECK: bic.4s v0, #1 +# CHECK: bic.4s v0, #1, lsl #8 +# CHECK: bic.4s v0, #1, lsl #16 +# CHECK: bic.4s v0, #1, lsl #24 + +0x20 0x94 0x00 0x6f +0x20 0xb4 0x00 0x6f + +# CHECK: bic.8h v0, #1 +# FIXME: bic.8h v0, #1, lsl #8 +# "bic.8h" should be selected over "fcvtnu.4s v0, v1, #0" + +0x00 0xf4 0x02 0x6f + +# CHECK: fmov.2d v0, #1.250000e-01 + +0x00 0xf4 0x02 0x0f +0x00 0xf4 0x02 0x4f + +# CHECK: fmov.2s v0, #1.250000e-01 +# CHECK: fmov.4s v0, #1.250000e-01 + +0x20 0x14 0x00 0x0f +0x20 0x34 0x00 0x0f +0x20 0x54 0x00 0x0f +0x20 0x74 0x00 0x0f + +# CHECK: orr.2s v0, #1 +# CHECK: orr.2s v0, #1, lsl #8 +# CHECK: orr.2s v0, #1, lsl #16 +# CHECK: orr.2s v0, #1, lsl #24 + +0x20 0x94 0x00 0x0f +0x20 0xb4 0x00 0x0f + +# CHECK: orr.4h v0, #1 +# FIXME: orr.4h v0, #1, lsl #8 +# 'orr.4h' should be selected over "fcvtns.2s v0, v1, #0" + +0x20 0x14 0x00 0x4f +0x20 0x34 0x00 0x4f +0x20 0x54 0x00 0x4f +0x20 0x74 0x00 0x4f + +# CHECK: orr.4s v0, #1 +# CHECK: orr.4s v0, #1, lsl #8 +# CHECK: orr.4s v0, #1, lsl #16 +# CHECK: orr.4s v0, #1, lsl #24 + +0x20 0x94 0x00 0x4f +0x20 0xb4 0x00 0x4f + +# CHECK: orr.8h v0, #1 +# FIXME: orr.8h v0, #1, lsl #8 +# "orr.8h" should be selected over "fcvtns.4s v0, v1, #0" + +0x21 0x70 0x40 0x0c +0x42 0xa0 0x40 0x4c +0x64 0x64 0x40 0x0c +0x87 0x24 0x40 0x4c +0x0c 0xa8 0x40 0x0c +0x0a 0x68 0x40 0x4c +0x2d 0xac 0x40 0x0c +0x4f 0x7c 0x40 0x4c + +# CHECK: ld1.8b { v1 }, [x1] +# CHECK: ld1.16b { v2, v3 }, [x2] +# CHECK: ld1.4h { v4, v5, v6 }, [x3] +# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4] +# CHECK: ld1.2s { v12, v13 }, [x0] +# CHECK: ld1.4s { v10, v11, v12 }, [x0] +# CHECK: ld1.1d { v13, v14 }, [x1] +# CHECK: ld1.2d { v15 }, [x2] + +0x41 0x70 0xdf 0x0c +0x41 0xa0 0xdf 0x0c +0x41 0x60 0xdf 0x0c +0x41 0x20 0xdf 0x0c +0x42 0x70 0xdf 0x4c +0x42 0xa0 0xdf 0x4c +0x42 0x60 0xdf 0x4c +0x42 0x20 0xdf 0x4c +0x64 0x74 0xdf 0x0c +0x64 0xa4 0xdf 0x0c +0x64 0x64 0xdf 0x0c +0x64 0x24 0xdf 0x0c +0x87 0x74 0xdf 0x4c +0x87 0xa4 0xdf 0x4c +0x87 0x64 0xdf 0x4c +0x87 0x24 0xdf 0x4c +0x0c 0x78 0xdf 0x0c +0x0c 0xa8 0xdf 0x0c +0x0c 0x68 0xdf 0x0c +0x0c 0x28 0xdf 0x0c +0x0a 0x78 0xdf 0x4c +0x0a 0xa8 0xdf 0x4c +0x0a 0x68 0xdf 0x4c +0x0a 0x28 0xdf 0x4c +0x2d 0x7c 0xdf 0x0c +0x2d 0xac 0xdf 0x0c +0x2d 0x6c 0xdf 0x0c +0x2d 0x2c 0xdf 0x0c +0x4f 0x7c 0xdf 0x4c +0x4f 0xac 0xdf 0x4c +0x4f 0x6c 0xdf 0x4c +0x4f 0x2c 0xdf 0x4c + +# CHECK: ld1.8b { v1 }, [x2], #8 +# CHECK: ld1.8b { v1, v2 }, [x2], #16 +# CHECK: ld1.8b { v1, v2, v3 }, [x2], #24 +# CHECK: ld1.8b { v1, v2, v3, v4 }, [x2], #32 +# CHECK: ld1.16b { v2 }, [x2], #16 +# CHECK: ld1.16b { v2, v3 }, [x2], #32 +# CHECK: ld1.16b { v2, v3, v4 }, [x2], #48 +# CHECK: ld1.16b { v2, v3, v4, v5 }, [x2], #64 +# CHECK: ld1.4h { v4 }, [x3], #8 +# CHECK: ld1.4h { v4, v5 }, [x3], #16 +# CHECK: ld1.4h { v4, v5, v6 }, [x3], #24 +# CHECK: ld1.4h { v4, v5, v6, v7 }, [x3], #32 +# CHECK: ld1.8h { v7 }, [x4], #16 +# CHECK: ld1.8h { v7, v8 }, [x4], #32 +# CHECK: ld1.8h { v7, v8, v9 }, [x4], #48 +# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4], #64 +# CHECK: ld1.2s { v12 }, [x0], #8 +# CHECK: ld1.2s { v12, v13 }, [x0], #16 +# CHECK: ld1.2s { v12, v13, v14 }, [x0], #24 +# CHECK: ld1.2s { v12, v13, v14, v15 }, [x0], #32 +# CHECK: ld1.4s { v10 }, [x0], #16 +# CHECK: ld1.4s { v10, v11 }, [x0], #32 +# CHECK: ld1.4s { v10, v11, v12 }, [x0], #48 +# CHECK: ld1.4s { v10, v11, v12, v13 }, [x0], #64 +# CHECK: ld1.1d { v13 }, [x1], #8 +# CHECK: ld1.1d { v13, v14 }, [x1], #16 +# CHECK: ld1.1d { v13, v14, v15 }, [x1], #24 +# CHECK: ld1.1d { v13, v14, v15, v16 }, [x1], #32 +# CHECK: ld1.2d { v15 }, [x2], #16 +# CHECK: ld1.2d { v15, v16 }, [x2], #32 +# CHECK: ld1.2d { v15, v16, v17 }, [x2], #48 +# CHECK: ld1.2d { v15, v16, v17, v18 }, [x2], #64 + +0x21 0x70 0x00 0x0c +0x42 0xa0 0x00 0x4c +0x64 0x64 0x00 0x0c +0x87 0x24 0x00 0x4c +0x0c 0xa8 0x00 0x0c +0x0a 0x68 0x00 0x4c +0x2d 0xac 0x00 0x0c +0x4f 0x7c 0x00 0x4c + +# CHECK: st1.8b { v1 }, [x1] +# CHECK: st1.16b { v2, v3 }, [x2] +# CHECK: st1.4h { v4, v5, v6 }, [x3] +# CHECK: st1.8h { v7, v8, v9, v10 }, [x4] +# CHECK: st1.2s { v12, v13 }, [x0] +# CHECK: st1.4s { v10, v11, v12 }, [x0] +# CHECK: st1.1d { v13, v14 }, [x1] +# CHECK: st1.2d { v15 }, [x2] + +0x61 0x08 0x40 0x0d +0x82 0x84 0x40 0x4d +0xa3 0x58 0x40 0x0d +0xc4 0x80 0x40 0x4d + +# CHECK: ld1.b { v1 }[2], [x3] +# CHECK: ld1.d { v2 }[1], [x4] +# CHECK: ld1.h { v3 }[3], [x5] +# CHECK: ld1.s { v4 }[2], [x6] + +0x61 0x08 0xdf 0x0d +0x82 0x84 0xdf 0x4d +0xa3 0x58 0xdf 0x0d +0xc4 0x80 0xdf 0x4d + +# CHECK: ld1.b { v1 }[2], [x3], #1 +# CHECK: ld1.d { v2 }[1], [x4], #8 +# CHECK: ld1.h { v3 }[3], [x5], #2 +# CHECK: ld1.s { v4 }[2], [x6], #4 + +0x61 0x08 0x00 0x0d +0x82 0x84 0x00 0x4d +0xa3 0x58 0x00 0x0d +0xc4 0x80 0x00 0x4d + +# CHECK: st1.b { v1 }[2], [x3] +# CHECK: st1.d { v2 }[1], [x4] +# CHECK: st1.h { v3 }[3], [x5] +# CHECK: st1.s { v4 }[2], [x6] + +0x61 0x08 0x9f 0x0d +0x82 0x84 0x9f 0x4d +0xa3 0x58 0x9f 0x0d +0xc4 0x80 0x9f 0x4d + +# CHECK: st1.b { v1 }[2], [x3], #1 +# CHECK: st1.d { v2 }[1], [x4], #8 +# CHECK: st1.h { v3 }[3], [x5], #2 +# CHECK: st1.s { v4 }[2], [x6], #4 + +0x61 0x08 0xc4 0x0d +0x82 0x84 0xc5 0x4d +0xa3 0x58 0xc6 0x0d +0xc4 0x80 0xc7 0x4d + +# CHECK: ld1.b { v1 }[2], [x3], x4 +# CHECK: ld1.d { v2 }[1], [x4], x5 +# CHECK: ld1.h { v3 }[3], [x5], x6 +# CHECK: ld1.s { v4 }[2], [x6], x7 + +0x61 0x08 0x84 0x0d +0x82 0x84 0x85 0x4d +0xa3 0x58 0x86 0x0d +0xc4 0x80 0x87 0x4d + +# CHECK: st1.b { v1 }[2], [x3], x4 +# CHECK: st1.d { v2 }[1], [x4], x5 +# CHECK: st1.h { v3 }[3], [x5], x6 +# CHECK: st1.s { v4 }[2], [x6], x7 + +0x41 0x70 0xc3 0x0c +0x42 0xa0 0xc4 0x4c +0x64 0x64 0xc5 0x0c +0x87 0x24 0xc6 0x4c +0x0c 0xa8 0xc7 0x0c +0x0a 0x68 0xc8 0x4c +0x2d 0xac 0xc9 0x0c +0x4f 0x7c 0xca 0x4c + +# CHECK: ld1.8b { v1 }, [x2], x3 +# CHECK: ld1.16b { v2, v3 }, [x2], x4 +# CHECK: ld1.4h { v4, v5, v6 }, [x3], x5 +# CHECK: ld1.8h { v7, v8, v9, v10 }, [x4], x6 +# CHECK: ld1.2s { v12, v13 }, [x0], x7 +# CHECK: ld1.4s { v10, v11, v12 }, [x0], x8 +# CHECK: ld1.1d { v13, v14 }, [x1], x9 +# CHECK: ld1.2d { v15 }, [x2], x10 + +0x41 0x70 0x83 0x0c +0x42 0xa0 0x84 0x4c +0x64 0x64 0x85 0x0c +0x87 0x24 0x86 0x4c +0x0c 0xa8 0x87 0x0c +0x0a 0x68 0x88 0x4c +0x2d 0xac 0x89 0x0c +0x4f 0x7c 0x8a 0x4c + +# CHECK: st1.8b { v1 }, [x2], x3 +# CHECK: st1.16b { v2, v3 }, [x2], x4 +# CHECK: st1.4h { v4, v5, v6 }, [x3], x5 +# CHECK: st1.8h { v7, v8, v9, v10 }, [x4], x6 +# CHECK: st1.2s { v12, v13 }, [x0], x7 +# CHECK: st1.4s { v10, v11, v12 }, [x0], x8 +# CHECK: st1.1d { v13, v14 }, [x1], x9 +# CHECK: st1.2d { v15 }, [x2], x10 + +0x41 0x70 0x9f 0x0c +0x41 0xa0 0x9f 0x0c +0x41 0x60 0x9f 0x0c +0x41 0x20 0x9f 0x0c +0x42 0x70 0x9f 0x4c +0x42 0xa0 0x9f 0x4c +0x42 0x60 0x9f 0x4c +0x42 0x20 0x9f 0x4c +0x64 0x74 0x9f 0x0c +0x64 0xa4 0x9f 0x0c +0x64 0x64 0x9f 0x0c +0x64 0x24 0x9f 0x0c +0x87 0x74 0x9f 0x4c +0x87 0xa4 0x9f 0x4c +0x87 0x64 0x9f 0x4c +0x87 0x24 0x9f 0x4c +0x0c 0x78 0x9f 0x0c +0x0c 0xa8 0x9f 0x0c +0x0c 0x68 0x9f 0x0c +0x0c 0x28 0x9f 0x0c +0x0a 0x78 0x9f 0x4c +0x0a 0xa8 0x9f 0x4c +0x0a 0x68 0x9f 0x4c +0x0a 0x28 0x9f 0x4c +0x2d 0x7c 0x9f 0x0c +0x2d 0xac 0x9f 0x0c +0x2d 0x6c 0x9f 0x0c +0x2d 0x2c 0x9f 0x0c +0x4f 0x7c 0x9f 0x4c +0x4f 0xac 0x9f 0x4c +0x4f 0x6c 0x9f 0x4c +0x4f 0x2c 0x9f 0x4c + +# CHECK: st1.8b { v1 }, [x2], #8 +# CHECK: st1.8b { v1, v2 }, [x2], #16 +# CHECK: st1.8b { v1, v2, v3 }, [x2], #24 +# CHECK: st1.8b { v1, v2, v3, v4 }, [x2], #32 +# CHECK: st1.16b { v2 }, [x2], #16 +# CHECK: st1.16b { v2, v3 }, [x2], #32 +# CHECK: st1.16b { v2, v3, v4 }, [x2], #48 +# CHECK: st1.16b { v2, v3, v4, v5 }, [x2], #64 +# CHECK: st1.4h { v4 }, [x3], #8 +# CHECK: st1.4h { v4, v5 }, [x3], #16 +# CHECK: st1.4h { v4, v5, v6 }, [x3], #24 +# CHECK: st1.4h { v4, v5, v6, v7 }, [x3], #32 +# CHECK: st1.8h { v7 }, [x4], #16 +# CHECK: st1.8h { v7, v8 }, [x4], #32 +# CHECK: st1.8h { v7, v8, v9 }, [x4], #48 +# CHECK: st1.8h { v7, v8, v9, v10 }, [x4], #64 +# CHECK: st1.2s { v12 }, [x0], #8 +# CHECK: st1.2s { v12, v13 }, [x0], #16 +# CHECK: st1.2s { v12, v13, v14 }, [x0], #24 +# CHECK: st1.2s { v12, v13, v14, v15 }, [x0], #32 +# CHECK: st1.4s { v10 }, [x0], #16 +# CHECK: st1.4s { v10, v11 }, [x0], #32 +# CHECK: st1.4s { v10, v11, v12 }, [x0], #48 +# CHECK: st1.4s { v10, v11, v12, v13 }, [x0], #64 +# CHECK: st1.1d { v13 }, [x1], #8 +# CHECK: st1.1d { v13, v14 }, [x1], #16 +# CHECK: st1.1d { v13, v14, v15 }, [x1], #24 +# CHECK: st1.1d { v13, v14, v15, v16 }, [x1], #32 +# CHECK: st1.2d { v15 }, [x2], #16 +# CHECK: st1.2d { v15, v16 }, [x2], #32 +# CHECK: st1.2d { v15, v16, v17 }, [x2], #48 +# CHECK: st1.2d { v15, v16, v17, v18 }, [x2], #64 + +0x21 0xc0 0x40 0x0d +0x21 0xc0 0xc2 0x0d +0x64 0xc4 0x40 0x0d +0x64 0xc4 0xc5 0x0d +0xa9 0xc8 0x40 0x0d +0xa9 0xc8 0xc6 0x0d +0xec 0xcc 0x40 0x0d +0xec 0xcc 0xc8 0x0d + +# CHECK: ld1r.8b { v1 }, [x1] +# CHECK: ld1r.8b { v1 }, [x1], x2 +# CHECK: ld1r.4h { v4 }, [x3] +# CHECK: ld1r.4h { v4 }, [x3], x5 +# CHECK: ld1r.2s { v9 }, [x5] +# CHECK: ld1r.2s { v9 }, [x5], x6 +# CHECK: ld1r.1d { v12 }, [x7] +# CHECK: ld1r.1d { v12 }, [x7], x8 + +0x21 0xc0 0xdf 0x0d +0x21 0xc4 0xdf 0x0d +0x21 0xc8 0xdf 0x0d +0x21 0xcc 0xdf 0x0d + +# CHECK: ld1r.8b { v1 }, [x1], #1 +# CHECK: ld1r.4h { v1 }, [x1], #2 +# CHECK: ld1r.2s { v1 }, [x1], #4 +# CHECK: ld1r.1d { v1 }, [x1], #8 + +0x45 0x80 0x40 0x4c +0x0a 0x88 0x40 0x0c + +# CHECK: ld2.16b { v5, v6 }, [x2] +# CHECK: ld2.2s { v10, v11 }, [x0] + +0x45 0x80 0x00 0x4c +0x0a 0x88 0x00 0x0c + +# CHECK: st2.16b { v5, v6 }, [x2] +# CHECK: st2.2s { v10, v11 }, [x0] + +0x61 0x08 0x20 0x0d +0x82 0x84 0x20 0x4d +0xc3 0x50 0x20 0x0d +0xe4 0x90 0x20 0x4d + +# CHECK: st2.b { v1, v2 }[2], [x3] +# CHECK: st2.d { v2, v3 }[1], [x4] +# CHECK: st2.h { v3, v4 }[2], [x6] +# CHECK: st2.s { v4, v5 }[3], [x7] + +0x61 0x08 0xbf 0x0d +0x82 0x84 0xbf 0x4d +0xa3 0x58 0xbf 0x0d +0xc4 0x80 0xbf 0x4d + +# CHECK: st2.b { v1, v2 }[2], [x3], #2 +# CHECK: st2.d { v2, v3 }[1], [x4], #16 +# CHECK: st2.h { v3, v4 }[3], [x5], #4 +# CHECK: st2.s { v4, v5 }[2], [x6], #8 + +0x61 0x08 0x60 0x0d +0x82 0x84 0x60 0x4d +0xc3 0x50 0x60 0x0d +0xe4 0x90 0x60 0x4d + +# CHECK: ld2.b { v1, v2 }[2], [x3] +# CHECK: ld2.d { v2, v3 }[1], [x4] +# CHECK: ld2.h { v3, v4 }[2], [x6] +# CHECK: ld2.s { v4, v5 }[3], [x7] + +0x61 0x08 0xff 0x0d +0x82 0x84 0xff 0x4d +0xa3 0x58 0xff 0x0d +0xc4 0x80 0xff 0x4d + +# CHECK: ld2.b { v1, v2 }[2], [x3], #2 +# CHECK: ld2.d { v2, v3 }[1], [x4], #16 +# CHECK: ld2.h { v3, v4 }[3], [x5], #4 +# CHECK: ld2.s { v4, v5 }[2], [x6], #8 + +0x61 0x08 0xe4 0x0d +0x82 0x84 0xe6 0x4d +0xa3 0x58 0xe8 0x0d +0xc4 0x80 0xea 0x4d + +# CHECK: ld2.b { v1, v2 }[2], [x3], x4 +# CHECK: ld2.d { v2, v3 }[1], [x4], x6 +# CHECK: ld2.h { v3, v4 }[3], [x5], x8 +# CHECK: ld2.s { v4, v5 }[2], [x6], x10 + +0x61 0x08 0xa4 0x0d +0x82 0x84 0xa6 0x4d +0xa3 0x58 0xa8 0x0d +0xc4 0x80 0xaa 0x4d + +# CHECK: st2.b { v1, v2 }[2], [x3], x4 +# CHECK: st2.d { v2, v3 }[1], [x4], x6 +# CHECK: st2.h { v3, v4 }[3], [x5], x8 +# CHECK: st2.s { v4, v5 }[2], [x6], x10 + +0x64 0x84 0xc5 0x0c +0x0c 0x88 0xc7 0x0c + +# CHECK: ld2.4h { v4, v5 }, [x3], x5 +# CHECK: ld2.2s { v12, v13 }, [x0], x7 + +0x00 0x80 0xdf 0x0c +0x00 0x80 0xdf 0x4c +0x00 0x84 0xdf 0x0c +0x00 0x84 0xdf 0x4c +0x00 0x88 0xdf 0x0c +0x00 0x88 0xdf 0x4c +0x00 0x8c 0xdf 0x4c + +# CHECK: ld2.8b { v0, v1 }, [x0], #16 +# CHECK: ld2.16b { v0, v1 }, [x0], #32 +# CHECK: ld2.4h { v0, v1 }, [x0], #16 +# CHECK: ld2.8h { v0, v1 }, [x0], #32 +# CHECK: ld2.2s { v0, v1 }, [x0], #16 +# CHECK: ld2.4s { v0, v1 }, [x0], #32 +# CHECK: ld2.2d { v0, v1 }, [x0], #32 + +0x64 0x84 0x85 0x0c +0x0c 0x88 0x87 0x0c + +# CHECK: st2.4h { v4, v5 }, [x3], x5 +# CHECK: st2.2s { v12, v13 }, [x0], x7 + +0x00 0x80 0x9f 0x0c +0x00 0x80 0x9f 0x4c +0x00 0x84 0x9f 0x0c +0x00 0x84 0x9f 0x4c +0x00 0x88 0x9f 0x0c +0x00 0x88 0x9f 0x4c +0x00 0x8c 0x9f 0x4c + +# CHECK: st2.8b { v0, v1 }, [x0], #16 +# CHECK: st2.16b { v0, v1 }, [x0], #32 +# CHECK: st2.4h { v0, v1 }, [x0], #16 +# CHECK: st2.8h { v0, v1 }, [x0], #32 +# CHECK: st2.2s { v0, v1 }, [x0], #16 +# CHECK: st2.4s { v0, v1 }, [x0], #32 +# CHECK: st2.2d { v0, v1 }, [x0], #32 + +0x21 0xc0 0x60 0x0d +0x21 0xc0 0xe2 0x0d +0x21 0xc0 0x60 0x4d +0x21 0xc0 0xe2 0x4d +0x21 0xc4 0x60 0x0d +0x21 0xc4 0xe2 0x0d +0x21 0xc4 0x60 0x4d +0x21 0xc4 0xe2 0x4d +0x21 0xc8 0x60 0x0d +0x21 0xc8 0xe2 0x0d +0x21 0xcc 0x60 0x4d +0x21 0xcc 0xe2 0x4d +0x21 0xcc 0x60 0x0d +0x21 0xcc 0xe2 0x0d + +# CHECK: ld2r.8b { v1, v2 }, [x1] +# CHECK: ld2r.8b { v1, v2 }, [x1], x2 +# CHECK: ld2r.16b { v1, v2 }, [x1] +# CHECK: ld2r.16b { v1, v2 }, [x1], x2 +# CHECK: ld2r.4h { v1, v2 }, [x1] +# CHECK: ld2r.4h { v1, v2 }, [x1], x2 +# CHECK: ld2r.8h { v1, v2 }, [x1] +# CHECK: ld2r.8h { v1, v2 }, [x1], x2 +# CHECK: ld2r.2s { v1, v2 }, [x1] +# CHECK: ld2r.2s { v1, v2 }, [x1], x2 +# CHECK: ld2r.2d { v1, v2 }, [x1] +# CHECK: ld2r.2d { v1, v2 }, [x1], x2 +# CHECK: ld2r.1d { v1, v2 }, [x1] +# CHECK: ld2r.1d { v1, v2 }, [x1], x2 + +0x21 0xc0 0xff 0x0d +0x21 0xc0 0xff 0x4d +0x21 0xc4 0xff 0x0d +0x21 0xc4 0xff 0x4d +0x21 0xc8 0xff 0x0d +0x21 0xcc 0xff 0x4d +0x21 0xcc 0xff 0x0d + +# CHECK: ld2r.8b { v1, v2 }, [x1], #2 +# CHECK: ld2r.16b { v1, v2 }, [x1], #2 +# CHECK: ld2r.4h { v1, v2 }, [x1], #4 +# CHECK: ld2r.8h { v1, v2 }, [x1], #4 +# CHECK: ld2r.2s { v1, v2 }, [x1], #8 +# CHECK: ld2r.2d { v1, v2 }, [x1], #16 +# CHECK: ld2r.1d { v1, v2 }, [x1], #16 + +0x21 0x40 0x40 0x0c +0x45 0x40 0x40 0x4c +0x0a 0x48 0x40 0x0c + +# CHECK: ld3.8b { v1, v2, v3 }, [x1] +# CHECK: ld3.16b { v5, v6, v7 }, [x2] +# CHECK: ld3.2s { v10, v11, v12 }, [x0] + +0x21 0x40 0x00 0x0c +0x45 0x40 0x00 0x4c +0x0a 0x48 0x00 0x0c + +# CHECK: st3.8b { v1, v2, v3 }, [x1] +# CHECK: st3.16b { v5, v6, v7 }, [x2] +# CHECK: st3.2s { v10, v11, v12 }, [x0] + +0x61 0x28 0xc4 0x0d +0x82 0xa4 0xc5 0x4d +0xa3 0x78 0xc6 0x0d +0xc4 0xa0 0xc7 0x4d + +# CHECK: ld3.b { v1, v2, v3 }[2], [x3], x4 +# CHECK: ld3.d { v2, v3, v4 }[1], [x4], x5 +# CHECK: ld3.h { v3, v4, v5 }[3], [x5], x6 +# CHECK: ld3.s { v4, v5, v6 }[2], [x6], x7 + +0x61 0x28 0x84 0x0d +0x82 0xa4 0x85 0x4d +0xa3 0x78 0x86 0x0d +0xc4 0xa0 0x87 0x4d + +# CHECK: st3.b { v1, v2, v3 }[2], [x3], x4 +# CHECK: st3.d { v2, v3, v4 }[1], [x4], x5 +# CHECK: st3.h { v3, v4, v5 }[3], [x5], x6 +# CHECK: st3.s { v4, v5, v6 }[2], [x6], x7 + +0x61 0x28 0x9f 0x0d +0x82 0xa4 0x9f 0x4d +0xa3 0x78 0x9f 0x0d +0xc4 0xa0 0x9f 0x4d + +# CHECK: st3.b { v1, v2, v3 }[2], [x3], #3 +# CHECK: st3.d { v2, v3, v4 }[1], [x4], #24 +# CHECK: st3.h { v3, v4, v5 }[3], [x5], #6 +# CHECK: st3.s { v4, v5, v6 }[2], [x6], #12 + +0x41 0x40 0xc3 0x0c +0x42 0x40 0xc4 0x4c +0x64 0x44 0xc5 0x0c +0x87 0x44 0xc6 0x4c +0x0c 0x48 0xc7 0x0c +0x0a 0x48 0xc8 0x4c +0x4f 0x4c 0xca 0x4c + +# CHECK: ld3.8b { v1, v2, v3 }, [x2], x3 +# CHECK: ld3.16b { v2, v3, v4 }, [x2], x4 +# CHECK: ld3.4h { v4, v5, v6 }, [x3], x5 +# CHECK: ld3.8h { v7, v8, v9 }, [x4], x6 +# CHECK: ld3.2s { v12, v13, v14 }, [x0], x7 +# CHECK: ld3.4s { v10, v11, v12 }, [x0], x8 +# CHECK: ld3.2d { v15, v16, v17 }, [x2], x10 + +0x00 0x40 0xdf 0x0c +0x00 0x40 0xdf 0x4c +0x00 0x44 0xdf 0x0c +0x00 0x44 0xdf 0x4c +0x00 0x48 0xdf 0x0c +0x00 0x48 0xdf 0x4c +0x00 0x4c 0xdf 0x4c + +# CHECK: ld3.8b { v0, v1, v2 }, [x0], #24 +# CHECK: ld3.16b { v0, v1, v2 }, [x0], #48 +# CHECK: ld3.4h { v0, v1, v2 }, [x0], #24 +# CHECK: ld3.8h { v0, v1, v2 }, [x0], #48 +# CHECK: ld3.2s { v0, v1, v2 }, [x0], #24 +# CHECK: ld3.4s { v0, v1, v2 }, [x0], #48 +# CHECK: ld3.2d { v0, v1, v2 }, [x0], #48 + +0x41 0x40 0x83 0x0c +0x42 0x40 0x84 0x4c +0x64 0x44 0x85 0x0c +0x87 0x44 0x86 0x4c +0x0c 0x48 0x87 0x0c +0x0a 0x48 0x88 0x4c +0x4f 0x4c 0x8a 0x4c + +# CHECK: st3.8b { v1, v2, v3 }, [x2], x3 +# CHECK: st3.16b { v2, v3, v4 }, [x2], x4 +# CHECK: st3.4h { v4, v5, v6 }, [x3], x5 +# CHECK: st3.8h { v7, v8, v9 }, [x4], x6 +# CHECK: st3.2s { v12, v13, v14 }, [x0], x7 +# CHECK: st3.4s { v10, v11, v12 }, [x0], x8 +# CHECK: st3.2d { v15, v16, v17 }, [x2], x10 + +0x00 0x40 0x9f 0x0c +0x00 0x40 0x9f 0x4c +0x00 0x44 0x9f 0x0c +0x00 0x44 0x9f 0x4c +0x00 0x48 0x9f 0x0c +0x00 0x48 0x9f 0x4c +0x00 0x4c 0x9f 0x4c + +# CHECK: st3.8b { v0, v1, v2 }, [x0], #24 +# CHECK: st3.16b { v0, v1, v2 }, [x0], #48 +# CHECK: st3.4h { v0, v1, v2 }, [x0], #24 +# CHECK: st3.8h { v0, v1, v2 }, [x0], #48 +# CHECK: st3.2s { v0, v1, v2 }, [x0], #24 +# CHECK: st3.4s { v0, v1, v2 }, [x0], #48 +# CHECK: st3.2d { v0, v1, v2 }, [x0], #48 + +0x61 0x28 0x40 0x0d +0x82 0xa4 0x40 0x4d +0xc3 0x70 0x40 0x0d +0xe4 0xb0 0x40 0x4d + +# CHECK: ld3.b { v1, v2, v3 }[2], [x3] +# CHECK: ld3.d { v2, v3, v4 }[1], [x4] +# CHECK: ld3.h { v3, v4, v5 }[2], [x6] +# CHECK: ld3.s { v4, v5, v6 }[3], [x7] + +0x61 0x28 0xdf 0x0d +0x82 0xa4 0xdf 0x4d +0xa3 0x78 0xdf 0x0d +0xc4 0xa0 0xdf 0x4d + +# CHECK: ld3.b { v1, v2, v3 }[2], [x3], #3 +# CHECK: ld3.d { v2, v3, v4 }[1], [x4], #24 +# CHECK: ld3.h { v3, v4, v5 }[3], [x5], #6 +# CHECK: ld3.s { v4, v5, v6 }[2], [x6], #12 + +0x61 0x28 0x00 0x0d +0x82 0xa4 0x00 0x4d +0xc3 0x70 0x00 0x0d +0xe4 0xb0 0x00 0x4d + +# CHECK: st3.b { v1, v2, v3 }[2], [x3] +# CHECK: st3.d { v2, v3, v4 }[1], [x4] +# CHECK: st3.h { v3, v4, v5 }[2], [x6] +# CHECK: st3.s { v4, v5, v6 }[3], [x7] + +0x21 0xe0 0x40 0x0d +0x21 0xe0 0xc2 0x0d +0x21 0xe0 0x40 0x4d +0x21 0xe0 0xc2 0x4d +0x21 0xe4 0x40 0x0d +0x21 0xe4 0xc2 0x0d +0x21 0xe4 0x40 0x4d +0x21 0xe4 0xc2 0x4d +0x21 0xe8 0x40 0x0d +0x21 0xe8 0xc2 0x0d +0x21 0xec 0x40 0x4d +0x21 0xec 0xc2 0x4d +0x21 0xec 0x40 0x0d +0x21 0xec 0xc2 0x0d + +# CHECK: ld3r.8b { v1, v2, v3 }, [x1] +# CHECK: ld3r.8b { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.16b { v1, v2, v3 }, [x1] +# CHECK: ld3r.16b { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.4h { v1, v2, v3 }, [x1] +# CHECK: ld3r.4h { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.8h { v1, v2, v3 }, [x1] +# CHECK: ld3r.8h { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.2s { v1, v2, v3 }, [x1] +# CHECK: ld3r.2s { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.2d { v1, v2, v3 }, [x1] +# CHECK: ld3r.2d { v1, v2, v3 }, [x1], x2 +# CHECK: ld3r.1d { v1, v2, v3 }, [x1] +# CHECK: ld3r.1d { v1, v2, v3 }, [x1], x2 + +0x21 0xe0 0xdf 0x0d +0x21 0xe0 0xdf 0x4d +0x21 0xe4 0xdf 0x0d +0x21 0xe4 0xdf 0x4d +0x21 0xe8 0xdf 0x0d +0x21 0xec 0xdf 0x4d +0x21 0xec 0xdf 0x0d + +# CHECK: ld3r.8b { v1, v2, v3 }, [x1], #3 +# CHECK: ld3r.16b { v1, v2, v3 }, [x1], #3 +# CHECK: ld3r.4h { v1, v2, v3 }, [x1], #6 +# CHECK: ld3r.8h { v1, v2, v3 }, [x1], #6 +# CHECK: ld3r.2s { v1, v2, v3 }, [x1], #12 +# CHECK: ld3r.2d { v1, v2, v3 }, [x1], #24 +# CHECK: ld3r.1d { v1, v2, v3 }, [x1], #24 + +0x21 0x00 0x40 0x0c +0x45 0x00 0x40 0x4c +0x0a 0x08 0x40 0x0c + +# CHECK: ld4.8b { v1, v2, v3, v4 }, [x1] +# CHECK: ld4.16b { v5, v6, v7, v8 }, [x2] +# CHECK: ld4.2s { v10, v11, v12, v13 }, [x0] + +0x21 0x00 0x00 0x0c +0x45 0x00 0x00 0x4c +0x0a 0x08 0x00 0x0c + +# CHECK: st4.8b { v1, v2, v3, v4 }, [x1] +# CHECK: st4.16b { v5, v6, v7, v8 }, [x2] +# CHECK: st4.2s { v10, v11, v12, v13 }, [x0] + +0x61 0x28 0xe4 0x0d +0x82 0xa4 0xe5 0x4d +0xa3 0x78 0xe6 0x0d +0xc4 0xa0 0xe7 0x4d + +# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3], x4 +# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4], x5 +# CHECK: ld4.h { v3, v4, v5, v6 }[3], [x5], x6 +# CHECK: ld4.s { v4, v5, v6, v7 }[2], [x6], x7 + +0x61 0x28 0xff 0x0d +0x82 0xa4 0xff 0x4d +0xa3 0x78 0xff 0x0d +0xc4 0xa0 0xff 0x4d + +# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3], #4 +# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4], #32 +# CHECK: ld4.h { v3, v4, v5, v6 }[3], [x5], #8 +# CHECK: ld4.s { v4, v5, v6, v7 }[2], [x6], #16 + +0x61 0x28 0xa4 0x0d +0x82 0xa4 0xa5 0x4d +0xa3 0x78 0xa6 0x0d +0xc4 0xa0 0xa7 0x4d + +# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3], x4 +# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4], x5 +# CHECK: st4.h { v3, v4, v5, v6 }[3], [x5], x6 +# CHECK: st4.s { v4, v5, v6, v7 }[2], [x6], x7 + +0x61 0x28 0xbf 0x0d +0x82 0xa4 0xbf 0x4d +0xa3 0x78 0xbf 0x0d +0xc4 0xa0 0xbf 0x4d + +# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3], #4 +# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4], #32 +# CHECK: st4.h { v3, v4, v5, v6 }[3], [x5], #8 +# CHECK: st4.s { v4, v5, v6, v7 }[2], [x6], #16 + +0x41 0x00 0xc3 0x0c +0x42 0x00 0xc4 0x4c +0x64 0x04 0xc5 0x0c +0x87 0x04 0xc6 0x4c +0x0c 0x08 0xc7 0x0c +0x0a 0x08 0xc8 0x4c +0x4f 0x0c 0xca 0x4c + +# CHECK: ld4.8b { v1, v2, v3, v4 }, [x2], x3 +# CHECK: ld4.16b { v2, v3, v4, v5 }, [x2], x4 +# CHECK: ld4.4h { v4, v5, v6, v7 }, [x3], x5 +# CHECK: ld4.8h { v7, v8, v9, v10 }, [x4], x6 +# CHECK: ld4.2s { v12, v13, v14, v15 }, [x0], x7 +# CHECK: ld4.4s { v10, v11, v12, v13 }, [x0], x8 +# CHECK: ld4.2d { v15, v16, v17, v18 }, [x2], x10 + +0x00 0x00 0xdf 0x0c +0x00 0x00 0xdf 0x4c +0x00 0x04 0xdf 0x0c +0x00 0x04 0xdf 0x4c +0x00 0x08 0xdf 0x0c +0x00 0x08 0xdf 0x4c +0x00 0x0c 0xdf 0x4c + +# CHECK: ld4.8b { v0, v1, v2, v3 }, [x0], #32 +# CHECK: ld4.16b { v0, v1, v2, v3 }, [x0], #64 +# CHECK: ld4.4h { v0, v1, v2, v3 }, [x0], #32 +# CHECK: ld4.8h { v0, v1, v2, v3 }, [x0], #64 +# CHECK: ld4.2s { v0, v1, v2, v3 }, [x0], #32 +# CHECK: ld4.4s { v0, v1, v2, v3 }, [x0], #64 +# CHECK: ld4.2d { v0, v1, v2, v3 }, [x0], #64 + +0x00 0x00 0x9f 0x0c +0x00 0x00 0x9f 0x4c +0x00 0x04 0x9f 0x0c +0x00 0x04 0x9f 0x4c +0x00 0x08 0x9f 0x0c +0x00 0x08 0x9f 0x4c +0x00 0x0c 0x9f 0x4c + +# CHECK: st4.8b { v0, v1, v2, v3 }, [x0], #32 +# CHECK: st4.16b { v0, v1, v2, v3 }, [x0], #64 +# CHECK: st4.4h { v0, v1, v2, v3 }, [x0], #32 +# CHECK: st4.8h { v0, v1, v2, v3 }, [x0], #64 +# CHECK: st4.2s { v0, v1, v2, v3 }, [x0], #32 +# CHECK: st4.4s { v0, v1, v2, v3 }, [x0], #64 +# CHECK: st4.2d { v0, v1, v2, v3 }, [x0], #64 + +0x41 0x00 0x83 0x0c +0x42 0x00 0x84 0x4c +0x64 0x04 0x85 0x0c +0x87 0x04 0x86 0x4c +0x0c 0x08 0x87 0x0c +0x0a 0x08 0x88 0x4c +0x4f 0x0c 0x8a 0x4c + +# CHECK: st4.8b { v1, v2, v3, v4 }, [x2], x3 +# CHECK: st4.16b { v2, v3, v4, v5 }, [x2], x4 +# CHECK: st4.4h { v4, v5, v6, v7 }, [x3], x5 +# CHECK: st4.8h { v7, v8, v9, v10 }, [x4], x6 +# CHECK: st4.2s { v12, v13, v14, v15 }, [x0], x7 +# CHECK: st4.4s { v10, v11, v12, v13 }, [x0], x8 +# CHECK: st4.2d { v15, v16, v17, v18 }, [x2], x10 + +0x61 0x28 0x60 0x0d +0x82 0xa4 0x60 0x4d +0xc3 0x70 0x60 0x0d +0xe4 0xb0 0x60 0x4d + +# CHECK: ld4.b { v1, v2, v3, v4 }[2], [x3] +# CHECK: ld4.d { v2, v3, v4, v5 }[1], [x4] +# CHECK: ld4.h { v3, v4, v5, v6 }[2], [x6] +# CHECK: ld4.s { v4, v5, v6, v7 }[3], [x7] + +0x61 0x28 0x20 0x0d +0x82 0xa4 0x20 0x4d +0xc3 0x70 0x20 0x0d +0xe4 0xb0 0x20 0x4d + +# CHECK: st4.b { v1, v2, v3, v4 }[2], [x3] +# CHECK: st4.d { v2, v3, v4, v5 }[1], [x4] +# CHECK: st4.h { v3, v4, v5, v6 }[2], [x6] +# CHECK: st4.s { v4, v5, v6, v7 }[3], [x7] + +0x21 0xe0 0x60 0x0d +0x21 0xe0 0xe2 0x0d +0x21 0xe0 0x60 0x4d +0x21 0xe0 0xe2 0x4d +0x21 0xe4 0x60 0x0d +0x21 0xe4 0xe2 0x0d +0x21 0xe4 0x60 0x4d +0x21 0xe4 0xe2 0x4d +0x21 0xe8 0x60 0x0d +0x21 0xe8 0xe2 0x0d +0x21 0xec 0x60 0x4d +0x21 0xec 0xe2 0x4d +0x21 0xec 0x60 0x0d +0x21 0xec 0xe2 0x0d + +# CHECK: ld4r.8b { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.8b { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.16b { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.16b { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.4h { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.4h { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.8h { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.8h { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.2s { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.2s { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.2d { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.2d { v1, v2, v3, v4 }, [x1], x2 +# CHECK: ld4r.1d { v1, v2, v3, v4 }, [x1] +# CHECK: ld4r.1d { v1, v2, v3, v4 }, [x1], x2 + +0x21 0xe0 0xff 0x0d +0x21 0xe0 0xff 0x4d +0x21 0xe4 0xff 0x0d +0x21 0xe4 0xff 0x4d +0x21 0xe8 0xff 0x0d +0x21 0xec 0xff 0x4d +0x21 0xec 0xff 0x0d + +# CHECK: ld4r.8b { v1, v2, v3, v4 }, [x1], #4 +# CHECK: ld4r.16b { v1, v2, v3, v4 }, [x1], #4 +# CHECK: ld4r.4h { v1, v2, v3, v4 }, [x1], #8 +# CHECK: ld4r.8h { v1, v2, v3, v4 }, [x1], #8 +# CHECK: ld4r.2s { v1, v2, v3, v4 }, [x1], #16 +# CHECK: ld4r.2d { v1, v2, v3, v4 }, [x1], #32 +# CHECK: ld4r.1d { v1, v2, v3, v4 }, [x1], #32 + +0x20 0xe4 0x00 0x2f +0x20 0xe4 0x00 0x6f +0x20 0xe4 0x00 0x0f +0x20 0xe4 0x00 0x4f + +# CHECK: movi d0, #0x000000000000ff +# CHECK: movi.2d v0, #0x000000000000ff +# CHECK: movi.8b v0, #1 +# CHECK: movi.16b v0, #1 + +0x20 0x04 0x00 0x0f +0x20 0x24 0x00 0x0f +0x20 0x44 0x00 0x0f +0x20 0x64 0x00 0x0f + +# CHECK: movi.2s v0, #1 +# CHECK: movi.2s v0, #1, lsl #8 +# CHECK: movi.2s v0, #1, lsl #16 +# CHECK: movi.2s v0, #1, lsl #24 + +0x20 0x04 0x00 0x4f +0x20 0x24 0x00 0x4f +0x20 0x44 0x00 0x4f +0x20 0x64 0x00 0x4f + +# CHECK: movi.4s v0, #1 +# CHECK: movi.4s v0, #1, lsl #8 +# CHECK: movi.4s v0, #1, lsl #16 +# CHECK: movi.4s v0, #1, lsl #24 + +0x20 0x84 0x00 0x0f +0x20 0xa4 0x00 0x0f + +# CHECK: movi.4h v0, #1 +# CHECK: movi.4h v0, #1, lsl #8 + +0x20 0x84 0x00 0x4f +0x20 0xa4 0x00 0x4f + +# CHECK: movi.8h v0, #1 +# CHECK: movi.8h v0, #1, lsl #8 + +0x20 0x04 0x00 0x2f +0x20 0x24 0x00 0x2f +0x20 0x44 0x00 0x2f +0x20 0x64 0x00 0x2f + +# CHECK: mvni.2s v0, #1 +# CHECK: mvni.2s v0, #1, lsl #8 +# CHECK: mvni.2s v0, #1, lsl #16 +# CHECK: mvni.2s v0, #1, lsl #24 + +0x20 0x04 0x00 0x6f +0x20 0x24 0x00 0x6f +0x20 0x44 0x00 0x6f +0x20 0x64 0x00 0x6f + +# CHECK: mvni.4s v0, #1 +# CHECK: mvni.4s v0, #1, lsl #8 +# CHECK: mvni.4s v0, #1, lsl #16 +# CHECK: mvni.4s v0, #1, lsl #24 + +0x20 0x84 0x00 0x2f +0x20 0xa4 0x00 0x2f + +# CHECK: mvni.4h v0, #1 +# CHECK: mvni.4h v0, #1, lsl #8 + +0x20 0x84 0x00 0x6f +0x20 0xa4 0x00 0x6f + +# CHECK: mvni.8h v0, #1 +# CHECK: mvni.8h v0, #1, lsl #8 + +0x20 0xc4 0x00 0x2f +0x20 0xd4 0x00 0x2f +0x20 0xc4 0x00 0x6f +0x20 0xd4 0x00 0x6f + +# CHECK: mvni.2s v0, #1, msl #8 +# CHECK: mvni.2s v0, #1, msl #16 +# CHECK: mvni.4s v0, #1, msl #8 +# CHECK: mvni.4s v0, #1, msl #16 + +0x00 0x88 0x21 0x2e +0x00 0x98 0x21 0x2e +0x00 0x98 0xa1 0x2e +0x00 0x98 0x21 0x0e +0x00 0x88 0x21 0x0e +0x00 0x88 0xa1 0x0e +0x00 0x98 0xa1 0x0e + +# CHECK: frinta.2s v0, v0 +# CHECK: frintx.2s v0, v0 +# CHECK: frinti.2s v0, v0 +# CHECK: frintm.2s v0, v0 +# CHECK: frintn.2s v0, v0 +# CHECK: frintp.2s v0, v0 +# CHECK: frintz.2s v0, v0 + +#===-------------------------------------------------------------------------=== +# AdvSIMD scalar x index instructions +#===-------------------------------------------------------------------------=== + +0x00 0x18 0xa0 0x5f +0x00 0x18 0xc0 0x5f +0x00 0x58 0xa0 0x5f +0x00 0x58 0xc0 0x5f +0x00 0x98 0xa0 0x7f +0x00 0x98 0xc0 0x7f +0x00 0x98 0xa0 0x5f +0x00 0x98 0xc0 0x5f +0x00 0x38 0x70 0x5f +0x00 0x38 0xa0 0x5f +0x00 0x78 0x70 0x5f +0x00 0xc8 0x70 0x5f +0x00 0xc8 0xa0 0x5f +0x00 0xb8 0x70 0x5f +0x00 0xb8 0xa0 0x5f +0x00 0xd8 0x70 0x5f +0x00 0xd8 0xa0 0x5f + +# CHECK: fmla.s s0, s0, v0[3] +# CHECK: fmla.d d0, d0, v0[1] +# CHECK: fmls.s s0, s0, v0[3] +# CHECK: fmls.d d0, d0, v0[1] +# CHECK: fmulx.s s0, s0, v0[3] +# CHECK: fmulx.d d0, d0, v0[1] +# CHECK: fmul.s s0, s0, v0[3] +# CHECK: fmul.d d0, d0, v0[1] +# CHECK: sqdmlal.h s0, h0, v0[7] +# CHECK: sqdmlal.s d0, s0, v0[3] +# CHECK: sqdmlsl.h s0, h0, v0[7] +# CHECK: sqdmulh.h h0, h0, v0[7] +# CHECK: sqdmulh.s s0, s0, v0[3] +# CHECK: sqdmull.h s0, h0, v0[7] +# CHECK: sqdmull.s d0, s0, v0[3] +# CHECK: sqrdmulh.h h0, h0, v0[7] +# CHECK: sqrdmulh.s s0, s0, v0[3] + +#===-------------------------------------------------------------------------=== +# AdvSIMD vector x index instructions +#===-------------------------------------------------------------------------=== + + 0x00 0x10 0x80 0x0f + 0x00 0x10 0xa0 0x4f + 0x00 0x18 0xc0 0x4f + 0x00 0x50 0x80 0x0f + 0x00 0x50 0xa0 0x4f + 0x00 0x58 0xc0 0x4f + 0x00 0x90 0x80 0x2f + 0x00 0x90 0xa0 0x6f + 0x00 0x98 0xc0 0x6f + 0x00 0x90 0x80 0x0f + 0x00 0x90 0xa0 0x4f + 0x00 0x98 0xc0 0x4f + 0x00 0x00 0x40 0x2f + 0x00 0x00 0x50 0x6f + 0x00 0x08 0x80 0x2f + 0x00 0x08 0xa0 0x6f + 0x00 0x40 0x40 0x2f + 0x00 0x40 0x50 0x6f + 0x00 0x48 0x80 0x2f + 0x00 0x48 0xa0 0x6f + 0x00 0x80 0x40 0x0f + 0x00 0x80 0x50 0x4f + 0x00 0x88 0x80 0x0f + 0x00 0x88 0xa0 0x4f + 0x00 0x20 0x40 0x0f + 0x00 0x20 0x50 0x4f + 0x00 0x28 0x80 0x0f + 0x00 0x28 0xa0 0x4f + 0x00 0x60 0x40 0x0f + 0x00 0x60 0x50 0x4f + 0x00 0x68 0x80 0x0f + 0x00 0x68 0xa0 0x4f + 0x00 0xa0 0x40 0x0f + 0x00 0xa0 0x50 0x4f + 0x00 0xa8 0x80 0x0f + 0x00 0xa8 0xa0 0x4f + 0x00 0x30 0x40 0x0f + 0x00 0x30 0x50 0x4f + 0x00 0x38 0x80 0x0f + 0x00 0x38 0xa0 0x4f + 0x00 0x70 0x40 0x0f + 0x00 0x70 0x50 0x4f + 0x00 0x78 0x80 0x0f + 0x00 0x78 0xa0 0x4f + 0x00 0xc0 0x40 0x0f + 0x00 0xc0 0x50 0x4f + 0x00 0xc8 0x80 0x0f + 0x00 0xc8 0xa0 0x4f + 0x00 0xb0 0x40 0x0f + 0x00 0xb0 0x50 0x4f + 0x00 0xb8 0x80 0x0f + 0x00 0xb8 0xa0 0x4f + 0x00 0xd0 0x40 0x0f + 0x00 0xd0 0x50 0x4f + 0x00 0xd8 0x80 0x0f + 0x00 0xd8 0xa0 0x4f + 0x00 0x20 0x40 0x2f + 0x00 0x20 0x50 0x6f + 0x00 0x28 0x80 0x2f + 0x00 0x28 0xa0 0x6f + 0x00 0x60 0x40 0x2f + 0x00 0x60 0x50 0x6f + 0x00 0x68 0x80 0x2f + 0x00 0x68 0xa0 0x6f + 0x00 0xa0 0x40 0x2f + 0x00 0xa0 0x50 0x6f + 0x00 0xa8 0x80 0x2f + 0x00 0xa8 0xa0 0x6f + +# CHECK: fmla.2s v0, v0, v0[0] +# CHECK: fmla.4s v0, v0, v0[1] +# CHECK: fmla.2d v0, v0, v0[1] +# CHECK: fmls.2s v0, v0, v0[0] +# CHECK: fmls.4s v0, v0, v0[1] +# CHECK: fmls.2d v0, v0, v0[1] +# CHECK: fmulx.2s v0, v0, v0[0] +# CHECK: fmulx.4s v0, v0, v0[1] +# CHECK: fmulx.2d v0, v0, v0[1] +# CHECK: fmul.2s v0, v0, v0[0] +# CHECK: fmul.4s v0, v0, v0[1] +# CHECK: fmul.2d v0, v0, v0[1] +# CHECK: mla.4h v0, v0, v0[0] +# CHECK: mla.8h v0, v0, v0[1] +# CHECK: mla.2s v0, v0, v0[2] +# CHECK: mla.4s v0, v0, v0[3] +# CHECK: mls.4h v0, v0, v0[0] +# CHECK: mls.8h v0, v0, v0[1] +# CHECK: mls.2s v0, v0, v0[2] +# CHECK: mls.4s v0, v0, v0[3] +# CHECK: mul.4h v0, v0, v0[0] +# CHECK: mul.8h v0, v0, v0[1] +# CHECK: mul.2s v0, v0, v0[2] +# CHECK: mul.4s v0, v0, v0[3] +# CHECK: smlal.4s v0, v0, v0[0] +# CHECK: smlal2.4s v0, v0, v0[1] +# CHECK: smlal.2d v0, v0, v0[2] +# CHECK: smlal2.2d v0, v0, v0[3] +# CHECK: smlsl.4s v0, v0, v0[0] +# CHECK: smlsl2.4s v0, v0, v0[1] +# CHECK: smlsl.2d v0, v0, v0[2] +# CHECK: smlsl2.2d v0, v0, v0[3] +# CHECK: smull.4s v0, v0, v0[0] +# CHECK: smull2.4s v0, v0, v0[1] +# CHECK: smull.2d v0, v0, v0[2] +# CHECK: smull2.2d v0, v0, v0[3] +# CHECK: sqdmlal.4s v0, v0, v0[0] +# CHECK: sqdmlal2.4s v0, v0, v0[1] +# CHECK: sqdmlal.2d v0, v0, v0[2] +# CHECK: sqdmlal2.2d v0, v0, v0[3] +# CHECK: sqdmlsl.4s v0, v0, v0[0] +# CHECK: sqdmlsl2.4s v0, v0, v0[1] +# CHECK: sqdmlsl.2d v0, v0, v0[2] +# CHECK: sqdmlsl2.2d v0, v0, v0[3] +# CHECK: sqdmulh.4h v0, v0, v0[0] +# CHECK: sqdmulh.8h v0, v0, v0[1] +# CHECK: sqdmulh.2s v0, v0, v0[2] +# CHECK: sqdmulh.4s v0, v0, v0[3] +# CHECK: sqdmull.4s v0, v0, v0[0] +# CHECK: sqdmull2.4s v0, v0, v0[1] +# CHECK: sqdmull.2d v0, v0, v0[2] +# CHECK: sqdmull2.2d v0, v0, v0[3] +# CHECK: sqrdmulh.4h v0, v0, v0[0] +# CHECK: sqrdmulh.8h v0, v0, v0[1] +# CHECK: sqrdmulh.2s v0, v0, v0[2] +# CHECK: sqrdmulh.4s v0, v0, v0[3] +# CHECK: umlal.4s v0, v0, v0[0] +# CHECK: umlal2.4s v0, v0, v0[1] +# CHECK: umlal.2d v0, v0, v0[2] +# CHECK: umlal2.2d v0, v0, v0[3] +# CHECK: umlsl.4s v0, v0, v0[0] +# CHECK: umlsl2.4s v0, v0, v0[1] +# CHECK: umlsl.2d v0, v0, v0[2] +# CHECK: umlsl2.2d v0, v0, v0[3] +# CHECK: umull.4s v0, v0, v0[0] +# CHECK: umull2.4s v0, v0, v0[1] +# CHECK: umull.2d v0, v0, v0[2] +# CHECK: umull2.2d v0, v0, v0[3] + + +#===-------------------------------------------------------------------------=== +# AdvSIMD scalar + shift instructions +#===-------------------------------------------------------------------------=== + + 0x00 0x54 0x41 0x5f + 0x00 0x54 0x41 0x7f + 0x00 0x9c 0x09 0x5f + 0x00 0x9c 0x12 0x5f + 0x00 0x9c 0x23 0x5f + 0x00 0x8c 0x09 0x7f + 0x00 0x8c 0x12 0x7f + 0x00 0x8c 0x23 0x7f + 0x00 0x64 0x09 0x7f + 0x00 0x64 0x12 0x7f + 0x00 0x64 0x23 0x7f + 0x00 0x64 0x44 0x7f + 0x00 0x74 0x09 0x5f + 0x00 0x74 0x12 0x5f + 0x00 0x74 0x23 0x5f + 0x00 0x74 0x44 0x5f + 0x00 0x94 0x09 0x5f + 0x00 0x94 0x12 0x5f + 0x00 0x94 0x23 0x5f + 0x00 0x84 0x09 0x7f + 0x00 0x84 0x12 0x7f + 0x00 0x84 0x23 0x7f + 0x00 0x44 0x41 0x7f + 0x00 0x24 0x41 0x5f + 0x00 0x34 0x41 0x5f + 0x00 0x04 0x41 0x5f + 0x00 0xe4 0x21 0x7f + 0x00 0xe4 0x42 0x7f + 0x00 0x9c 0x09 0x7f + 0x00 0x9c 0x12 0x7f + 0x00 0x9c 0x23 0x7f + 0x00 0x74 0x09 0x7f + 0x00 0x74 0x12 0x7f + 0x00 0x74 0x23 0x7f + 0x00 0x74 0x44 0x7f + 0x00 0x94 0x09 0x7f + 0x00 0x94 0x12 0x7f + 0x00 0x94 0x23 0x7f + 0x00 0x24 0x41 0x7f + 0x00 0x34 0x41 0x7f + 0x00 0x04 0x41 0x7f + 0x00 0x14 0x41 0x7f + +# CHECK: shl d0, d0, #1 +# CHECK: sli d0, d0, #1 +# CHECK: sqrshrn b0, h0, #7 +# CHECK: sqrshrn h0, s0, #14 +# CHECK: sqrshrn s0, d0, #29 +# CHECK: sqrshrun b0, h0, #7 +# CHECK: sqrshrun h0, s0, #14 +# CHECK: sqrshrun s0, d0, #29 +# CHECK: sqshlu b0, b0, #1 +# CHECK: sqshlu h0, h0, #2 +# CHECK: sqshlu s0, s0, #3 +# CHECK: sqshlu d0, d0, #4 +# CHECK: sqshl b0, b0, #1 +# CHECK: sqshl h0, h0, #2 +# CHECK: sqshl s0, s0, #3 +# CHECK: sqshl d0, d0, #4 +# CHECK: sqshrn b0, h0, #7 +# CHECK: sqshrn h0, s0, #14 +# CHECK: sqshrn s0, d0, #29 +# CHECK: sqshrun b0, h0, #7 +# CHECK: sqshrun h0, s0, #14 +# CHECK: sqshrun s0, d0, #29 +# CHECK: sri d0, d0, #63 +# CHECK: srshr d0, d0, #63 +# CHECK: srsra d0, d0, #63 +# CHECK: sshr d0, d0, #63 +# CHECK: ucvtf s0, s0, #31 +# CHECK: ucvtf d0, d0, #62 +# CHECK: uqrshrn b0, h0, #7 +# CHECK: uqrshrn h0, s0, #14 +# CHECK: uqrshrn s0, d0, #29 +# CHECK: uqshl b0, b0, #1 +# CHECK: uqshl h0, h0, #2 +# CHECK: uqshl s0, s0, #3 +# CHECK: uqshl d0, d0, #4 +# CHECK: uqshrn b0, h0, #7 +# CHECK: uqshrn h0, s0, #14 +# CHECK: uqshrn s0, d0, #29 +# CHECK: urshr d0, d0, #63 +# CHECK: ursra d0, d0, #63 +# CHECK: ushr d0, d0, #63 +# CHECK: usra d0, d0, #63 + +#===-------------------------------------------------------------------------=== +# AdvSIMD vector + shift instructions +#===-------------------------------------------------------------------------=== + + 0x00 0xfc 0x21 0x0f + 0x00 0xfc 0x22 0x4f + 0x00 0xfc 0x43 0x4f + 0x00 0xfc 0x21 0x2f + 0x00 0xfc 0x22 0x6f + 0x00 0xfc 0x43 0x6f + 0x00 0x8c 0x09 0x0f + 0x00 0x8c 0x0a 0x4f + 0x00 0x8c 0x13 0x0f + 0x00 0x8c 0x14 0x4f + 0x00 0x8c 0x25 0x0f + 0x00 0x8c 0x26 0x4f + 0x00 0xe4 0x21 0x0f + 0x00 0xe4 0x22 0x4f + 0x00 0xe4 0x43 0x4f + 0x00 0x54 0x09 0x0f + 0x00 0x54 0x0a 0x4f + 0x00 0x54 0x13 0x0f + 0x00 0x54 0x14 0x4f + 0x00 0x54 0x25 0x0f + 0x00 0x54 0x26 0x4f + 0x00 0x54 0x47 0x4f + 0x00 0x84 0x09 0x0f + 0x00 0x84 0x0a 0x4f + 0x00 0x84 0x13 0x0f + 0x00 0x84 0x14 0x4f + 0x00 0x84 0x25 0x0f + 0x00 0x84 0x26 0x4f + 0x00 0x54 0x09 0x2f + 0x00 0x54 0x0a 0x6f + 0x00 0x54 0x13 0x2f + 0x00 0x54 0x14 0x6f + 0x00 0x54 0x25 0x2f + 0x00 0x54 0x26 0x6f + 0x00 0x54 0x47 0x6f + 0x00 0x9c 0x09 0x0f + 0x00 0x9c 0x0a 0x4f + 0x00 0x9c 0x13 0x0f + 0x00 0x9c 0x14 0x4f + 0x00 0x9c 0x25 0x0f + 0x00 0x9c 0x26 0x4f + 0x00 0x8c 0x09 0x2f + 0x00 0x8c 0x0a 0x6f + 0x00 0x8c 0x13 0x2f + 0x00 0x8c 0x14 0x6f + 0x00 0x8c 0x25 0x2f + 0x00 0x8c 0x26 0x6f + 0x00 0x64 0x09 0x2f + 0x00 0x64 0x0a 0x6f + 0x00 0x64 0x13 0x2f + 0x00 0x64 0x14 0x6f + 0x00 0x64 0x25 0x2f + 0x00 0x64 0x26 0x6f + 0x00 0x64 0x47 0x6f + 0x00 0x74 0x09 0x0f + 0x00 0x74 0x0a 0x4f + 0x00 0x74 0x13 0x0f + 0x00 0x74 0x14 0x4f + 0x00 0x74 0x25 0x0f + 0x00 0x74 0x26 0x4f + 0x00 0x74 0x47 0x4f + 0x00 0x94 0x09 0x0f + 0x00 0x94 0x0a 0x4f + 0x00 0x94 0x13 0x0f + 0x00 0x94 0x14 0x4f + 0x00 0x94 0x25 0x0f + 0x00 0x94 0x26 0x4f + 0x00 0x84 0x09 0x2f + 0x00 0x84 0x0a 0x6f + 0x00 0x84 0x13 0x2f + 0x00 0x84 0x14 0x6f + 0x00 0x84 0x25 0x2f + 0x00 0x84 0x26 0x6f + 0x00 0x44 0x09 0x2f + 0x00 0x44 0x0a 0x6f + 0x00 0x44 0x13 0x2f + 0x00 0x44 0x14 0x6f + 0x00 0x44 0x25 0x2f + 0x00 0x44 0x26 0x6f + 0x00 0x44 0x47 0x6f + 0x00 0x24 0x09 0x0f + 0x00 0x24 0x0a 0x4f + 0x00 0x24 0x13 0x0f + 0x00 0x24 0x14 0x4f + 0x00 0x24 0x25 0x0f + 0x00 0x24 0x26 0x4f + 0x00 0x24 0x47 0x4f + 0x00 0x34 0x09 0x0f + 0x00 0x34 0x0a 0x4f + 0x00 0x34 0x13 0x0f + 0x00 0x34 0x14 0x4f + 0x00 0x34 0x25 0x0f + 0x00 0x34 0x26 0x4f + 0x00 0x34 0x47 0x4f + 0x00 0xa4 0x09 0x0f + 0x00 0xa4 0x0a 0x4f + 0x00 0xa4 0x13 0x0f + 0x00 0xa4 0x14 0x4f + 0x00 0xa4 0x25 0x0f + 0x00 0xa4 0x26 0x4f + 0x00 0x04 0x09 0x0f + 0x00 0x04 0x0a 0x4f + 0x00 0x04 0x13 0x0f + 0x00 0x04 0x14 0x4f + 0x00 0x04 0x25 0x0f + 0x00 0x04 0x26 0x4f + 0x00 0x04 0x47 0x4f + 0x00 0x04 0x09 0x0f + 0x00 0x14 0x0a 0x4f + 0x00 0x14 0x13 0x0f + 0x00 0x14 0x14 0x4f + 0x00 0x14 0x25 0x0f + 0x00 0x14 0x26 0x4f + 0x00 0x14 0x47 0x4f + 0x00 0x14 0x40 0x5f + 0x00 0xe4 0x21 0x2f + 0x00 0xe4 0x22 0x6f + 0x00 0xe4 0x43 0x6f + 0x00 0x9c 0x09 0x2f + 0x00 0x9c 0x0a 0x6f + 0x00 0x9c 0x13 0x2f + 0x00 0x9c 0x14 0x6f + 0x00 0x9c 0x25 0x2f + 0x00 0x9c 0x26 0x6f + 0x00 0x74 0x09 0x2f + 0x00 0x74 0x0a 0x6f + 0x00 0x74 0x13 0x2f + 0x00 0x74 0x14 0x6f + 0x00 0x74 0x25 0x2f + 0x00 0x74 0x26 0x6f + 0x00 0x74 0x47 0x6f + 0x00 0x94 0x09 0x2f + 0x00 0x94 0x0a 0x6f + 0x00 0x94 0x13 0x2f + 0x00 0x94 0x14 0x6f + 0x00 0x94 0x25 0x2f + 0x00 0x94 0x26 0x6f + 0x00 0x24 0x09 0x2f + 0x00 0x24 0x0a 0x6f + 0x00 0x24 0x13 0x2f + 0x00 0x24 0x14 0x6f + 0x00 0x24 0x25 0x2f + 0x00 0x24 0x26 0x6f + 0x00 0x24 0x47 0x6f + 0x00 0x34 0x09 0x2f + 0x00 0x34 0x0a 0x6f + 0x00 0x34 0x13 0x2f + 0x00 0x34 0x14 0x6f + 0x00 0x34 0x25 0x2f + 0x00 0x34 0x26 0x6f + 0x00 0x34 0x47 0x6f + 0x00 0xa4 0x09 0x2f + 0x00 0xa4 0x0a 0x6f + 0x00 0xa4 0x13 0x2f + 0x00 0xa4 0x14 0x6f + 0x00 0xa4 0x25 0x2f + 0x00 0xa4 0x26 0x6f + 0x00 0x04 0x09 0x2f + 0x00 0x04 0x0a 0x6f + 0x00 0x04 0x13 0x2f + 0x00 0x04 0x14 0x6f + 0x00 0x04 0x25 0x2f + 0x00 0x04 0x26 0x6f + 0x00 0x04 0x47 0x6f + 0x00 0x14 0x09 0x2f + 0x00 0x14 0x0a 0x6f + 0x00 0x14 0x13 0x2f + 0x00 0x14 0x14 0x6f + 0x00 0x14 0x25 0x2f + 0x00 0x14 0x26 0x6f + 0x00 0x14 0x47 0x6f + +# CHECK: fcvtzs.2s v0, v0, #31 +# CHECK: fcvtzs.4s v0, v0, #30 +# CHECK: fcvtzs.2d v0, v0, #61 +# CHECK: fcvtzu.2s v0, v0, #31 +# CHECK: fcvtzu.4s v0, v0, #30 +# CHECK: fcvtzu.2d v0, v0, #61 +# CHECK: rshrn.8b v0, v0, #7 +# CHECK: rshrn2.16b v0, v0, #6 +# CHECK: rshrn.4h v0, v0, #13 +# CHECK: rshrn2.8h v0, v0, #12 +# CHECK: rshrn.2s v0, v0, #27 +# CHECK: rshrn2.4s v0, v0, #26 +# CHECK: scvtf.2s v0, v0, #31 +# CHECK: scvtf.4s v0, v0, #30 +# CHECK: scvtf.2d v0, v0, #61 +# CHECK: shl.8b v0, v0, #1 +# CHECK: shl.16b v0, v0, #2 +# CHECK: shl.4h v0, v0, #3 +# CHECK: shl.8h v0, v0, #4 +# CHECK: shl.2s v0, v0, #5 +# CHECK: shl.4s v0, v0, #6 +# CHECK: shl.2d v0, v0, #7 +# CHECK: shrn.8b v0, v0, #7 +# CHECK: shrn2.16b v0, v0, #6 +# CHECK: shrn.4h v0, v0, #13 +# CHECK: shrn2.8h v0, v0, #12 +# CHECK: shrn.2s v0, v0, #27 +# CHECK: shrn2.4s v0, v0, #26 +# CHECK: sli.8b v0, v0, #1 +# CHECK: sli.16b v0, v0, #2 +# CHECK: sli.4h v0, v0, #3 +# CHECK: sli.8h v0, v0, #4 +# CHECK: sli.2s v0, v0, #5 +# CHECK: sli.4s v0, v0, #6 +# CHECK: sli.2d v0, v0, #7 +# CHECK: sqrshrn.8b v0, v0, #7 +# CHECK: sqrshrn2.16b v0, v0, #6 +# CHECK: sqrshrn.4h v0, v0, #13 +# CHECK: sqrshrn2.8h v0, v0, #12 +# CHECK: sqrshrn.2s v0, v0, #27 +# CHECK: sqrshrn2.4s v0, v0, #26 +# CHECK: sqrshrun.8b v0, v0, #7 +# CHECK: sqrshrun2.16b v0, v0, #6 +# CHECK: sqrshrun.4h v0, v0, #13 +# CHECK: sqrshrun2.8h v0, v0, #12 +# CHECK: sqrshrun.2s v0, v0, #27 +# CHECK: sqrshrun2.4s v0, v0, #26 +# CHECK: sqshlu.8b v0, v0, #1 +# CHECK: sqshlu.16b v0, v0, #2 +# CHECK: sqshlu.4h v0, v0, #3 +# CHECK: sqshlu.8h v0, v0, #4 +# CHECK: sqshlu.2s v0, v0, #5 +# CHECK: sqshlu.4s v0, v0, #6 +# CHECK: sqshlu.2d v0, v0, #7 +# CHECK: sqshl.8b v0, v0, #1 +# CHECK: sqshl.16b v0, v0, #2 +# CHECK: sqshl.4h v0, v0, #3 +# CHECK: sqshl.8h v0, v0, #4 +# CHECK: sqshl.2s v0, v0, #5 +# CHECK: sqshl.4s v0, v0, #6 +# CHECK: sqshl.2d v0, v0, #7 +# CHECK: sqshrn.8b v0, v0, #7 +# CHECK: sqshrn2.16b v0, v0, #6 +# CHECK: sqshrn.4h v0, v0, #13 +# CHECK: sqshrn2.8h v0, v0, #12 +# CHECK: sqshrn.2s v0, v0, #27 +# CHECK: sqshrn2.4s v0, v0, #26 +# CHECK: sqshrun.8b v0, v0, #7 +# CHECK: sqshrun2.16b v0, v0, #6 +# CHECK: sqshrun.4h v0, v0, #13 +# CHECK: sqshrun2.8h v0, v0, #12 +# CHECK: sqshrun.2s v0, v0, #27 +# CHECK: sqshrun2.4s v0, v0, #26 +# CHECK: sri.8b v0, v0, #7 +# CHECK: sri.16b v0, v0, #6 +# CHECK: sri.4h v0, v0, #13 +# CHECK: sri.8h v0, v0, #12 +# CHECK: sri.2s v0, v0, #27 +# CHECK: sri.4s v0, v0, #26 +# CHECK: sri.2d v0, v0, #57 +# CHECK: srshr.8b v0, v0, #7 +# CHECK: srshr.16b v0, v0, #6 +# CHECK: srshr.4h v0, v0, #13 +# CHECK: srshr.8h v0, v0, #12 +# CHECK: srshr.2s v0, v0, #27 +# CHECK: srshr.4s v0, v0, #26 +# CHECK: srshr.2d v0, v0, #57 +# CHECK: srsra.8b v0, v0, #7 +# CHECK: srsra.16b v0, v0, #6 +# CHECK: srsra.4h v0, v0, #13 +# CHECK: srsra.8h v0, v0, #12 +# CHECK: srsra.2s v0, v0, #27 +# CHECK: srsra.4s v0, v0, #26 +# CHECK: srsra.2d v0, v0, #57 +# CHECK: sshll.8h v0, v0, #1 +# CHECK: sshll2.8h v0, v0, #2 +# CHECK: sshll.4s v0, v0, #3 +# CHECK: sshll2.4s v0, v0, #4 +# CHECK: sshll.2d v0, v0, #5 +# CHECK: sshll2.2d v0, v0, #6 +# CHECK: sshr.8b v0, v0, #7 +# CHECK: sshr.16b v0, v0, #6 +# CHECK: sshr.4h v0, v0, #13 +# CHECK: sshr.8h v0, v0, #12 +# CHECK: sshr.2s v0, v0, #27 +# CHECK: sshr.4s v0, v0, #26 +# CHECK: sshr.2d v0, v0, #57 +# CHECK: sshr.8b v0, v0, #7 +# CHECK: ssra.16b v0, v0, #6 +# CHECK: ssra.4h v0, v0, #13 +# CHECK: ssra.8h v0, v0, #12 +# CHECK: ssra.2s v0, v0, #27 +# CHECK: ssra.4s v0, v0, #26 +# CHECK: ssra.2d v0, v0, #57 +# CHECK: ssra d0, d0, #64 +# CHECK: ucvtf.2s v0, v0, #31 +# CHECK: ucvtf.4s v0, v0, #30 +# CHECK: ucvtf.2d v0, v0, #61 +# CHECK: uqrshrn.8b v0, v0, #7 +# CHECK: uqrshrn2.16b v0, v0, #6 +# CHECK: uqrshrn.4h v0, v0, #13 +# CHECK: uqrshrn2.8h v0, v0, #12 +# CHECK: uqrshrn.2s v0, v0, #27 +# CHECK: uqrshrn2.4s v0, v0, #26 +# CHECK: uqshl.8b v0, v0, #1 +# CHECK: uqshl.16b v0, v0, #2 +# CHECK: uqshl.4h v0, v0, #3 +# CHECK: uqshl.8h v0, v0, #4 +# CHECK: uqshl.2s v0, v0, #5 +# CHECK: uqshl.4s v0, v0, #6 +# CHECK: uqshl.2d v0, v0, #7 +# CHECK: uqshrn.8b v0, v0, #7 +# CHECK: uqshrn2.16b v0, v0, #6 +# CHECK: uqshrn.4h v0, v0, #13 +# CHECK: uqshrn2.8h v0, v0, #12 +# CHECK: uqshrn.2s v0, v0, #27 +# CHECK: uqshrn2.4s v0, v0, #26 +# CHECK: urshr.8b v0, v0, #7 +# CHECK: urshr.16b v0, v0, #6 +# CHECK: urshr.4h v0, v0, #13 +# CHECK: urshr.8h v0, v0, #12 +# CHECK: urshr.2s v0, v0, #27 +# CHECK: urshr.4s v0, v0, #26 +# CHECK: urshr.2d v0, v0, #57 +# CHECK: ursra.8b v0, v0, #7 +# CHECK: ursra.16b v0, v0, #6 +# CHECK: ursra.4h v0, v0, #13 +# CHECK: ursra.8h v0, v0, #12 +# CHECK: ursra.2s v0, v0, #27 +# CHECK: ursra.4s v0, v0, #26 +# CHECK: ursra.2d v0, v0, #57 +# CHECK: ushll.8h v0, v0, #1 +# CHECK: ushll2.8h v0, v0, #2 +# CHECK: ushll.4s v0, v0, #3 +# CHECK: ushll2.4s v0, v0, #4 +# CHECK: ushll.2d v0, v0, #5 +# CHECK: ushll2.2d v0, v0, #6 +# CHECK: ushr.8b v0, v0, #7 +# CHECK: ushr.16b v0, v0, #6 +# CHECK: ushr.4h v0, v0, #13 +# CHECK: ushr.8h v0, v0, #12 +# CHECK: ushr.2s v0, v0, #27 +# CHECK: ushr.4s v0, v0, #26 +# CHECK: ushr.2d v0, v0, #57 +# CHECK: usra.8b v0, v0, #7 +# CHECK: usra.16b v0, v0, #6 +# CHECK: usra.4h v0, v0, #13 +# CHECK: usra.8h v0, v0, #12 +# CHECK: usra.2s v0, v0, #27 +# CHECK: usra.4s v0, v0, #26 +# CHECK: usra.2d v0, v0, #57 + + + 0x00 0xe0 0x20 0x0e + 0x00 0xe0 0x20 0x4e + 0x00 0xe0 0xe0 0x0e + 0x00 0xe0 0xe0 0x4e + +# CHECK: pmull.8h v0, v0, v0 +# CHECK: pmull2.8h v0, v0, v0 +# CHECK: pmull.1q v0, v0, v0 +# CHECK: pmull2.1q v0, v0, v0 + + 0x41 0xd8 0x70 0x7e + 0x83 0xd8 0x30 0x7e +# CHECK: faddp.2d d1, v2 +# CHECK: faddp.2s s3, v4 + + 0x82 0x60 0x01 0x4e + 0x80 0x60 0x01 0x0e + 0xa2 0x00 0x01 0x4e + 0xa0 0x00 0x01 0x0e + 0xa2 0x40 0x01 0x4e + 0xa0 0x40 0x01 0x0e + 0xc2 0x20 0x01 0x4e + 0xc0 0x20 0x01 0x0e + +# CHECK: tbl.16b v2, { v4, v5, v6, v7 }, v1 +# CHECK: tbl.8b v0, { v4, v5, v6, v7 }, v1 +# CHECK: tbl.16b v2, { v5 }, v1 +# CHECK: tbl.8b v0, { v5 }, v1 +# CHECK: tbl.16b v2, { v5, v6, v7 }, v1 +# CHECK: tbl.8b v0, { v5, v6, v7 }, v1 +# CHECK: tbl.16b v2, { v6, v7 }, v1 +# CHECK: tbl.8b v0, { v6, v7 }, v1 +# + 0x82 0x70 0x01 0x4e + 0x80 0x70 0x01 0x0e + 0xa2 0x10 0x01 0x4e + 0xa0 0x10 0x01 0x0e + 0xa2 0x50 0x01 0x4e + 0xa0 0x50 0x01 0x0e + 0xc2 0x30 0x01 0x4e + 0xc0 0x30 0x01 0x0e + +# CHECK: tbx.16b v2, { v4, v5, v6, v7 }, v1 +# CHECK: tbx.8b v0, { v4, v5, v6, v7 }, v1 +# CHECK: tbx.16b v2, { v5 }, v1 +# CHECK: tbx.8b v0, { v5 }, v1 +# CHECK: tbx.16b v2, { v5, v6, v7 }, v1 +# CHECK: tbx.8b v0, { v5, v6, v7 }, v1 +# CHECK: tbx.16b v2, { v6, v7 }, v1 +# CHECK: tbx.8b v0, { v6, v7 }, v1 +# + +0x00 0x80 0x20 0x0e +0x00 0x80 0x20 0x4e +0x00 0x80 0xa0 0x0e +0x00 0x80 0xa0 0x4e + +# CHECK: smlal.8h v0, v0, v0 +# CHECK: smlal2.8h v0, v0, v0 +# CHECK: smlal.2d v0, v0, v0 +# CHECK: smlal2.2d v0, v0, v0 + +0x00 0x80 0x20 0x2e +0x00 0x80 0x20 0x6e +0x00 0x80 0xa0 0x2e +0x00 0x80 0xa0 0x6e + +# CHECK: umlal.8h v0, v0, v0 +# CHECK: umlal2.8h v0, v0, v0 +# CHECK: umlal.2d v0, v0, v0 +# CHECK: umlal2.2d v0, v0, v0 + +0x00 0x90 0x60 0x5e +0x00 0x90 0xa0 0x5e +0x00 0xb0 0x60 0x5e +0x00 0xb0 0xa0 0x5e + +# CHECK: sqdmlal s0, h0, h0 +# CHECK: sqdmlal d0, s0, s0 +# CHECK: sqdmlsl s0, h0, h0 +# CHECK: sqdmlsl d0, s0, s0 + +0xaa 0xc5 0xc7 0x4d +0xaa 0xc9 0xc7 0x4d +0xaa 0xc1 0xc7 0x4d + +# CHECK: ld1r.8h { v10 }, [x13], x7 +# CHECK: ld1r.4s { v10 }, [x13], x7 +# CHECK: ld1r.16b { v10 }, [x13], x7 + +0x00 0xd0 0x60 0x5e +0x00 0xd0 0xa0 0x5e +# CHECK: sqdmull s0, h0, h0 +# CHECK: sqdmull d0, s0, s0 + +0x00 0xd8 0xa1 0x7e +0x00 0xd8 0xe1 0x7e + +# CHECK: frsqrte s0, s0 +# CHECK: frsqrte d0, d0 + +0xca 0xcd 0xc7 0x4d +0xea 0xc9 0xe7 0x4d +0xea 0xe9 0xc7 0x4d +0xea 0xe9 0xe7 0x4d +# CHECK: ld1r.2d { v10 }, [x14], x7 +# CHECK: ld2r.4s { v10, v11 }, [x15], x7 +# CHECK: ld3r.4s { v10, v11, v12 }, [x15], x7 +# CHECK: ld4r.4s { v10, v11, v12, v13 }, [x15], x7 + +#===-------------------------------------------------------------------------=== +# AdvSIMD scalar three same +#===-------------------------------------------------------------------------=== +0x62 0xdc 0x21 0x5e +# CHECK: fmulx s2, s3, s1 +0x62 0xdc 0x61 0x5e +# CHECK: fmulx d2, d3, d1 + + +# rdar://12511369 +0xe8 0x6b 0xdf 0x4c +# CHECK: ld1.4s { v8, v9, v10 }, [sp], #48 diff --git a/test/MC/Disassembler/ARM64/arithmetic.txt b/test/MC/Disassembler/ARM64/arithmetic.txt new file mode 100644 index 0000000000..3981219ff3 --- /dev/null +++ b/test/MC/Disassembler/ARM64/arithmetic.txt @@ -0,0 +1,522 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#==---------------------------------------------------------------------------== +# Add/Subtract with carry/borrow +#==---------------------------------------------------------------------------== + +0x41 0x00 0x03 0x1a +0x41 0x00 0x03 0x9a +0x85 0x00 0x03 0x3a +0x85 0x00 0x03 0xba + +# CHECK: adc w1, w2, w3 +# CHECK: adc x1, x2, x3 +# CHECK: adcs w5, w4, w3 +# CHECK: adcs x5, x4, x3 + +0x41 0x00 0x03 0x5a +0x41 0x00 0x03 0xda +0x41 0x00 0x03 0x7a +0x41 0x00 0x03 0xfa + +# CHECK: sbc w1, w2, w3 +# CHECK: sbc x1, x2, x3 +# CHECK: sbcs w1, w2, w3 +# CHECK: sbcs x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Add/Subtract with (optionally shifted) immediate +#==---------------------------------------------------------------------------== + +0x83 0x00 0x10 0x11 +0x83 0x00 0x10 0x91 + +# CHECK: add w3, w4, #1024 +# CHECK: add x3, x4, #1024 + +0x83 0x00 0x50 0x11 +0x83 0x00 0x40 0x11 +0x83 0x00 0x50 0x91 +0x83 0x00 0x40 0x91 +0xff 0x83 0x00 0x91 + +# CHECK: add w3, w4, #4194304 +# CHECK: add x3, x4, #4194304 +# CHECK: add x3, x4, #0, lsl #12 +# CHECK: add sp, sp, #32 + +0x83 0x00 0x10 0x31 +0x83 0x00 0x50 0x31 +0x83 0x00 0x10 0xb1 +0x83 0x00 0x50 0xb1 + +# CHECK: adds w3, w4, #1024 +# CHECK: adds w3, w4, #4194304 +# CHECK: adds x3, x4, #1024 +# CHECK: adds x3, x4, #4194304 + +0x83 0x00 0x10 0x51 +0x83 0x00 0x50 0x51 +0x83 0x00 0x10 0xd1 +0x83 0x00 0x50 0xd1 +0xff 0x83 0x00 0xd1 + +# CHECK: sub w3, w4, #1024 +# CHECK: sub w3, w4, #4194304 +# CHECK: sub x3, x4, #1024 +# CHECK: sub x3, x4, #4194304 +# CHECK: sub sp, sp, #32 + +0x83 0x00 0x10 0x71 +0x83 0x00 0x50 0x71 +0x83 0x00 0x10 0xf1 +0x83 0x00 0x50 0xf1 + +# CHECK: subs w3, w4, #1024 +# CHECK: subs w3, w4, #4194304 +# CHECK: subs x3, x4, #1024 +# CHECK: subs x3, x4, #4194304 + +#==---------------------------------------------------------------------------== +# Add/Subtract register with (optional) shift +#==---------------------------------------------------------------------------== + +0xac 0x01 0x0e 0x0b +0xac 0x01 0x0e 0x8b +0xac 0x31 0x0e 0x0b +0xac 0x31 0x0e 0x8b +0xac 0xa9 0x4e 0x0b +0xac 0xa9 0x4e 0x8b +0xac 0x9d 0x8e 0x0b +0xac 0x9d 0x8e 0x8b + +# CHECK: add w12, w13, w14 +# CHECK: add x12, x13, x14 +# CHECK: add w12, w13, w14, lsl #12 +# CHECK: add x12, x13, x14, lsl #12 +# CHECK: add w12, w13, w14, lsr #42 +# CHECK: add x12, x13, x14, lsr #42 +# CHECK: add w12, w13, w14, asr #39 +# CHECK: add x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x4b +0xac 0x01 0x0e 0xcb +0xac 0x31 0x0e 0x4b +0xac 0x31 0x0e 0xcb +0xac 0xa9 0x4e 0x4b +0xac 0xa9 0x4e 0xcb +0xac 0x9d 0x8e 0x4b +0xac 0x9d 0x8e 0xcb + +# CHECK: sub w12, w13, w14 +# CHECK: sub x12, x13, x14 +# CHECK: sub w12, w13, w14, lsl #12 +# CHECK: sub x12, x13, x14, lsl #12 +# CHECK: sub w12, w13, w14, lsr #42 +# CHECK: sub x12, x13, x14, lsr #42 +# CHECK: sub w12, w13, w14, asr #39 +# CHECK: sub x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x2b +0xac 0x01 0x0e 0xab +0xac 0x31 0x0e 0x2b +0xac 0x31 0x0e 0xab +0xac 0xa9 0x4e 0x2b +0xac 0xa9 0x4e 0xab +0xac 0x9d 0x8e 0x2b +0xac 0x9d 0x8e 0xab + +# CHECK: adds w12, w13, w14 +# CHECK: adds x12, x13, x14 +# CHECK: adds w12, w13, w14, lsl #12 +# CHECK: adds x12, x13, x14, lsl #12 +# CHECK: adds w12, w13, w14, lsr #42 +# CHECK: adds x12, x13, x14, lsr #42 +# CHECK: adds w12, w13, w14, asr #39 +# CHECK: adds x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x6b +0xac 0x01 0x0e 0xeb +0xac 0x31 0x0e 0x6b +0xac 0x31 0x0e 0xeb +0xac 0xa9 0x4e 0x6b +0xac 0xa9 0x4e 0xeb +0xac 0x9d 0x8e 0x6b +0xac 0x9d 0x8e 0xeb + +# CHECK: subs w12, w13, w14 +# CHECK: subs x12, x13, x14 +# CHECK: subs w12, w13, w14, lsl #12 +# CHECK: subs x12, x13, x14, lsl #12 +# CHECK: subs w12, w13, w14, lsr #42 +# CHECK: subs x12, x13, x14, lsr #42 +# CHECK: subs w12, w13, w14, asr #39 +# CHECK: subs x12, x13, x14, asr #39 + +#==---------------------------------------------------------------------------== +# Add/Subtract with (optional) extend +#==---------------------------------------------------------------------------== + +0x41 0x00 0x23 0x0b +0x41 0x20 0x23 0x0b +0x41 0x40 0x23 0x0b +0x41 0x60 0x23 0x0b +0x41 0x80 0x23 0x0b +0x41 0xa0 0x23 0x0b +0x41 0xc0 0x23 0x0b +0x41 0xe0 0x23 0x0b + +# CHECK: add w1, w2, w3, uxtb +# CHECK: add w1, w2, w3, uxth +# CHECK: add w1, w2, w3, uxtw +# CHECK: add w1, w2, w3, uxtx +# CHECK: add w1, w2, w3, sxtb +# CHECK: add w1, w2, w3, sxth +# CHECK: add w1, w2, w3, sxtw +# CHECK: add w1, w2, w3, sxtx + +0x41 0x00 0x23 0x8b +0x41 0x20 0x23 0x8b +0x41 0x40 0x23 0x8b +0x41 0x80 0x23 0x8b +0x41 0xa0 0x23 0x8b +0x41 0xc0 0x23 0x8b + +# CHECK: add x1, x2, w3, uxtb +# CHECK: add x1, x2, w3, uxth +# CHECK: add x1, x2, w3, uxtw +# CHECK: add x1, x2, w3, sxtb +# CHECK: add x1, x2, w3, sxth +# CHECK: add x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x0b +0xe1 0x43 0x23 0x0b +0x5f 0x60 0x23 0x8b +0x5f 0x60 0x23 0x8b + +# CHECK: add w1, wsp, w3 +# CHECK: add w1, wsp, w3 +# CHECK: add sp, x2, x3 +# CHECK: add sp, x2, x3 + +0x41 0x00 0x23 0x4b +0x41 0x20 0x23 0x4b +0x41 0x40 0x23 0x4b +0x41 0x60 0x23 0x4b +0x41 0x80 0x23 0x4b +0x41 0xa0 0x23 0x4b +0x41 0xc0 0x23 0x4b +0x41 0xe0 0x23 0x4b + +# CHECK: sub w1, w2, w3, uxtb +# CHECK: sub w1, w2, w3, uxth +# CHECK: sub w1, w2, w3, uxtw +# CHECK: sub w1, w2, w3, uxtx +# CHECK: sub w1, w2, w3, sxtb +# CHECK: sub w1, w2, w3, sxth +# CHECK: sub w1, w2, w3, sxtw +# CHECK: sub w1, w2, w3, sxtx + +0x41 0x00 0x23 0xcb +0x41 0x20 0x23 0xcb +0x41 0x40 0x23 0xcb +0x41 0x80 0x23 0xcb +0x41 0xa0 0x23 0xcb +0x41 0xc0 0x23 0xcb + +# CHECK: sub x1, x2, w3, uxtb +# CHECK: sub x1, x2, w3, uxth +# CHECK: sub x1, x2, w3, uxtw +# CHECK: sub x1, x2, w3, sxtb +# CHECK: sub x1, x2, w3, sxth +# CHECK: sub x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x4b +0xe1 0x43 0x23 0x4b +0x5f 0x60 0x23 0xcb +0x5f 0x60 0x23 0xcb + +# CHECK: sub w1, wsp, w3 +# CHECK: sub w1, wsp, w3 +# CHECK: sub sp, x2, x3 +# CHECK: sub sp, x2, x3 + +0x41 0x00 0x23 0x2b +0x41 0x20 0x23 0x2b +0x41 0x40 0x23 0x2b +0x41 0x60 0x23 0x2b +0x41 0x80 0x23 0x2b +0x41 0xa0 0x23 0x2b +0x41 0xc0 0x23 0x2b +0x41 0xe0 0x23 0x2b + +# CHECK: adds w1, w2, w3, uxtb +# CHECK: adds w1, w2, w3, uxth +# CHECK: adds w1, w2, w3, uxtw +# CHECK: adds w1, w2, w3, uxtx +# CHECK: adds w1, w2, w3, sxtb +# CHECK: adds w1, w2, w3, sxth +# CHECK: adds w1, w2, w3, sxtw +# CHECK: adds w1, w2, w3, sxtx + +0x41 0x00 0x23 0xab +0x41 0x20 0x23 0xab +0x41 0x40 0x23 0xab +0x41 0x80 0x23 0xab +0x41 0xa0 0x23 0xab +0x41 0xc0 0x23 0xab + +# CHECK: adds x1, x2, w3, uxtb +# CHECK: adds x1, x2, w3, uxth +# CHECK: adds x1, x2, w3, uxtw +# CHECK: adds x1, x2, w3, sxtb +# CHECK: adds x1, x2, w3, sxth +# CHECK: adds x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x2b +0xe1 0x43 0x23 0x2b + +# CHECK: adds w1, wsp, w3 +# CHECK: adds w1, wsp, w3 + +0x41 0x00 0x23 0x6b +0x41 0x20 0x23 0x6b +0x41 0x40 0x23 0x6b +0x41 0x60 0x23 0x6b +0x41 0x80 0x23 0x6b +0x41 0xa0 0x23 0x6b +0x41 0xc0 0x23 0x6b +0x41 0xe0 0x23 0x6b + +# CHECK: subs w1, w2, w3, uxtb +# CHECK: subs w1, w2, w3, uxth +# CHECK: subs w1, w2, w3, uxtw +# CHECK: subs w1, w2, w3, uxtx +# CHECK: subs w1, w2, w3, sxtb +# CHECK: subs w1, w2, w3, sxth +# CHECK: subs w1, w2, w3, sxtw +# CHECK: subs w1, w2, w3, sxtx + +0x41 0x00 0x23 0xeb +0x41 0x20 0x23 0xeb +0x41 0x40 0x23 0xeb +0x41 0x80 0x23 0xeb +0x41 0xa0 0x23 0xeb +0x41 0xc0 0x23 0xeb + +# CHECK: subs x1, x2, w3, uxtb +# CHECK: subs x1, x2, w3, uxth +# CHECK: subs x1, x2, w3, uxtw +# CHECK: subs x1, x2, w3, sxtb +# CHECK: subs x1, x2, w3, sxth +# CHECK: subs x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x6b +0xe1 0x43 0x23 0x6b + +# CHECK: subs w1, wsp, w3 +# CHECK: subs w1, wsp, w3 + +0x1f 0x41 0x28 0xeb +0x3f 0x41 0x28 0x6b +0xff 0x43 0x28 0x6b +0xff 0x43 0x28 0xeb + +# CHECK: cmp x8, w8, uxtw +# CHECK: cmp w9, w8, uxtw +# CHECK: cmp wsp, w8 +# CHECK: cmp sp, w8 + +0x3f 0x41 0x28 0x4b +0xe1 0x43 0x28 0x4b +0xff 0x43 0x28 0x4b +0x3f 0x41 0x28 0xcb +0xe1 0x43 0x28 0xcb +0xff 0x43 0x28 0xcb +0xe1 0x43 0x28 0x6b +0xe1 0x43 0x28 0xeb + +# CHECK: sub wsp, w9, w8 +# CHECK: sub w1, wsp, w8 +# CHECK: sub wsp, wsp, w8 +# CHECK: sub sp, x9, w8 +# CHECK: sub x1, sp, w8 +# CHECK: sub sp, sp, w8 +# CHECK: subs w1, wsp, w8 +# CHECK: subs x1, sp, w8 + +#==---------------------------------------------------------------------------== +# Signed/Unsigned divide +#==---------------------------------------------------------------------------== + +0x41 0x0c 0xc3 0x1a +0x41 0x0c 0xc3 0x9a +0x41 0x08 0xc3 0x1a +0x41 0x08 0xc3 0x9a + +# CHECK: sdiv w1, w2, w3 +# CHECK: sdiv x1, x2, x3 +# CHECK: udiv w1, w2, w3 +# CHECK: udiv x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Variable shifts +#==---------------------------------------------------------------------------== + + 0x41 0x28 0xc3 0x1a +# CHECK: asrv w1, w2, w3 + 0x41 0x28 0xc3 0x9a +# CHECK: asrv x1, x2, x3 + 0x41 0x20 0xc3 0x1a +# CHECK: lslv w1, w2, w3 + 0x41 0x20 0xc3 0x9a +# CHECK: lslv x1, x2, x3 + 0x41 0x24 0xc3 0x1a +# CHECK: lsrv w1, w2, w3 + 0x41 0x24 0xc3 0x9a +# CHECK: lsrv x1, x2, x3 + 0x41 0x2c 0xc3 0x1a +# CHECK: rorv w1, w2, w3 + 0x41 0x2c 0xc3 0x9a +# CHECK: rorv x1, x2, x3 + +#==---------------------------------------------------------------------------== +# One operand instructions +#==---------------------------------------------------------------------------== + + 0x41 0x14 0xc0 0x5a +# CHECK: cls w1, w2 + 0x41 0x14 0xc0 0xda +# CHECK: cls x1, x2 + 0x41 0x10 0xc0 0x5a +# CHECK: clz w1, w2 + 0x41 0x10 0xc0 0xda +# CHECK: clz x1, x2 + 0x41 0x00 0xc0 0x5a +# CHECK: rbit w1, w2 + 0x41 0x00 0xc0 0xda +# CHECK: rbit x1, x2 + 0x41 0x08 0xc0 0x5a +# CHECK: rev w1, w2 + 0x41 0x0c 0xc0 0xda +# CHECK: rev x1, x2 + 0x41 0x04 0xc0 0x5a +# CHECK: rev16 w1, w2 + 0x41 0x04 0xc0 0xda +# CHECK: rev16 x1, x2 + 0x41 0x08 0xc0 0xda +# CHECK: rev32 x1, x2 + +#==---------------------------------------------------------------------------== +# 6.6.1 Multiply-add instructions +#==---------------------------------------------------------------------------== + +0x41 0x10 0x03 0x1b +0x41 0x10 0x03 0x9b +0x41 0x90 0x03 0x1b +0x41 0x90 0x03 0x9b +0x41 0x10 0x23 0x9b +0x41 0x90 0x23 0x9b +0x41 0x10 0xa3 0x9b +0x41 0x90 0xa3 0x9b + +# CHECK: madd w1, w2, w3, w4 +# CHECK: madd x1, x2, x3, x4 +# CHECK: msub w1, w2, w3, w4 +# CHECK: msub x1, x2, x3, x4 +# CHECK: smaddl x1, w2, w3, x4 +# CHECK: smsubl x1, w2, w3, x4 +# CHECK: umaddl x1, w2, w3, x4 +# CHECK: umsubl x1, w2, w3, x4 + +#==---------------------------------------------------------------------------== +# Multiply-high instructions +#==---------------------------------------------------------------------------== + +0x41 0x7c 0x43 0x9b +0x41 0x7c 0xc3 0x9b + +# CHECK: smulh x1, x2, x3 +# CHECK: umulh x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Move immediate instructions +#==---------------------------------------------------------------------------== + +0x20 0x00 0x80 0x52 +0x20 0x00 0x80 0xd2 +0x20 0x00 0xa0 0x52 +0x20 0x00 0xa0 0xd2 + +# CHECK: movz w0, #1 +# CHECK: movz x0, #1 +# CHECK: movz w0, #1, lsl #16 +# CHECK: movz x0, #1, lsl #16 + +0x40 0x00 0x80 0x12 +0x40 0x00 0x80 0x92 +0x40 0x00 0xa0 0x12 +0x40 0x00 0xa0 0x92 + +# CHECK: movn w0, #2 +# CHECK: movn x0, #2 +# CHECK: movn w0, #2, lsl #16 +# CHECK: movn x0, #2, lsl #16 + +0x20 0x00 0x80 0x72 +0x20 0x00 0x80 0xf2 +0x20 0x00 0xa0 0x72 +0x20 0x00 0xa0 0xf2 + +# CHECK: movk w0, #1 +# CHECK: movk x0, #1 +# CHECK: movk w0, #1, lsl #16 +# CHECK: movk x0, #1, lsl #16 + +#==---------------------------------------------------------------------------== +# Conditionally set flags instructions +#==---------------------------------------------------------------------------== + + 0x1f 0x00 0x00 0x31 +# CHECK: cmn w0, #0 + 0x1f 0xfc 0x03 0xb1 +# CHECK: x0, #255 + + 0x23 0x08 0x42 0x3a +# CHECK: ccmn w1, #2, #3, eq + 0x23 0x08 0x42 0xba +# CHECK: ccmn x1, #2, #3, eq + 0x23 0x08 0x42 0x7a +# CHECK: ccmp w1, #2, #3, eq + 0x23 0x08 0x42 0xfa +# CHECK: ccmp x1, #2, #3, eq + + 0x23 0x00 0x42 0x3a +# CHECK: ccmn w1, w2, #3, eq + 0x23 0x00 0x42 0xba +# CHECK: ccmn x1, x2, #3, eq + 0x23 0x00 0x42 0x7a +# CHECK: ccmp w1, w2, #3, eq + 0x23 0x00 0x42 0xfa +# CHECK: ccmp x1, x2, #3, eq + +#==---------------------------------------------------------------------------== +# Conditional select instructions +#==---------------------------------------------------------------------------== + + 0x41 0x00 0x83 0x1a +# CHECK: csel w1, w2, w3, eq + 0x41 0x00 0x83 0x9a +# CHECK: csel x1, x2, x3, eq + 0x41 0x04 0x83 0x1a +# CHECK: csinc w1, w2, w3, eq + 0x41 0x04 0x83 0x9a +# CHECK: csinc x1, x2, x3, eq + 0x41 0x00 0x83 0x5a +# CHECK: csinv w1, w2, w3, eq + 0x41 0x00 0x83 0xda +# CHECK: csinv x1, x2, x3, eq + 0x41 0x04 0x83 0x5a +# CHECK: csneg w1, w2, w3, eq + 0x41 0x04 0x83 0xda +# CHECK: csneg x1, x2, x3, eq diff --git a/test/MC/Disassembler/ARM64/bitfield.txt b/test/MC/Disassembler/ARM64/bitfield.txt new file mode 100644 index 0000000000..99e7af1ea3 --- /dev/null +++ b/test/MC/Disassembler/ARM64/bitfield.txt @@ -0,0 +1,29 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#==---------------------------------------------------------------------------== +# 5.4.4 Bitfield Operations +#==---------------------------------------------------------------------------== + +0x41 0x3c 0x01 0x33 +0x41 0x3c 0x41 0xb3 +0x41 0x3c 0x01 0x13 +0x41 0x3c 0x41 0x93 +0x41 0x3c 0x01 0x53 +0x41 0x3c 0x41 0xd3 + +# CHECK: bfm w1, w2, #1, #15 +# CHECK: bfm x1, x2, #1, #15 +# CHECK: sbfm w1, w2, #1, #15 +# CHECK: sbfm x1, x2, #1, #15 +# CHECK: ubfm w1, w2, #1, #15 +# CHECK: ubfm x1, x2, #1, #15 + +#==---------------------------------------------------------------------------== +# 5.4.5 Extract (immediate) +#==---------------------------------------------------------------------------== + +0x41 0x3c 0x83 0x13 +0x62 0x04 0xc4 0x93 + +# CHECK: extr w1, w2, w3, #15 +# CHECK: extr x2, x3, x4, #1 diff --git a/test/MC/Disassembler/ARM64/branch.txt b/test/MC/Disassembler/ARM64/branch.txt new file mode 100644 index 0000000000..c5b254b736 --- /dev/null +++ b/test/MC/Disassembler/ARM64/branch.txt @@ -0,0 +1,75 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#----------------------------------------------------------------------------- +# Unconditional branch (register) instructions. +#----------------------------------------------------------------------------- + + 0xc0 0x03 0x5f 0xd6 +# CHECK: ret + 0x20 0x00 0x5f 0xd6 +# CHECK: ret x1 + 0xe0 0x03 0xbf 0xd6 +# CHECK: drps + 0xe0 0x03 0x9f 0xd6 +# CHECK: eret + 0xa0 0x00 0x1f 0xd6 +# CHECK: br x5 + 0x20 0x01 0x3f 0xd6 +# CHECK: blr x9 + 0x0B 0x00 0x18 0x37 +# CHECK: tbnz w11, #3, #0 + +#----------------------------------------------------------------------------- +# Exception generation instructions. +#----------------------------------------------------------------------------- + + 0x20 0x00 0x20 0xd4 +# CHECK: brk #1 + 0x41 0x00 0xa0 0xd4 +# CHECK: dcps1 #2 + 0x62 0x00 0xa0 0xd4 +# CHECK: dcps2 #3 + 0x83 0x00 0xa0 0xd4 +# CHECK: dcps3 #4 + 0xa0 0x00 0x40 0xd4 +# CHECK: hlt #5 + 0xc2 0x00 0x00 0xd4 +# CHECK: hvc #6 + 0xe3 0x00 0x00 0xd4 +# CHECK: smc #7 + 0x01 0x01 0x00 0xd4 +# CHECK: svc #8 + +#----------------------------------------------------------------------------- +# PC-relative branches (both positive and negative displacement) +#----------------------------------------------------------------------------- + + 0x07 0x00 0x00 0x14 +# CHECK: b #28 + 0x06 0x00 0x00 0x94 +# CHECK: bl #24 + 0xa1 0x00 0x00 0x54 +# CHECK: b.ne #20 + 0x80 0x00 0x08 0x36 +# CHECK: tbz w0, #1, #16 + 0xe1 0xff 0xf7 0x36 +# CHECK: tbz w1, #30, #-4 + 0x60 0x00 0x08 0x37 +# CHECK: tbnz w0, #1, #12 + 0x40 0x00 0x00 0xb4 +# CHECK: cbz x0, #8 + 0x20 0x00 0x00 0xb5 +# CHECK: cbnz x0, #4 + 0x1f 0x20 0x03 0xd5 +# CHECK: nop + 0xff 0xff 0xff 0x17 +# CHECK: b #-4 + 0xc1 0xff 0xff 0x54 +# CHECK: b.ne #-8 + 0xa0 0xff 0x0f 0x36 +# CHECK: tbz w0, #1, #-12 + 0x80 0xff 0xff 0xb4 +# CHECK: cbz x0, #-16 + 0x1f 0x20 0x03 0xd5 +# CHECK: nop + diff --git a/test/MC/Disassembler/ARM64/crc32.txt b/test/MC/Disassembler/ARM64/crc32.txt new file mode 100644 index 0000000000..ef0a26e562 --- /dev/null +++ b/test/MC/Disassembler/ARM64/crc32.txt @@ -0,0 +1,18 @@ +# RUN: llvm-mc -triple=arm64 -disassemble < %s | FileCheck %s + +# CHECK: crc32b w5, w7, w20 +# CHECK: crc32h w28, wzr, w30 +# CHECK: crc32w w0, w1, w2 +# CHECK: crc32x w7, w9, x20 +# CHECK: crc32cb w9, w5, w4 +# CHECK: crc32ch w13, w17, w25 +# CHECK: crc32cw wzr, w3, w5 +# CHECK: crc32cx w18, w16, xzr +0xe5 0x40 0xd4 0x1a +0xfc 0x47 0xde 0x1a +0x20 0x48 0xc2 0x1a +0x27 0x4d 0xd4 0x9a +0xa9 0x50 0xc4 0x1a +0x2d 0x56 0xd9 0x1a +0x7f 0x58 0xc5 0x1a +0x12 0x5e 0xdf 0x9a diff --git a/test/MC/Disassembler/ARM64/crypto.txt b/test/MC/Disassembler/ARM64/crypto.txt new file mode 100644 index 0000000000..e163b2cd59 --- /dev/null +++ b/test/MC/Disassembler/ARM64/crypto.txt @@ -0,0 +1,47 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple arm64-apple-darwin -output-asm-variant=1 --disassemble < %s | FileCheck %s --check-prefix=CHECK-APPLE + + 0x20 0x48 0x28 0x4e + 0x20 0x58 0x28 0x4e + 0x20 0x68 0x28 0x4e + 0x20 0x78 0x28 0x4e + 0x20 0x00 0x02 0x5e + 0x20 0x10 0x02 0x5e + 0x20 0x20 0x02 0x5e + 0x20 0x30 0x02 0x5e + 0x20 0x40 0x02 0x5e + 0x20 0x50 0x02 0x5e + 0x20 0x60 0x02 0x5e + 0x20 0x08 0x28 0x5e + 0x20 0x18 0x28 0x5e + 0x20 0x28 0x28 0x5e + +# CHECK: aese v0.16b, v1.16b +# CHECK: aesd v0.16b, v1.16b +# CHECK: aesmc v0.16b, v1.16b +# CHECK: aesimc v0.16b, v1.16b +# CHECK: sha1c q0, s1, v2.4s +# CHECK: sha1p q0, s1, v2.4s +# CHECK: sha1m q0, s1, v2.4s +# CHECK: sha1su0 v0.4s, v1.4s, v2 +# CHECK: sha256h q0, q1, v2.4s +# CHECK: sha256h2 q0, q1, v2.4s +# CHECK: sha256su1 v0.4s, v1.4s, v2.4s +# CHECK: sha1h s0, s1 +# CHECK: sha1su1 v0.4s, v1.4s +# CHECK: sha256su0 v0.4s, v1.4s + +# CHECK-APPLE: aese.16b v0, v1 +# CHECK-APPLE: aesd.16b v0, v1 +# CHECK-APPLE: aesmc.16b v0, v1 +# CHECK-APPLE: aesimc.16b v0, v1 +# CHECK-APPLE: sha1c.4s q0, s1, v2 +# CHECK-APPLE: sha1p.4s q0, s1, v2 +# CHECK-APPLE: sha1m.4s q0, s1, v2 +# CHECK-APPLE: sha1su0.4s v0, v1, v2 +# CHECK-APPLE: sha256h.4s q0, q1, v2 +# CHECK-APPLE: sha256h2.4s q0, q1, v2 +# CHECK-APPLE: sha256su1.4s v0, v1, v2 +# CHECK-APPLE: sha1h s0, s1 +# CHECK-APPLE: sha1su1.4s v0, v1 +# CHECK-APPLE: sha256su0.4s v0, v1 diff --git a/test/MC/Disassembler/ARM64/invalid-logical.txt b/test/MC/Disassembler/ARM64/invalid-logical.txt new file mode 100644 index 0000000000..8a4ecb664e --- /dev/null +++ b/test/MC/Disassembler/ARM64/invalid-logical.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc -triple arm64-apple-darwin -disassemble < %s 2>&1 | FileCheck %s + +# rdar://15226511 +0x7b 0xbf 0x25 0x72 +# CHECK: invalid instruction encoding +# CHECK-NEXT: 0x7b 0xbf 0x25 0x72 diff --git a/test/MC/Disassembler/ARM64/lit.local.cfg b/test/MC/Disassembler/ARM64/lit.local.cfg new file mode 100644 index 0000000000..46a946845e --- /dev/null +++ b/test/MC/Disassembler/ARM64/lit.local.cfg @@ -0,0 +1,5 @@ +config.suffixes = ['.txt'] + +targets = set(config.root.targets_to_build.split()) +if not 'ARM64' in targets: + config.unsupported = True diff --git a/test/MC/Disassembler/ARM64/logical.txt b/test/MC/Disassembler/ARM64/logical.txt new file mode 100644 index 0000000000..29db8cbcf4 --- /dev/null +++ b/test/MC/Disassembler/ARM64/logical.txt @@ -0,0 +1,217 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#==---------------------------------------------------------------------------== +# 5.4.2 Logical (immediate) +#==---------------------------------------------------------------------------== + +0x00 0x00 0x00 0x12 +0x00 0x00 0x40 0x92 +0x41 0x0c 0x00 0x12 +0x41 0x0c 0x40 0x92 +0xbf 0xec 0x7c 0x92 +0x00 0x00 0x00 0x72 +0x00 0x00 0x40 0xf2 +0x41 0x0c 0x00 0x72 +0x41 0x0c 0x40 0xf2 + +# CHECK: and w0, w0, #0x1 +# CHECK: and x0, x0, #0x1 +# CHECK: and w1, w2, #0xf +# CHECK: and x1, x2, #0xf +# CHECK: and sp, x5, #0xfffffffffffffff0 +# CHECK: ands w0, w0, #0x1 +# CHECK: ands x0, x0, #0x1 +# CHECK: ands w1, w2, #0xf +# CHECK: ands x1, x2, #0xf + +0x41 0x00 0x12 0x52 +0x41 0x00 0x71 0xd2 + +# CHECK: eor w1, w2, #0x4000 +# CHECK: eor x1, x2, #0x8000 + +0x41 0x00 0x12 0x32 +0x41 0x00 0x71 0xb2 + +# CHECK: orr w1, w2, #0x4000 +# CHECK: orr x1, x2, #0x8000 + +#==---------------------------------------------------------------------------== +# 5.5.3 Logical (shifted register) +#==---------------------------------------------------------------------------== + +0x41 0x00 0x03 0x0a +0x41 0x00 0x03 0x8a +0x41 0x08 0x03 0x0a +0x41 0x08 0x03 0x8a +0x41 0x08 0x43 0x0a +0x41 0x08 0x43 0x8a +0x41 0x08 0x83 0x0a +0x41 0x08 0x83 0x8a +0x41 0x08 0xc3 0x0a +0x41 0x08 0xc3 0x8a + +# CHECK: and w1, w2, w3 +# CHECK: and x1, x2, x3 +# CHECK: and w1, w2, w3, lsl #2 +# CHECK: and x1, x2, x3, lsl #2 +# CHECK: and w1, w2, w3, lsr #2 +# CHECK: and x1, x2, x3, lsr #2 +# CHECK: and w1, w2, w3, asr #2 +# CHECK: and x1, x2, x3, asr #2 +# CHECK: and w1, w2, w3, ror #2 +# CHECK: and x1, x2, x3, ror #2 + +0x41 0x00 0x03 0x6a +0x41 0x00 0x03 0xea +0x41 0x08 0x03 0x6a +0x41 0x08 0x03 0xea +0x41 0x08 0x43 0x6a +0x41 0x08 0x43 0xea +0x41 0x08 0x83 0x6a +0x41 0x08 0x83 0xea +0x41 0x08 0xc3 0x6a +0x41 0x08 0xc3 0xea + +# CHECK: ands w1, w2, w3 +# CHECK: ands x1, x2, x3 +# CHECK: ands w1, w2, w3, lsl #2 +# CHECK: ands x1, x2, x3, lsl #2 +# CHECK: ands w1, w2, w3, lsr #2 +# CHECK: ands x1, x2, x3, lsr #2 +# CHECK: ands w1, w2, w3, asr #2 +# CHECK: ands x1, x2, x3, asr #2 +# CHECK: ands w1, w2, w3, ror #2 +# CHECK: ands x1, x2, x3, ror #2 + +0x41 0x00 0x23 0x0a +0x41 0x00 0x23 0x8a +0x41 0x0c 0x23 0x0a +0x41 0x0c 0x23 0x8a +0x41 0x0c 0x63 0x0a +0x41 0x0c 0x63 0x8a +0x41 0x0c 0xa3 0x0a +0x41 0x0c 0xa3 0x8a +0x41 0x0c 0xe3 0x0a +0x41 0x0c 0xe3 0x8a + +# CHECK: bic w1, w2, w3 +# CHECK: bic x1, x2, x3 +# CHECK: bic w1, w2, w3, lsl #3 +# CHECK: bic x1, x2, x3, lsl #3 +# CHECK: bic w1, w2, w3, lsr #3 +# CHECK: bic x1, x2, x3, lsr #3 +# CHECK: bic w1, w2, w3, asr #3 +# CHECK: bic x1, x2, x3, asr #3 +# CHECK: bic w1, w2, w3, ror #3 +# CHECK: bic x1, x2, x3, ror #3 + +0x41 0x00 0x23 0x6a +0x41 0x00 0x23 0xea +0x41 0x0c 0x23 0x6a +0x41 0x0c 0x23 0xea +0x41 0x0c 0x63 0x6a +0x41 0x0c 0x63 0xea +0x41 0x0c 0xa3 0x6a +0x41 0x0c 0xa3 0xea +0x41 0x0c 0xe3 0x6a +0x41 0x0c 0xe3 0xea + +# CHECK: bics w1, w2, w3 +# CHECK: bics x1, x2, x3 +# CHECK: bics w1, w2, w3, lsl #3 +# CHECK: bics x1, x2, x3, lsl #3 +# CHECK: bics w1, w2, w3, lsr #3 +# CHECK: bics x1, x2, x3, lsr #3 +# CHECK: bics w1, w2, w3, asr #3 +# CHECK: bics x1, x2, x3, asr #3 +# CHECK: bics w1, w2, w3, ror #3 +# CHECK: bics x1, x2, x3, ror #3 + +0x41 0x00 0x23 0x4a +0x41 0x00 0x23 0xca +0x41 0x10 0x23 0x4a +0x41 0x10 0x23 0xca +0x41 0x10 0x63 0x4a +0x41 0x10 0x63 0xca +0x41 0x10 0xa3 0x4a +0x41 0x10 0xa3 0xca +0x41 0x10 0xe3 0x4a +0x41 0x10 0xe3 0xca + +# CHECK: eon w1, w2, w3 +# CHECK: eon x1, x2, x3 +# CHECK: eon w1, w2, w3, lsl #4 +# CHECK: eon x1, x2, x3, lsl #4 +# CHECK: eon w1, w2, w3, lsr #4 +# CHECK: eon x1, x2, x3, lsr #4 +# CHECK: eon w1, w2, w3, asr #4 +# CHECK: eon x1, x2, x3, asr #4 +# CHECK: eon w1, w2, w3, ror #4 +# CHECK: eon x1, x2, x3, ror #4 + +0x41 0x00 0x03 0x4a +0x41 0x00 0x03 0xca +0x41 0x14 0x03 0x4a +0x41 0x14 0x03 0xca +0x41 0x14 0x43 0x4a +0x41 0x14 0x43 0xca +0x41 0x14 0x83 0x4a +0x41 0x14 0x83 0xca +0x41 0x14 0xc3 0x4a +0x41 0x14 0xc3 0xca + +# CHECK: eor w1, w2, w3 +# CHECK: eor x1, x2, x3 +# CHECK: eor w1, w2, w3, lsl #5 +# CHECK: eor x1, x2, x3, lsl #5 +# CHECK: eor w1, w2, w3, lsr #5 +# CHECK: eor x1, x2, x3, lsr #5 +# CHECK: eor w1, w2, w3, asr #5 +# CHECK: eor x1, x2, x3, asr #5 +# CHECK: eor w1, w2, w3, ror #5 +# CHECK: eor x1, x2, x3, ror #5 + +0x41 0x00 0x03 0x2a +0x41 0x00 0x03 0xaa +0x41 0x18 0x03 0x2a +0x41 0x18 0x03 0xaa +0x41 0x18 0x43 0x2a +0x41 0x18 0x43 0xaa +0x41 0x18 0x83 0x2a +0x41 0x18 0x83 0xaa +0x41 0x18 0xc3 0x2a +0x41 0x18 0xc3 0xaa + +# CHECK: orr w1, w2, w3 +# CHECK: orr x1, x2, x3 +# CHECK: orr w1, w2, w3, lsl #6 +# CHECK: orr x1, x2, x3, lsl #6 +# CHECK: orr w1, w2, w3, lsr #6 +# CHECK: orr x1, x2, x3, lsr #6 +# CHECK: orr w1, w2, w3, asr #6 +# CHECK: orr x1, x2, x3, asr #6 +# CHECK: orr w1, w2, w3, ror #6 +# CHECK: orr x1, x2, x3, ror #6 + +0x41 0x00 0x23 0x2a +0x41 0x00 0x23 0xaa +0x41 0x1c 0x23 0x2a +0x41 0x1c 0x23 0xaa +0x41 0x1c 0x63 0x2a +0x41 0x1c 0x63 0xaa +0x41 0x1c 0xa3 0x2a +0x41 0x1c 0xa3 0xaa +0x41 0x1c 0xe3 0x2a +0x41 0x1c 0xe3 0xaa + +# CHECK: orn w1, w2, w3 +# CHECK: orn x1, x2, x3 +# CHECK: orn w1, w2, w3, lsl #7 +# CHECK: orn x1, x2, x3, lsl #7 +# CHECK: orn w1, w2, w3, lsr #7 +# CHECK: orn x1, x2, x3, lsr #7 +# CHECK: orn w1, w2, w3, asr #7 +# CHECK: orn x1, x2, x3, asr #7 +# CHECK: orn w1, w2, w3, ror #7 +# CHECK: orn x1, x2, x3, ror #7 diff --git a/test/MC/Disassembler/ARM64/memory.txt b/test/MC/Disassembler/ARM64/memory.txt new file mode 100644 index 0000000000..031bfa6903 --- /dev/null +++ b/test/MC/Disassembler/ARM64/memory.txt @@ -0,0 +1,558 @@ +# RUN: llvm-mc --disassemble -triple arm64-apple-darwin < %s | FileCheck %s + +#----------------------------------------------------------------------------- +# Indexed loads +#----------------------------------------------------------------------------- + + 0x85 0x14 0x40 0xb9 + 0x64 0x00 0x40 0xf9 + 0xe2 0x13 0x40 0xf9 + 0xe5 0x07 0x40 0x3d + 0xe6 0x07 0x40 0x7d + 0xe7 0x07 0x40 0xbd + 0xe8 0x07 0x40 0xfd + 0xe9 0x07 0xc0 0x3d + 0x64 0x00 0x40 0x39 + 0x20 0x78 0xa0 0xb8 + 0x85 0x50 0x40 0x39 + +# CHECK: ldr w5, [x4, #20] +# CHECK: ldr x4, [x3] +# CHECK: ldr x2, [sp, #32] +# CHECK: ldr b5, [sp, #1] +# CHECK: ldr h6, [sp, #2] +# CHECK: ldr s7, [sp, #4] +# CHECK: ldr d8, [sp, #8] +# CHECK: ldr q9, [sp, #16] +# CHECK: ldrb w4, [x3] +# CHECK: ldrsw x0, [x1, x0, lsl #2] +# CHECK: ldrb w5, [x4, #20] +# CHECK: ldrsb w9, [x3] +# CHECK: ldrsb x2, [sp, #128] +# CHECK: ldrh w2, [sp, #32] +# CHECK: ldrsh w3, [sp, #32] +# CHECK: ldrsh x5, [x9, #24] +# CHECK: ldrsw x9, [sp, #512] +# CHECK: prfm pldl3strm, [sp, #32] + + 0x69 0x00 0xc0 0x39 + 0xe2 0x03 0x82 0x39 + 0xe2 0x43 0x40 0x79 + 0xe3 0x43 0xc0 0x79 + 0x25 0x31 0x80 0x79 + 0xe9 0x03 0x82 0xb9 + 0xe5 0x13 0x80 0xf9 + 0x40 0x00 0x80 0xf9 + 0x41 0x00 0x80 0xf9 + 0x42 0x00 0x80 0xf9 + 0x43 0x00 0x80 0xf9 + 0x44 0x00 0x80 0xf9 + 0x45 0x00 0x80 0xf9 + 0x50 0x00 0x80 0xf9 + 0x51 0x00 0x80 0xf9 + 0x52 0x00 0x80 0xf9 + 0x53 0x00 0x80 0xf9 + 0x54 0x00 0x80 0xf9 + 0x55 0x00 0x80 0xf9 + +# CHECK: prfm pldl1keep, [x2] +# CHECK: prfm pldl1strm, [x2] +# CHECK: prfm pldl2keep, [x2] +# CHECK: prfm pldl2strm, [x2] +# CHECK: prfm pldl3keep, [x2] +# CHECK: prfm pldl3strm, [x2] +# CHECK: prfm pstl1keep, [x2] +# CHECK: prfm pstl1strm, [x2] +# CHECK: prfm pstl2keep, [x2] +# CHECK: prfm pstl2strm, [x2] +# CHECK: prfm pstl3keep, [x2] +# CHECK: prfm pstl3strm, [x2] + +#----------------------------------------------------------------------------- +# Indexed stores +#----------------------------------------------------------------------------- + + 0x64 0x00 0x00 0xf9 + 0xe2 0x13 0x00 0xf9 + 0x85 0x14 0x00 0xb9 + 0xe5 0x07 0x00 0x3d + 0xe6 0x07 0x00 0x7d + 0xe7 0x07 0x00 0xbd + 0xe8 0x07 0x00 0xfd + 0xe9 0x07 0x80 0x3d + 0x64 0x00 0x00 0x39 + 0x85 0x50 0x00 0x39 + 0xe2 0x43 0x00 0x79 + +# CHECK: str x4, [x3] +# CHECK: str x2, [sp, #32] +# CHECK: str w5, [x4, #20] +# CHECK: str b5, [sp, #1] +# CHECK: str h6, [sp, #2] +# CHECK: str s7, [sp, #4] +# CHECK: str d8, [sp, #8] +# CHECK: str q9, [sp, #16] +# CHECK: strb w4, [x3] +# CHECK: strb w5, [x4, #20] +# CHECK: strh w2, [sp, #32] + +#----------------------------------------------------------------------------- +# Unscaled immediate loads and stores +#----------------------------------------------------------------------------- + + 0x62 0x00 0x40 0xb8 + 0xe2 0x83 0x41 0xb8 + 0x62 0x00 0x40 0xf8 + 0xe2 0x83 0x41 0xf8 + 0xe5 0x13 0x40 0x3c + 0xe6 0x23 0x40 0x7c + 0xe7 0x43 0x40 0xbc + 0xe8 0x83 0x40 0xfc + 0xe9 0x03 0xc1 0x3c + 0x69 0x00 0xc0 0x38 + 0xe2 0x03 0x88 0x38 + 0xe3 0x03 0xc2 0x78 + 0x25 0x81 0x81 0x78 + 0xe9 0x03 0x98 0xb8 + +# CHECK: ldur w2, [x3] +# CHECK: ldur w2, [sp, #24] +# CHECK: ldur x2, [x3] +# CHECK: ldur x2, [sp, #24] +# CHECK: ldur b5, [sp, #1] +# CHECK: ldur h6, [sp, #2] +# CHECK: ldur s7, [sp, #4] +# CHECK: ldur d8, [sp, #8] +# CHECK: ldur q9, [sp, #16] +# CHECK: ldursb w9, [x3] +# CHECK: ldursb x2, [sp, #128] +# CHECK: ldursh w3, [sp, #32] +# CHECK: ldursh x5, [x9, #24] +# CHECK: ldursw x9, [sp, #-128] + + 0x64 0x00 0x00 0xb8 + 0xe2 0x03 0x02 0xb8 + 0x64 0x00 0x00 0xf8 + 0xe2 0x03 0x02 0xf8 + 0x85 0x40 0x01 0xb8 + 0xe5 0x13 0x00 0x3c + 0xe6 0x23 0x00 0x7c + 0xe7 0x43 0x00 0xbc + 0xe8 0x83 0x00 0xfc + 0xe9 0x03 0x81 0x3c + 0x64 0x00 0x00 0x38 + 0x85 0x40 0x01 0x38 + 0xe2 0x03 0x02 0x78 + 0xe5 0x03 0x82 0xf8 + +# CHECK: stur w4, [x3] +# CHECK: stur w2, [sp, #32] +# CHECK: stur x4, [x3] +# CHECK: stur x2, [sp, #32] +# CHECK: stur w5, [x4, #20] +# CHECK: stur b5, [sp, #1] +# CHECK: stur h6, [sp, #2] +# CHECK: stur s7, [sp, #4] +# CHECK: stur d8, [sp, #8] +# CHECK: stur q9, [sp, #16] +# CHECK: sturb w4, [x3] +# CHECK: sturb w5, [x4, #20] +# CHECK: sturh w2, [sp, #32] +# CHECK: prfum pldl3strm, [sp, #32] + +#----------------------------------------------------------------------------- +# Unprivileged loads and stores +#----------------------------------------------------------------------------- + + 0x83 0x08 0x41 0xb8 + 0x83 0x08 0x41 0xf8 + 0x83 0x08 0x41 0x38 + 0x69 0x08 0xc0 0x38 + 0xe2 0x0b 0x88 0x38 + 0x83 0x08 0x41 0x78 + 0xe3 0x0b 0xc2 0x78 + 0x25 0x89 0x81 0x78 + 0xe9 0x0b 0x98 0xb8 + +# CHECK: ldtr w3, [x4, #16] +# CHECK: ldtr x3, [x4, #16] +# CHECK: ldtrb w3, [x4, #16] +# CHECK: ldtrsb w9, [x3] +# CHECK: ldtrsb x2, [sp, #128] +# CHECK: ldtrh w3, [x4, #16] +# CHECK: ldtrsh w3, [sp, #32] +# CHECK: ldtrsh x5, [x9, #24] +# CHECK: ldtrsw x9, [sp, #-128] + + 0x85 0x48 0x01 0xb8 + 0x64 0x08 0x00 0xf8 + 0xe2 0x0b 0x02 0xf8 + 0x64 0x08 0x00 0x38 + 0x85 0x48 0x01 0x38 + 0xe2 0x0b 0x02 0x78 + +# CHECK: sttr w5, [x4, #20] +# CHECK: sttr x4, [x3] +# CHECK: sttr x2, [sp, #32] +# CHECK: sttrb w4, [x3] +# CHECK: sttrb w5, [x4, #20] +# CHECK: sttrh w2, [sp, #32] + +#----------------------------------------------------------------------------- +# Pre-indexed loads and stores +#----------------------------------------------------------------------------- + + 0xfd 0x8c 0x40 0xf8 + 0xfe 0x8c 0x40 0xf8 + 0x05 0x1c 0x40 0x3c + 0x06 0x2c 0x40 0x7c + 0x07 0x4c 0x40 0xbc + 0x08 0x8c 0x40 0xfc + 0x09 0x0c 0xc1 0x3c + +# CHECK: ldr fp, [x7, #8]! +# CHECK: ldr lr, [x7, #8]! +# CHECK: ldr b5, [x0, #1]! +# CHECK: ldr h6, [x0, #2]! +# CHECK: ldr s7, [x0, #4]! +# CHECK: ldr d8, [x0, #8]! +# CHECK: ldr q9, [x0, #16]! + + 0xfe 0x8c 0x1f 0xf8 + 0xfd 0x8c 0x1f 0xf8 + 0x05 0xfc 0x1f 0x3c + 0x06 0xec 0x1f 0x7c + 0x07 0xcc 0x1f 0xbc + 0x08 0x8c 0x1f 0xfc + 0x09 0x0c 0x9f 0x3c + +# CHECK: str lr, [x7, #-8]! +# CHECK: str fp, [x7, #-8]! +# CHECK: str b5, [x0, #-1]! +# CHECK: str h6, [x0, #-2]! +# CHECK: str s7, [x0, #-4]! +# CHECK: str d8, [x0, #-8]! +# CHECK: str q9, [x0, #-16]! + +#----------------------------------------------------------------------------- +# post-indexed loads and stores +#----------------------------------------------------------------------------- + + 0xfe 0x84 0x1f 0xf8 + 0xfd 0x84 0x1f 0xf8 + 0x05 0xf4 0x1f 0x3c + 0x06 0xe4 0x1f 0x7c + 0x07 0xc4 0x1f 0xbc + 0x08 0x84 0x1f 0xfc + 0x09 0x04 0x9f 0x3c + +# CHECK: str lr, [x7], #-8 +# CHECK: str fp, [x7], #-8 +# CHECK: str b5, [x0], #-1 +# CHECK: str h6, [x0], #-2 +# CHECK: str s7, [x0], #-4 +# CHECK: str d8, [x0], #-8 +# CHECK: str q9, [x0], #-16 + + 0xfd 0x84 0x40 0xf8 + 0xfe 0x84 0x40 0xf8 + 0x05 0x14 0x40 0x3c + 0x06 0x24 0x40 0x7c + 0x07 0x44 0x40 0xbc + 0x08 0x84 0x40 0xfc + 0x09 0x04 0xc1 0x3c + +# CHECK: ldr fp, [x7], #8 +# CHECK: ldr lr, [x7], #8 +# CHECK: ldr b5, [x0], #1 +# CHECK: ldr h6, [x0], #2 +# CHECK: ldr s7, [x0], #4 +# CHECK: ldr d8, [x0], #8 +# CHECK: ldr q9, [x0], #16 + +#----------------------------------------------------------------------------- +# Load/Store pair (indexed offset) +#----------------------------------------------------------------------------- + + 0xe3 0x09 0x42 0x29 + 0xe4 0x27 0x7f 0xa9 + 0xc2 0x0d 0x42 0x69 + 0xe2 0x0f 0x7e 0x69 + 0x4a 0x04 0x48 0x2d + 0x4a 0x04 0x40 0x6d + +# CHECK: ldp w3, w2, [x15, #16] +# CHECK: ldp x4, x9, [sp, #-16] +# CHECK: ldpsw x2, x3, [x14, #16] +# CHECK: ldpsw x2, x3, [sp, #-16] +# CHECK: ldp s10, s1, [x2, #64] +# CHECK: ldp d10, d1, [x2] + + 0xe3 0x09 0x02 0x29 + 0xe4 0x27 0x3f 0xa9 + 0x4a 0x04 0x08 0x2d + 0x4a 0x04 0x00 0x6d + +# CHECK: stp w3, w2, [x15, #16] +# CHECK: stp x4, x9, [sp, #-16] +# CHECK: stp s10, s1, [x2, #64] +# CHECK: stp d10, d1, [x2] + +#----------------------------------------------------------------------------- +# Load/Store pair (pre-indexed) +#----------------------------------------------------------------------------- + + 0xe3 0x09 0xc2 0x29 + 0xe4 0x27 0xff 0xa9 + 0xc2 0x0d 0xc2 0x69 + 0xe2 0x0f 0xfe 0x69 + 0x4a 0x04 0xc8 0x2d + 0x4a 0x04 0xc1 0x6d + +# CHECK: ldp w3, w2, [x15, #16]! +# CHECK: ldp x4, x9, [sp, #-16]! +# CHECK: ldpsw x2, x3, [x14, #16]! +# CHECK: ldpsw x2, x3, [sp, #-16]! +# CHECK: ldp s10, s1, [x2, #64]! +# CHECK: ldp d10, d1, [x2, #16]! + + 0xe3 0x09 0x82 0x29 + 0xe4 0x27 0xbf 0xa9 + 0x4a 0x04 0x88 0x2d + 0x4a 0x04 0x81 0x6d + +# CHECK: stp w3, w2, [x15, #16]! +# CHECK: stp x4, x9, [sp, #-16]! +# CHECK: stp s10, s1, [x2, #64]! +# CHECK: stp d10, d1, [x2, #16]! + +#----------------------------------------------------------------------------- +# Load/Store pair (post-indexed) +#----------------------------------------------------------------------------- + + 0xe3 0x09 0xc2 0x28 + 0xe4 0x27 0xff 0xa8 + 0xc2 0x0d 0xc2 0x68 + 0xe2 0x0f 0xfe 0x68 + 0x4a 0x04 0xc8 0x2c + 0x4a 0x04 0xc1 0x6c + +# CHECK: ldp w3, w2, [x15], #16 +# CHECK: ldp x4, x9, [sp], #-16 +# CHECK: ldpsw x2, x3, [x14], #16 +# CHECK: ldpsw x2, x3, [sp], #-16 +# CHECK: ldp s10, s1, [x2], #64 +# CHECK: ldp d10, d1, [x2], #16 + + 0xe3 0x09 0x82 0x28 + 0xe4 0x27 0xbf 0xa8 + 0x4a 0x04 0x88 0x2c + 0x4a 0x04 0x81 0x6c + +# CHECK: stp w3, w2, [x15], #16 +# CHECK: stp x4, x9, [sp], #-16 +# CHECK: stp s10, s1, [x2], #64 +# CHECK: stp d10, d1, [x2], #16 + +#----------------------------------------------------------------------------- +# Load/Store pair (no-allocate) +#----------------------------------------------------------------------------- + + 0xe3 0x09 0x42 0x28 + 0xe4 0x27 0x7f 0xa8 + 0x4a 0x04 0x48 0x2c + 0x4a 0x04 0x40 0x6c + +# CHECK: ldnp w3, w2, [x15, #16] +# CHECK: ldnp x4, x9, [sp, #-16] +# CHECK: ldnp s10, s1, [x2, #64] +# CHECK: ldnp d10, d1, [x2] + + 0xe3 0x09 0x02 0x28 + 0xe4 0x27 0x3f 0xa8 + 0x4a 0x04 0x08 0x2c + 0x4a 0x04 0x00 0x6c + +# CHECK: stnp w3, w2, [x15, #16] +# CHECK: stnp x4, x9, [sp, #-16] +# CHECK: stnp s10, s1, [x2, #64] +# CHECK: stnp d10, d1, [x2] + +#----------------------------------------------------------------------------- +# Load/Store register offset +#----------------------------------------------------------------------------- + + 0x00 0x68 0x60 0xb8 + 0x00 0x78 0x60 0xb8 + 0x00 0x68 0x60 0xf8 + 0x00 0x78 0x60 0xf8 + 0x00 0xe8 0x60 0xf8 + +# CHECK: ldr w0, [x0, x0] +# CHECK: ldr w0, [x0, x0, lsl #2] +# CHECK: ldr x0, [x0, x0] +# CHECK: ldr x0, [x0, x0, lsl #3] +# CHECK: ldr x0, [x0, x0, sxtx] + + 0x21 0x68 0x62 0x3c + 0x21 0x78 0x62 0x3c + 0x21 0x68 0x62 0x7c + 0x21 0x78 0x62 0x7c + 0x21 0x68 0x62 0xbc + 0x21 0x78 0x62 0xbc + 0x21 0x68 0x62 0xfc + 0x21 0x78 0x62 0xfc + 0x21 0x68 0xe2 0x3c + 0x21 0x78 0xe2 0x3c + +# CHECK: ldr b1, [x1, x2] +# CHECK: ldr b1, [x1, x2, lsl #0] +# CHECK: ldr h1, [x1, x2] +# CHECK: ldr h1, [x1, x2, lsl #1] +# CHECK: ldr s1, [x1, x2] +# CHECK: ldr s1, [x1, x2, lsl #2] +# CHECK: ldr d1, [x1, x2] +# CHECK: ldr d1, [x1, x2, lsl #3] +# CHECK: ldr q1, [x1, x2] +# CHECK: ldr q1, [x1, x2, lsl #4] + + 0xe1 0x6b 0x23 0xfc + 0xe1 0x5b 0x23 0xfc + 0xe1 0x6b 0xa3 0x3c + 0xe1 0x5b 0xa3 0x3c + +# CHECK: str d1, [sp, x3] +# CHECK: str d1, [sp, x3, uxtw #3] +# CHECK: str q1, [sp, x3] +# CHECK: str q1, [sp, x3, uxtw #4] + +#----------------------------------------------------------------------------- +# Load/Store exclusive +#----------------------------------------------------------------------------- + + 0x26 0x7c 0x5f 0x08 + 0x26 0x7c 0x5f 0x48 + 0x27 0x0d 0x7f 0x88 + 0x27 0x0d 0x7f 0xc8 + +# CHECK: ldxrb w6, [x1] +# CHECK: ldxrh w6, [x1] +# CHECK: ldxp w7, w3, [x9] +# CHECK: ldxp x7, x3, [x9] + + 0x64 0x7c 0x01 0xc8 + 0x64 0x7c 0x01 0x88 + 0x64 0x7c 0x01 0x08 + 0x64 0x7c 0x01 0x48 + 0x22 0x18 0x21 0xc8 + 0x22 0x18 0x21 0x88 + +# CHECK: stxr w1, x4, [x3] +# CHECK: stxr w1, w4, [x3] +# CHECK: stxrb w1, w4, [x3] +# CHECK: stxrh w1, w4, [x3] +# CHECK: stxp w1, x2, x6, [x1] +# CHECK: stxp w1, w2, w6, [x1] + +#----------------------------------------------------------------------------- +# Load-acquire/Store-release non-exclusive +#----------------------------------------------------------------------------- + + 0xe4 0xff 0xdf 0x88 + 0xe4 0xff 0xdf 0xc8 + 0xe4 0xff 0xdf 0x08 + 0xe4 0xff 0xdf 0x48 + +# CHECK: ldar w4, [sp] +# CHECK: ldar x4, [sp] +# CHECK: ldarb w4, [sp] +# CHECK: ldarh w4, [sp] + + 0xc3 0xfc 0x9f 0x88 + 0xc3 0xfc 0x9f 0xc8 + 0xc3 0xfc 0x9f 0x08 + 0xc3 0xfc 0x9f 0x48 + +# CHECK: stlr w3, [x6] +# CHECK: stlr x3, [x6] +# CHECK: stlrb w3, [x6] +# CHECK: stlrh w3, [x6] + +#----------------------------------------------------------------------------- +# Load-acquire/Store-release exclusive +#----------------------------------------------------------------------------- + + 0x82 0xfc 0x5f 0x88 + 0x82 0xfc 0x5f 0xc8 + 0x82 0xfc 0x5f 0x08 + 0x82 0xfc 0x5f 0x48 + 0x22 0x98 0x7f 0x88 + 0x22 0x98 0x7f 0xc8 + +# CHECK: ldaxr w2, [x4] +# CHECK: ldaxr x2, [x4] +# CHECK: ldaxrb w2, [x4] +# CHECK: ldaxrh w2, [x4] +# CHECK: ldaxp w2, w6, [x1] +# CHECK: ldaxp x2, x6, [x1] + + 0x27 0xfc 0x08 0xc8 + 0x27 0xfc 0x08 0x88 + 0x27 0xfc 0x08 0x08 + 0x27 0xfc 0x08 0x48 + 0x22 0x98 0x21 0xc8 + 0x22 0x98 0x21 0x88 + +# CHECK: stlxr w8, x7, [x1] +# CHECK: stlxr w8, w7, [x1] +# CHECK: stlxrb w8, w7, [x1] +# CHECK: stlxrh w8, w7, [x1] +# CHECK: stlxp w1, x2, x6, [x1] +# CHECK: stlxp w1, w2, w6, [x1] + +#----------------------------------------------------------------------------- +# Load/Store with explicit LSL values +#----------------------------------------------------------------------------- + 0x20 0x78 0xa0 0xb8 + 0x20 0x78 0x60 0xf8 + 0x20 0x78 0x20 0xf8 + 0x20 0x78 0x60 0xb8 + 0x20 0x78 0x20 0xb8 + 0x20 0x78 0xe0 0x3c + 0x20 0x78 0xa0 0x3c + 0x20 0x78 0x60 0xfc + 0x20 0x78 0x20 0xfc + 0x20 0x78 0x60 0xbc + 0x20 0x78 0x20 0xbc + 0x20 0x78 0x60 0x7c + 0x20 0x78 0x60 0x3c + 0x20 0x78 0x60 0x38 + 0x20 0x78 0x20 0x38 + 0x20 0x78 0xe0 0x38 + 0x20 0x78 0x60 0x78 + 0x20 0x78 0x20 0x78 + 0x20 0x78 0xe0 0x78 + 0x20 0x78 0xa0 0x38 + 0x20 0x78 0xa0 0x78 + +# CHECK: ldrsw x0, [x1, x0, lsl #2] +# CHECK: ldr x0, [x1, x0, lsl #3] +# CHECK: str x0, [x1, x0, lsl #3] +# CHECK: ldr w0, [x1, x0, lsl #2] +# CHECK: str w0, [x1, x0, lsl #2] +# CHECK: ldr q0, [x1, x0, lsl #4] +# CHECK: str q0, [x1, x0, lsl #4] +# CHECK: ldr d0, [x1, x0, lsl #3] +# CHECK: str d0, [x1, x0, lsl #3] +# CHECK: ldr s0, [x1, x0, lsl #2] +# CHECK: str s0, [x1, x0, lsl #2] +# CHECK: ldr h0, [x1, x0, lsl #1] +# CHECK: ldr b0, [x1, x0, lsl #0] +# CHECK: ldrb w0, [x1, x0, lsl #0] +# CHECK: strb w0, [x1, x0, lsl #0] +# CHECK: ldrsb w0, [x1, x0, lsl #0] +# CHECK: ldrh w0, [x1, x0, lsl #1] +# CHECK: strh w0, [x1, x0, lsl #1] +# CHECK: ldrsh w0, [x1, x0, lsl #1] +# CHECK: ldrsb x0, [x1, x0, lsl #0] +# CHECK: ldrsh x0, [x1, x0, lsl #1] diff --git a/test/MC/Disassembler/ARM64/scalar-fp.txt b/test/MC/Disassembler/ARM64/scalar-fp.txt new file mode 100644 index 0000000000..b242df5368 --- /dev/null +++ b/test/MC/Disassembler/ARM64/scalar-fp.txt @@ -0,0 +1,255 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#----------------------------------------------------------------------------- +# Floating-point arithmetic +#----------------------------------------------------------------------------- + +0x41 0xc0 0x20 0x1e +0x41 0xc0 0x60 0x1e + +# CHECK: fabs s1, s2 +# CHECK: fabs d1, d2 + +0x41 0x28 0x23 0x1e +0x41 0x28 0x63 0x1e + +# CHECK: fadd s1, s2, s3 +# CHECK: fadd d1, d2, d3 + +0x41 0x18 0x23 0x1e +0x41 0x18 0x63 0x1e + +# CHECK: fdiv s1, s2, s3 +# CHECK: fdiv d1, d2, d3 + +0x41 0x10 0x03 0x1f +0x41 0x10 0x43 0x1f + +# CHECK: fmadd s1, s2, s3, s4 +# CHECK: fmadd d1, d2, d3, d4 + +0x41 0x48 0x23 0x1e +0x41 0x48 0x63 0x1e +0x41 0x68 0x23 0x1e +0x41 0x68 0x63 0x1e + +# CHECK: fmax s1, s2, s3 +# CHECK: fmax d1, d2, d3 +# CHECK: fmaxnm s1, s2, s3 +# CHECK: fmaxnm d1, d2, d3 + +0x41 0x58 0x23 0x1e +0x41 0x58 0x63 0x1e +0x41 0x78 0x23 0x1e +0x41 0x78 0x63 0x1e + +# CHECK: fmin s1, s2, s3 +# CHECK: fmin d1, d2, d3 +# CHECK: fminnm s1, s2, s3 +# CHECK: fminnm d1, d2, d3 + +0x41 0x90 0x03 0x1f +0x41 0x90 0x43 0x1f + +# CHECK: fmsub s1, s2, s3, s4 +# CHECK: fmsub d1, d2, d3, d4 + +0x41 0x08 0x23 0x1e +0x41 0x08 0x63 0x1e + +# CHECK: fmul s1, s2, s3 +# CHECK: fmul d1, d2, d3 + +0x41 0x40 0x21 0x1e +0x41 0x40 0x61 0x1e + +# CHECK: fneg s1, s2 +# CHECK: fneg d1, d2 + +0x41 0x10 0x23 0x1f +0x41 0x10 0x63 0x1f + +# CHECK: fnmadd s1, s2, s3, s4 +# CHECK: fnmadd d1, d2, d3, d4 + +0x41 0x90 0x23 0x1f +0x41 0x90 0x63 0x1f + +# CHECK: fnmsub s1, s2, s3, s4 +# CHECK: fnmsub d1, d2, d3, d4 + +0x41 0x88 0x23 0x1e +0x41 0x88 0x63 0x1e + +# CHECK: fnmul s1, s2, s3 +# CHECK: fnmul d1, d2, d3 + +0x41 0xc0 0x21 0x1e +0x41 0xc0 0x61 0x1e + +# CHECK: fsqrt s1, s2 +# CHECK: fsqrt d1, d2 + +0x41 0x38 0x23 0x1e +0x41 0x38 0x63 0x1e + +# CHECK: fsub s1, s2, s3 +# CHECK: fsub d1, d2, d3 + +#----------------------------------------------------------------------------- +# Floating-point comparison +#----------------------------------------------------------------------------- + +0x20 0x04 0x22 0x1e +0x20 0x04 0x62 0x1e +0x30 0x04 0x22 0x1e +0x30 0x04 0x62 0x1e + +# CHECK: fccmp s1, s2, #0, eq +# CHECK: fccmp d1, d2, #0, eq +# CHECK: fccmpe s1, s2, #0, eq +# CHECK: fccmpe d1, d2, #0, eq + +0x20 0x20 0x22 0x1e +0x20 0x20 0x62 0x1e +0x28 0x20 0x20 0x1e +0x28 0x20 0x60 0x1e +0x30 0x20 0x22 0x1e +0x30 0x20 0x62 0x1e +0x38 0x20 0x20 0x1e +0x38 0x20 0x60 0x1e + +# CHECK: fcmp s1, s2 +# CHECK: fcmp d1, d2 +# CHECK: fcmp s1, #0.0 +# CHECK: fcmp d1, #0.0 +# CHECK: fcmpe s1, s2 +# CHECK: fcmpe d1, d2 +# CHECK: fcmpe s1, #0.0 +# CHECK: fcmpe d1, #0.0 + +#----------------------------------------------------------------------------- +# Floating-point conditional select +#----------------------------------------------------------------------------- + +0x41 0x0c 0x23 0x1e +0x41 0x0c 0x63 0x1e + +# CHECK: fcsel s1, s2, s3, eq +# CHECK: fcsel d1, d2, d3, eq + +#----------------------------------------------------------------------------- +# Floating-point convert +#----------------------------------------------------------------------------- + +0x41 0xc0 0x63 0x1e +0x41 0x40 0x62 0x1e +0x41 0xc0 0xe2 0x1e +0x41 0x40 0xe2 0x1e +0x41 0xc0 0x22 0x1e +0x41 0xc0 0x23 0x1e + +# CHECK: fcvt h1, d2 +# CHECK: fcvt s1, d2 +# CHECK: fcvt d1, h2 +# CHECK: fcvt s1, h2 +# CHECK: fcvt d1, s2 +# CHECK: fcvt h1, s2 + +0x41 0x00 0x44 0x1e +0x41 0x04 0x44 0x1e +0x41 0x00 0x44 0x9e +0x41 0x04 0x44 0x9e +0x41 0x00 0x04 0x1e +0x41 0x04 0x04 0x1e +0x41 0x00 0x04 0x9e +0x41 0x04 0x04 0x9e + +#----------------------------------------------------------------------------- +# Floating-point move +#----------------------------------------------------------------------------- + +0x41 0x00 0x27 0x1e +0x41 0x00 0x26 0x1e +0x41 0x00 0x67 0x9e +0x41 0x00 0x66 0x9e + +# CHECK: fmov s1, w2 +# CHECK: fmov w1, s2 +# CHECK: fmov d1, x2 +# CHECK: fmov x1, d2 + +0x01 0x10 0x28 0x1e +0x01 0x10 0x68 0x1e +0x01 0xf0 0x7b 0x1e +0x01 0xf0 0x6b 0x1e + +# CHECK: fmov s1, #1.250000e-01 +# CHECK: fmov d1, #1.250000e-01 +# CHECK: fmov d1, #-4.843750e-01 +# CHECK: fmov d1, #4.843750e-01 + +0x41 0x40 0x20 0x1e +0x41 0x40 0x60 0x1e + +# CHECK: fmov s1, s2 +# CHECK: fmov d1, d2 + +#----------------------------------------------------------------------------- +# Floating-point round to integral +#----------------------------------------------------------------------------- + +0x41 0x40 0x26 0x1e +0x41 0x40 0x66 0x1e + +# CHECK: frinta s1, s2 +# CHECK: frinta d1, d2 + +0x41 0xc0 0x27 0x1e +0x41 0xc0 0x67 0x1e + +# CHECK: frinti s1, s2 +# CHECK: frinti d1, d2 + +0x41 0x40 0x25 0x1e +0x41 0x40 0x65 0x1e + +# CHECK: frintm s1, s2 +# CHECK: frintm d1, d2 + +0x41 0x40 0x24 0x1e +0x41 0x40 0x64 0x1e + +# CHECK: frintn s1, s2 +# CHECK: frintn d1, d2 + +0x41 0xc0 0x24 0x1e +0x41 0xc0 0x64 0x1e + +# CHECK: frintp s1, s2 +# CHECK: frintp d1, d2 + +0x41 0x40 0x27 0x1e +0x41 0x40 0x67 0x1e + +# CHECK: frintx s1, s2 +# CHECK: frintx d1, d2 + +0x41 0xc0 0x25 0x1e +0x41 0xc0 0x65 0x1e + +# CHECK: frintz s1, s2 +# CHECK: frintz d1, d2 + + 0x00 0x3c 0xe0 0x7e + 0x00 0x8c 0xe0 0x5e + +# CHECK: cmhs d0, d0, d0 +# CHECK: cmtst d0, d0, d0 + +0x00 0x00 0xaf 0x9e +0x00 0x00 0xae 0x9e + +# CHECK: fmov.d v0[1], x0 +# CHECK: fmov.d x0, v0[1] + diff --git a/test/MC/Disassembler/ARM64/system.txt b/test/MC/Disassembler/ARM64/system.txt new file mode 100644 index 0000000000..cefa635845 --- /dev/null +++ b/test/MC/Disassembler/ARM64/system.txt @@ -0,0 +1,58 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + + +#----------------------------------------------------------------------------- +# Hint encodings +#----------------------------------------------------------------------------- + + 0x1f 0x20 0x03 0xd5 +# CHECK: nop + 0x9f 0x20 0x03 0xd5 +# CHECK: sev + 0xbf 0x20 0x03 0xd5 +# CHECK: sevl + 0x5f 0x20 0x03 0xd5 +# CHECK: wfe + 0x7f 0x20 0x03 0xd5 +# CHECK: wfi + 0x3f 0x20 0x03 0xd5 +# CHECK: yield + +#----------------------------------------------------------------------------- +# Single-immediate operand instructions +#----------------------------------------------------------------------------- + + 0x5f 0x3a 0x03 0xd5 +# CHECK: clrex #10 + 0xdf 0x3f 0x03 0xd5 +# CHECK: isb{{$}} + 0xbf 0x33 0x03 0xd5 +# CHECK: dmb osh + 0x9f 0x37 0x03 0xd5 +# CHECK: dsb nsh + +#----------------------------------------------------------------------------- +# Generic system instructions +#----------------------------------------------------------------------------- + 0xff 0x05 0x0a 0xd5 + 0xe7 0x6a 0x0f 0xd5 + 0xf4 0x3f 0x2e 0xd5 + 0xbf 0x40 0x00 0xd5 + 0x00 0x00 0x10 0xd5 + 0x00 0x00 0x30 0xd5 + +# CHECK: sys #2, c0, c5, #7 +# CHECK: sys #7, c6, c10, #7, x7 +# CHECK: sysl x20, #6, c3, c15, #7 +# CHECK: msr SPSel, #0 +# CHECK: msr S2_0_C0_C0_0, x0 +# CHECK: mrs x0, S2_0_C0_C0_0 + + 0x40 0xc0 0x1e 0xd5 + 0x40 0xc0 0x1a 0xd5 + 0x40 0xc0 0x19 0xd5 + +# CHECK: msr RMR_EL3, x0 +# CHECK: msr RMR_EL2, x0 +# CHECK: msr RMR_EL1, x0 + diff --git a/test/MC/MachO/ARM64/darwin-ARM64-local-label-diff.s b/test/MC/MachO/ARM64/darwin-ARM64-local-label-diff.s new file mode 100644 index 0000000000..d98c257c85 --- /dev/null +++ b/test/MC/MachO/ARM64/darwin-ARM64-local-label-diff.s @@ -0,0 +1,21 @@ +; RUN: llvm-mc -triple arm64-apple-darwin -filetype=obj -o - < %s | macho-dump -dump-section-data | FileCheck %s +; rdar://13028719 + + .globl context_save0 + .align 6 +Lcontext_save0: +context_save0: + .fill 2, 8, 5 +Lcontext_save0_end: +Lcontext_save0_size: .quad (Lcontext_save0_end - Lcontext_save0) + + .align 6 +Lcontext_save1: + .fill 2, 8, 0 +Lcontext_save1_end: +Lcontext_save1_size: .quad (Lcontext_save1_end - Lcontext_save1) + +Llockup_release: + .quad 0 + +; CHECK: ('_section_data', '05000000 00000000 05000000 00000000 10000000 00000000 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 1f2003d5 00000000 00000000 00000000 00000000 10000000 00000000 00000000 00000000') diff --git a/test/MC/MachO/ARM64/darwin-ARM64-reloc.s b/test/MC/MachO/ARM64/darwin-ARM64-reloc.s new file mode 100644 index 0000000000..7f586aedd6 --- /dev/null +++ b/test/MC/MachO/ARM64/darwin-ARM64-reloc.s @@ -0,0 +1,157 @@ +; RUN: llvm-mc -n -triple arm64-apple-darwin10 %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s + + .text +_fred: + bl _func + bl _func + 20 + + adrp x3, _data@page + ldr w2, [x3, _data@pageoff] + + add x3, x3, _data@pageoff + 4 + + adrp x3, _data@page+1 + ldr w2, [x3, _data@pageoff + 4] + + adrp x3, _data_ext@gotpage + ldr w2, [x3, _data_ext@gotpageoff] + + .data +_data: + .quad _foo + .quad _foo + 4 + .quad _foo - _bar + .quad _foo - _bar + 4 + + .long _foo - _bar + + .quad _foo@got + .long _foo@got - . + + +; CHECK: ('cputype', 16777228) +; CHECK: ('cpusubtype', 0) +; CHECK: ('filetype', 1) +; CHECK: ('num_load_commands', 3) +; CHECK: ('load_commands_size', 336) +; CHECK: ('flag', 0) +; CHECK: ('reserved', 0) +; CHECK: ('load_commands', [ +; CHECK: # Load Command 0 +; CHECK: (('command', 25) +; CHECK: ('size', 232) +; CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +; CHECK: ('vm_addr', 0) +; CHECK: ('vm_size', 84) +; CHECK: ('file_offset', 368) +; CHECK: ('file_size', 84) +; CHECK: ('maxprot', 7) +; CHECK: ('initprot', 7) +; CHECK: ('num_sections', 2) +; CHECK: ('flags', 0) +; CHECK: ('sections', [ +; CHECK: # Section 0 +; CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +; CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +; CHECK: ('address', 0) +; CHECK: ('size', 36) +; CHECK: ('offset', 368) +; CHECK: ('alignment', 0) +; CHECK: ('reloc_offset', 452) +; CHECK: ('num_reloc', 13) +; CHECK: ('flags', 0x80000400) +; CHECK: ('reserved1', 0) +; CHECK: ('reserved2', 0) +; CHECK: ('reserved3', 0) +; CHECK: ), +; CHECK: ('_relocations', [ +; CHECK: # Relocation 0 +; CHECK: (('word-0', 0x20), +; CHECK: ('word-1', 0x6c000005)), +; CHECK: # Relocation 1 +; CHECK: (('word-0', 0x1c), +; CHECK: ('word-1', 0x5d000005)), +; CHECK: # Relocation 2 +; CHECK: (('word-0', 0x18), +; CHECK: ('word-1', 0xa4000004)), +; CHECK: # Relocation 3 +; CHECK: (('word-0', 0x18), +; CHECK: ('word-1', 0x4c000002)), +; CHECK: # Relocation 4 +; CHECK: (('word-0', 0x14), +; CHECK: ('word-1', 0xa4000001)), +; CHECK: # Relocation 5 +; CHECK: (('word-0', 0x14), +; CHECK: ('word-1', 0x3d000002)), +; CHECK: # Relocation 6 +; CHECK: (('word-0', 0x10), +; CHECK: ('word-1', 0xa4000004)), +; CHECK: # Relocation 7 +; CHECK: (('word-0', 0x10), +; CHECK: ('word-1', 0x4c000002)), +; CHECK: # Relocation 8 +; CHECK: (('word-0', 0xc), +; CHECK: ('word-1', 0x4c000002)), +; CHECK: # Relocation 9 +; CHECK: (('word-0', 0x8), +; CHECK: ('word-1', 0x3d000002)), +; CHECK: # Relocation 10 +; CHECK: (('word-0', 0x4), +; CHECK: ('word-1', 0xa4000014)), +; CHECK: # Relocation 11 +; CHECK: (('word-0', 0x4), +; CHECK: ('word-1', 0x2d000007)), +; CHECK: # Relocation 12 +; CHECK: (('word-0', 0x0), +; CHECK: ('word-1', 0x2d000007)), +; CHECK: ]) +; CHECK: ('_section_data', '00000094 00000094 03000090 620040b9 63000091 03000090 620040b9 03000090 620040b9') +; CHECK: # Section 1 +; CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +; CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +; CHECK: ('address', 36) +; CHECK: ('size', 48) +; CHECK: ('offset', 404) +; CHECK: ('alignment', 0) +; CHECK: ('reloc_offset', 556) +; CHECK: ('num_reloc', 10) +; CHECK: ('flags', 0x0) +; CHECK: ('reserved1', 0) +; CHECK: ('reserved2', 0) +; CHECK: ('reserved3', 0) +; CHECK: ), +; CHECK: ('_relocations', [ +; CHECK: # Relocation 0 +; CHECK: (('word-0', 0x2c), +; CHECK: ('word-1', 0x7d000006)), +; CHECK: # Relocation 1 +; CHECK: (('word-0', 0x24), +; CHECK: ('word-1', 0x7e000006)), +; CHECK: # Relocation 2 +; CHECK: (('word-0', 0x20), +; CHECK: ('word-1', 0x1c000004)), +; CHECK: # Relocation 3 +; CHECK: (('word-0', 0x20), +; CHECK: ('word-1', 0xc000006)), +; CHECK: # Relocation 4 +; CHECK: (('word-0', 0x18), +; CHECK: ('word-1', 0x1e000004)), +; CHECK: # Relocation 5 +; CHECK: (('word-0', 0x18), +; CHECK: ('word-1', 0xe000006)), +; CHECK: # Relocation 6 +; CHECK: (('word-0', 0x10), +; CHECK: ('word-1', 0x1e000004)), +; CHECK: # Relocation 7 +; CHECK: (('word-0', 0x10), +; CHECK: ('word-1', 0xe000006)), +; CHECK: # Relocation 8 +; CHECK: (('word-0', 0x8), +; CHECK: ('word-1', 0xe000006)), +; CHECK: # Relocation 9 +; CHECK: (('word-0', 0x0), +; CHECK: ('word-1', 0xe000006)), +; CHECK: ]) +; CHECK: ('_section_data', '00000000 00000000 04000000 00000000 00000000 00000000 04000000 00000000 00000000 00000000 00000000 d4ffffff') +; CHECK: ]) +; CHECK: ), diff --git a/test/MC/MachO/ARM64/lit.local.cfg b/test/MC/MachO/ARM64/lit.local.cfg new file mode 100644 index 0000000000..a75a42b6f7 --- /dev/null +++ b/test/MC/MachO/ARM64/lit.local.cfg @@ -0,0 +1,4 @@ +targets = set(config.root.targets_to_build.split()) +if not 'ARM64' in targets: + config.unsupported = True + |