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author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-05-15 15:07:06 +0000 |
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committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-05-15 15:07:06 +0000 |
commit | 9122396a4dea52cf917062782fc2f39c7dc698bb (patch) | |
tree | 5a54ae3605d13a5a8617bce46e8ac69f5748943f /test/MC | |
parent | ddbf053a4cad58393a389f264c51923111eba3db (diff) | |
download | llvm-9122396a4dea52cf917062782fc2f39c7dc698bb.tar.gz llvm-9122396a4dea52cf917062782fc2f39c7dc698bb.tar.bz2 llvm-9122396a4dea52cf917062782fc2f39c7dc698bb.tar.xz |
[PowerPC] Remove need for adjustFixupOffst hack
Now that applyFixup understands differently-sized fixups, we can define
fixup_ppc_lo16/fixup_ppc_lo16_ds/fixup_ppc_ha16 to properly be 2-byte
fixups, applied at an offset of 2 relative to the start of the
instruction text.
This has the benefit that if we actually need to generate a real
relocation record, its address will come out correctly automatically,
without having to fiddle with the offset in adjustFixupOffset.
Tested on both 64-bit and 32-bit PowerPC, using external and
integrated assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181894 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
-rw-r--r-- | test/MC/PowerPC/ppc64-fixups.s | 84 |
1 files changed, 42 insertions, 42 deletions
diff --git a/test/MC/PowerPC/ppc64-fixups.s b/test/MC/PowerPC/ppc64-fixups.s index 281dce3f9e..06b2ffd303 100644 --- a/test/MC/PowerPC/ppc64-fixups.s +++ b/test/MC/PowerPC/ppc64-fixups.s @@ -8,113 +8,113 @@ # FIXME: .TOC.@tocbase # CHECK: li 3, target@l # encoding: [0x38,0x60,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_ADDR16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 li 3, target@l # CHECK: addis 3, 3, target@ha # encoding: [0x3c,0x63,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@ha, kind: fixup_ppc_ha16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_ADDR16_HA target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0 addis 3, 3, target@ha # CHECK: lis 3, target@ha # encoding: [0x3c,0x60,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@ha, kind: fixup_ppc_ha16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_ADDR16_HA target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0 lis 3, target@ha # CHECK: addi 4, 3, target@l # encoding: [0x38,0x83,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_ADDR16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 addi 4, 3, target@l # CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_ADDR16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 lwz 1, target@l(3) # CHECK: ld 1, target@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] -# CHECK-NEXT: # fixup A - offset: 0, value: target@l, kind: fixup_ppc_lo16_ds -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_ADDR16_LO_DS target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_lo16_ds +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO_DS target 0x0 ld 1, target@l(3) # CHECK: ld 1, target@toc(2) # encoding: [0xe8,0x22,A,0bAAAAAA00] -# CHECK-NEXT: # fixup A - offset: 0, value: target@toc, kind: fixup_ppc_lo16_ds -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@toc, kind: fixup_ppc_lo16_ds +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_DS target 0x0 ld 1, target@toc(2) # CHECK: addis 3, 2, target@toc@ha # encoding: [0x3c,0x62,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@toc@ha, kind: fixup_ppc_ha16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@ha, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HA target 0x0 addis 3, 2, target@toc@ha # CHECK: addi 4, 3, target@toc@l # encoding: [0x38,0x83,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@toc@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0 addi 4, 3, target@toc@l # CHECK: lwz 1, target@toc@l(3) # encoding: [0x80,0x23,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@toc@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0 lwz 1, target@toc@l(3) # CHECK: ld 1, target@toc@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] -# CHECK-NEXT: # fixup A - offset: 0, value: target@toc@l, kind: fixup_ppc_lo16_ds -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_lo16_ds +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO_DS target 0x0 ld 1, target@toc@l(3) # FIXME: @tls # CHECK: addis 3, 2, target@tprel@ha # encoding: [0x3c,0x62,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@tprel@ha, kind: fixup_ppc_ha16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@ha, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HA target 0x0 addis 3, 2, target@tprel@ha # CHECK: addi 3, 3, target@tprel@l # encoding: [0x38,0x63,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@tprel@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO target 0x0 addi 3, 3, target@tprel@l # CHECK: addis 3, 2, target@dtprel@ha # encoding: [0x3c,0x62,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@dtprel@ha, kind: fixup_ppc_ha16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_HA target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@ha, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HA target 0x0 addis 3, 2, target@dtprel@ha # CHECK: addi 3, 3, target@dtprel@l # encoding: [0x38,0x63,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@dtprel@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO target 0x0 addi 3, 3, target@dtprel@l # CHECK: addis 3, 2, target@got@tprel@ha # encoding: [0x3c,0x62,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@got@tprel@ha, kind: fixup_ppc_ha16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_HA target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@ha, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HA target 0x0 addis 3, 2, target@got@tprel@ha # CHECK: ld 1, target@got@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00] -# CHECK-NEXT: # fixup A - offset: 0, value: target@got@tprel@l, kind: fixup_ppc_lo16_ds -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_LO_DS target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_lo16_ds +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0 ld 1, target@got@tprel@l(3) # CHECK: addis 3, 2, target@got@tlsgd@ha # encoding: [0x3c,0x62,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@got@tlsgd@ha, kind: fixup_ppc_ha16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_HA target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@ha, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HA target 0x0 addis 3, 2, target@got@tlsgd@ha # CHECK: addi 3, 3, target@got@tlsgd@l # encoding: [0x38,0x63,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@got@tlsgd@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_LO target 0x0 addi 3, 3, target@got@tlsgd@l # CHECK: addis 3, 2, target@got@tlsld@ha # encoding: [0x3c,0x62,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@got@tlsld@ha, kind: fixup_ppc_ha16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_HA target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@ha, kind: fixup_ppc_ha16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HA target 0x0 addis 3, 2, target@got@tlsld@ha # CHECK: addi 3, 3, target@got@tlsld@l # encoding: [0x38,0x63,A,A] -# CHECK-NEXT: # fixup A - offset: 0, value: target@got@tlsld@l, kind: fixup_ppc_lo16 -# CHECK-REL: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_LO target 0x0 +# CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@l, kind: fixup_ppc_lo16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_LO target 0x0 addi 3, 3, target@got@tlsld@l |