diff options
author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-02-08 23:17:02 +0000 |
---|---|---|
committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-02-08 23:17:02 +0000 |
commit | 91ec991b45cd16b73e3394ee2479592d716d68bd (patch) | |
tree | e6589f4ba771b4a971ce2b4985638c2606999d4a /test/MC | |
parent | 846acbeef17fd6df7f389c034ada5c490d006d76 (diff) | |
download | llvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.gz llvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.bz2 llvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.xz |
ARM: change attribute tests to use parsed form
This makes the tests more readable by using the -arm-attributes decoding support
in llvm-readobj since that is now available. Change the invocation commands to
be similar to other test and use a more precise triple (the tests only require
ARM EABI support).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201029 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
28 files changed, 640 insertions, 525 deletions
diff --git a/test/MC/ARM/directive-arch-armv2.s b/test/MC/ARM/directive-arch-armv2.s index 177bc2dfde..40857ca9fa 100644 --- a/test/MC/ARM/directive-arch-armv2.s +++ b/test/MC/ARM/directive-arch-armv2.s @@ -3,28 +3,28 @@ @ This test case will check the default .ARM.attributes value for the @ armv2 architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv2 @ CHECK-ASM: .arch armv2 -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 23 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05320006 010801 |.2.....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv2a.s b/test/MC/ARM/directive-arch-armv2a.s index 6192321282..62c2ace796 100644 --- a/test/MC/ARM/directive-arch-armv2a.s +++ b/test/MC/ARM/directive-arch-armv2a.s @@ -3,28 +3,28 @@ @ This test case will check the default .ARM.attributes value for the @ armv2a architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv2a @ CHECK-ASM: .arch armv2a -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 24 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05324100 06010801 |.2A.....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 2A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv3.s b/test/MC/ARM/directive-arch-armv3.s index 2203d92401..41cce65924 100644 --- a/test/MC/ARM/directive-arch-armv3.s +++ b/test/MC/ARM/directive-arch-armv3.s @@ -3,28 +3,28 @@ @ This test case will check the default .ARM.attributes value for the @ armv3 architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv3 @ CHECK-ASM: .arch armv3 -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 23 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05330006 010801 |.3.....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 3 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv3m.s b/test/MC/ARM/directive-arch-armv3m.s index 2f85c44fc1..8041da2e1e 100644 --- a/test/MC/ARM/directive-arch-armv3m.s +++ b/test/MC/ARM/directive-arch-armv3m.s @@ -3,28 +3,28 @@ @ This test case will check the default .ARM.attributes value for the @ armv3m architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv3m @ CHECK-ASM: .arch armv3m -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 24 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05334D00 06010801 |.3M.....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 3M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv4.s b/test/MC/ARM/directive-arch-armv4.s index c84a84b6e1..fb83842840 100644 --- a/test/MC/ARM/directive-arch-armv4.s +++ b/test/MC/ARM/directive-arch-armv4.s @@ -3,32 +3,30 @@ @ This test case will check the default .ARM.attributes value for the @ armv4 architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv4 @ CHECK-ASM: .arch armv4 -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x{{[0-9A-F]*}} -@ CHECK-OBJ: Size: 23 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05340006 010801 |.4.....| -@ CHECK-OBJ: ) - +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } @ Check that multiplication is supported mul r4, r5, r6 @@ -37,3 +35,4 @@ umull r4, r5, r6, r3 smlal r4, r5, r6, r3 umlal r4, r5, r6, r3 + diff --git a/test/MC/ARM/directive-arch-armv4t.s b/test/MC/ARM/directive-arch-armv4t.s index 6ff8871f34..33a5ae3857 100644 --- a/test/MC/ARM/directive-arch-armv4t.s +++ b/test/MC/ARM/directive-arch-armv4t.s @@ -3,28 +3,32 @@ @ This test case will check the default .ARM.attributes value for the @ armv4t architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv4t @ CHECK-ASM: .arch armv4t -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 26 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05345400 06020801 0901 |.4T.......| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 4T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v4T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv5.s b/test/MC/ARM/directive-arch-armv5.s index 8ed0c51217..73a8c95db7 100644 --- a/test/MC/ARM/directive-arch-armv5.s +++ b/test/MC/ARM/directive-arch-armv5.s @@ -3,28 +3,28 @@ @ This test case will check the default .ARM.attributes value for the @ armv5 architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv5 @ CHECK-ASM: .arch armv5 -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 23 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05350006 030801 |.5.....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 5 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv5t.s b/test/MC/ARM/directive-arch-armv5t.s index 5176850b86..66a75c4c89 100644 --- a/test/MC/ARM/directive-arch-armv5t.s +++ b/test/MC/ARM/directive-arch-armv5t.s @@ -3,28 +3,32 @@ @ This test case will check the default .ARM.attributes value for the @ armv5t architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv5t @ CHECK-ASM: .arch armv5t -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 26 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05355400 06030801 0901 |.5T.......| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 5T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5T +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv5te.s b/test/MC/ARM/directive-arch-armv5te.s index 2320f287f0..f3932d84a5 100644 --- a/test/MC/ARM/directive-arch-armv5te.s +++ b/test/MC/ARM/directive-arch-armv5te.s @@ -3,28 +3,32 @@ @ This test case will check the default .ARM.attributes value for the @ armv5te architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv5te @ CHECK-ASM: .arch armv5te -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 27 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05355445 00060408 010901 |.5TE.......| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 5TE +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5TE +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6-m.s b/test/MC/ARM/directive-arch-armv6-m.s index fc70827903..d89a627740 100644 --- a/test/MC/ARM/directive-arch-armv6-m.s +++ b/test/MC/ARM/directive-arch-armv6-m.s @@ -3,28 +3,28 @@ @ This test case will check the default .ARM.attributes value for the @ armv6-m architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv6-m @ CHECK-ASM: .arch armv6-m -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 25 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05362D4D 00060B09 01 |.6-M.....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6-M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6-M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6.s b/test/MC/ARM/directive-arch-armv6.s index dbac712672..fb48920735 100644 --- a/test/MC/ARM/directive-arch-armv6.s +++ b/test/MC/ARM/directive-arch-armv6.s @@ -3,28 +3,32 @@ @ This test case will check the default .ARM.attributes value for the @ armv6 architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv6 @ CHECK-ASM: .arch armv6 -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 25 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05360006 06080109 01 |.6.......| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6j.s b/test/MC/ARM/directive-arch-armv6j.s index 619e8d3e30..e27beef1eb 100644 --- a/test/MC/ARM/directive-arch-armv6j.s +++ b/test/MC/ARM/directive-arch-armv6j.s @@ -3,28 +3,32 @@ @ This test case will check the default .ARM.attributes value for the @ armv6j architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv6j @ CHECK-ASM: .arch armv6j -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 26 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05364A00 06060801 0901 |.6J.......| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6J +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6t2.s b/test/MC/ARM/directive-arch-armv6t2.s index ce55df792f..85f4491b0c 100644 --- a/test/MC/ARM/directive-arch-armv6t2.s +++ b/test/MC/ARM/directive-arch-armv6t2.s @@ -3,28 +3,32 @@ @ This test case will check the default .ARM.attributes value for the @ armv6t2 architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv6t2 @ CHECK-ASM: .arch armv6t2 -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 27 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05365432 00060808 010902 |.6T2.......| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6T2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6T2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6z.s b/test/MC/ARM/directive-arch-armv6z.s index ac7751d22a..78a9ab1d5d 100644 --- a/test/MC/ARM/directive-arch-armv6z.s +++ b/test/MC/ARM/directive-arch-armv6z.s @@ -3,28 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ armv6z architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv6z @ CHECK-ASM: .arch armv6z -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 28 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411B0000 00616561 62690001 11000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05365A00 06070801 09014401 |.6Z.......D.| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6Z +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6KZ +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: Virtualization_use +@ CHECK-ATTR: Description: TrustZone +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv6zk.s b/test/MC/ARM/directive-arch-armv6zk.s index 7cdb9091a8..48d9cc1a2b 100644 --- a/test/MC/ARM/directive-arch-armv6zk.s +++ b/test/MC/ARM/directive-arch-armv6zk.s @@ -3,28 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ armv6zk architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv6zk @ CHECK-ASM: .arch armv6zk -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 29 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05365A4B 00060708 01090144 01 |.6ZK.......D.| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 6ZK +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v6KZ +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: Virtualization_use +@ CHECK-ATTR: Description: TrustZone +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7-a.s b/test/MC/ARM/directive-arch-armv7-a.s index 58571cbe0a..792429a4e0 100644 --- a/test/MC/ARM/directive-arch-armv7-a.s +++ b/test/MC/ARM/directive-arch-armv7-a.s @@ -3,28 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ armv7-a architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv7-a @ CHECK-ASM: .arch armv7-a -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 29 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Application +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7-m.s b/test/MC/ARM/directive-arch-armv7-m.s index 6533cc6b8e..058f23ba2b 100644 --- a/test/MC/ARM/directive-arch-armv7-m.s +++ b/test/MC/ARM/directive-arch-armv7-m.s @@ -3,28 +3,32 @@ @ This test case will check the default .ARM.attributes value for the @ armv7-m architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv7-m @ CHECK-ASM: .arch armv7-m -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 27 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Microcontroller +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7-r.s b/test/MC/ARM/directive-arch-armv7-r.s index 2aa702c906..99481f70c5 100644 --- a/test/MC/ARM/directive-arch-armv7-r.s +++ b/test/MC/ARM/directive-arch-armv7-r.s @@ -3,28 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ armv7-r architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv7-r @ CHECK-ASM: .arch armv7-r -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 29 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-R +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Real-time +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7.s b/test/MC/ARM/directive-arch-armv7.s index 5d8f2ca321..0cd499666e 100644 --- a/test/MC/ARM/directive-arch-armv7.s +++ b/test/MC/ARM/directive-arch-armv7.s @@ -3,28 +3,28 @@ @ This test case will check the default .ARM.attributes value for the @ armv7 architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv7 @ CHECK-ASM: .arch armv7 -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 23 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05370006 0A0902 |.7.....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7a.s b/test/MC/ARM/directive-arch-armv7a.s index ceb6277b7a..3bb202fb27 100644 --- a/test/MC/ARM/directive-arch-armv7a.s +++ b/test/MC/ARM/directive-arch-armv7a.s @@ -3,28 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ armv7-a architecture when using the armv7a alias. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv7a @ CHECK-ASM: .arch armv7-a -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 29 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Application +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7m.s b/test/MC/ARM/directive-arch-armv7m.s index e18b028726..0e9f546387 100644 --- a/test/MC/ARM/directive-arch-armv7m.s +++ b/test/MC/ARM/directive-arch-armv7m.s @@ -3,28 +3,32 @@ @ This test case will check the default .ARM.attributes value for the @ armv7-m architecture when using the armv7m alias. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv7m @ CHECK-ASM: .arch armv7-m -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 27 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-M +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Microcontroller +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv7r.s b/test/MC/ARM/directive-arch-armv7r.s index 2a10c6ee7d..9009d13412 100644 --- a/test/MC/ARM/directive-arch-armv7r.s +++ b/test/MC/ARM/directive-arch-armv7r.s @@ -3,28 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ armv7-r architecture when using the armv7r alias. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv7r @ CHECK-ASM: .arch armv7-r -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 29 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-R +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Real-time +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv8-a.s b/test/MC/ARM/directive-arch-armv8-a.s index 33e0b586ef..636378155e 100644 --- a/test/MC/ARM/directive-arch-armv8-a.s +++ b/test/MC/ARM/directive-arch-armv8-a.s @@ -3,29 +3,44 @@ @ This test case will check the default .ARM.attributes value for the @ armv8-a architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv8-a @ CHECK-ASM: .arch armv8-a -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 33 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......| -@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D| -@ CHECK-OBJ: 0020: 03 |.| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 8-A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v8 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Application +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: MPextension_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: Virtualization_use +@ CHECK-ATTR: Description: TrustZone + Virtualization Extensions +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-armv8a.s b/test/MC/ARM/directive-arch-armv8a.s index c3fae4e9cb..4a1915c534 100644 --- a/test/MC/ARM/directive-arch-armv8a.s +++ b/test/MC/ARM/directive-arch-armv8a.s @@ -3,29 +3,44 @@ @ This test case will check the default .ARM.attributes value for the @ armv8-a architecture when using the armv8a alias. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv8a @ CHECK-ASM: .arch armv8-a -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 33 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......| -@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D| -@ CHECK-OBJ: 0020: 03 |.| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 8-A +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v8 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Application +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: MPextension_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: Virtualization_use +@ CHECK-ATTR: Description: TrustZone + Virtualization Extensions +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-iwmmxt.s b/test/MC/ARM/directive-arch-iwmmxt.s index 53365afb95..db25ec683f 100644 --- a/test/MC/ARM/directive-arch-iwmmxt.s +++ b/test/MC/ARM/directive-arch-iwmmxt.s @@ -3,28 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ iwmmxt architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch iwmmxt @ CHECK-ASM: .arch iwmmxt -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 32 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411F0000 00616561 62690001 15000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 0549574D 4D585400 06040801 09010B01 |.IWMMXT.........| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: IWMMXT +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5TE +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: WMMX_arch +@ CHECK-ATTR: Description: WMMXv1 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-arch-iwmmxt2.s b/test/MC/ARM/directive-arch-iwmmxt2.s index d71098f79c..de94f97b44 100644 --- a/test/MC/ARM/directive-arch-iwmmxt2.s +++ b/test/MC/ARM/directive-arch-iwmmxt2.s @@ -3,29 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ iwmmxt2 architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch iwmmxt2 @ CHECK-ASM: .arch iwmmxt2 -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 33 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......| -@ CHECK-OBJ: 0010: 0549574D 4D585432 00060408 0109010B |.IWMMXT2........| -@ CHECK-OBJ: 0020: 02 |.| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: IWMMXT2 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v5TE +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-1 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: WMMX_arch +@ CHECK-ATTR: Description: WMMXv2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + diff --git a/test/MC/ARM/directive-eabi_attribute-overwrite.s b/test/MC/ARM/directive-eabi_attribute-overwrite.s index 3e257dbe9d..6fdded3d83 100644 --- a/test/MC/ARM/directive-eabi_attribute-overwrite.s +++ b/test/MC/ARM/directive-eabi_attribute-overwrite.s @@ -1,5 +1,5 @@ -@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -s -sd \ -@ RUN: | FileCheck %s +@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .thumb @@ -7,12 +7,11 @@ .eabi_attribute Tag_compatibility, 1 .eabi_attribute Tag_compatibility, 1, "aeabi" -@ CHECK: Section { -@ CHECK: Name: .ARM.attributes -@ CHECK: Type: SHT_ARM_ATTRIBUTES -@ CHECK: SectionData ( -@ CHECK: 0000: 41170000 00616561 62690001 0D000000 -@ CHECK: 0010: 20014145 41424900 -@ CHECK: ) -@ CHECK: } +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: Value: 1, AEABI +@ CHECK-ATTR: TagName: compatibility +@ CHECK-ATTR: Description: AEABI Conformant +@ CHECK-ATTR: } +@ CHECK-ATTR: } diff --git a/test/MC/ARM/directive-fpu-multiple.s b/test/MC/ARM/directive-fpu-multiple.s index 6a93f24682..de2baaf271 100644 --- a/test/MC/ARM/directive-fpu-multiple.s +++ b/test/MC/ARM/directive-fpu-multiple.s @@ -3,24 +3,16 @@ @ The later .fpu directive should overwrite the earlier one. @ See also: directive-fpu-multiple2.s. -@ RUN: llvm-mc < %s -triple arm-unknown-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s | llvm-readobj -arm-attributes \ +@ RUN: | FileCheck %s -check-prefix CHECK-ATTR .fpu neon .fpu vfpv4 -@ CHECK: Name: .ARM.attributes -@ CHECK-NEXT: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-NEXT: Flags [ (0x0) -@ CHECK-NEXT: ] -@ CHECK-NEXT: Address: 0x0 -@ CHECK-NEXT: Offset: 0x34 -@ CHECK-NEXT: Size: 18 -@ CHECK-NEXT: Link: 0 -@ CHECK-NEXT: Info: 0 -@ CHECK-NEXT: AddressAlignment: 1 -@ CHECK-NEXT: EntrySize: 0 -@ CHECK-NEXT: SectionData ( -@ CHECK-NEXT: 0000: 41110000 00616561 62690001 07000000 -@ CHECK-NEXT: 0010: 0A05 -@ CHECK-NEXT: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: FP_arch +@ CHECK-ATTR: Description: VFPv4 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + |