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| author | Vladimir Medic <Vladimir.Medic@imgtec.com> | 2014-03-03 13:12:59 +0000 |
|---|---|---|
| committer | Vladimir Medic <Vladimir.Medic@imgtec.com> | 2014-03-03 13:12:59 +0000 |
| commit | afa6150f04d2f2498fade39a2deee901966c9e11 (patch) | |
| tree | f027f8d8c7a411bbe796dbce572990b601e049a7 /test/MC | |
| parent | 75c86c9e9ad1b5e4f31fd78b819ef9e45caa5b6b (diff) | |
| download | llvm-afa6150f04d2f2498fade39a2deee901966c9e11.tar.gz llvm-afa6150f04d2f2498fade39a2deee901966c9e11.tar.bz2 llvm-afa6150f04d2f2498fade39a2deee901966c9e11.tar.xz | |
This patch implements jalx instruction for Mips architecture.This instruction executes a procedure call within the current 256 MB-aligned region and change the ISA Mode from MIPS32 to microMIPS32 or MIPS16e. Usage samples for assembler and dissasembler are provided as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202706 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
| -rw-r--r-- | test/MC/Disassembler/Mips/mips32.txt | 3 | ||||
| -rw-r--r-- | test/MC/Disassembler/Mips/mips32_le.txt | 3 | ||||
| -rw-r--r-- | test/MC/Disassembler/Mips/mips32r2.txt | 3 | ||||
| -rw-r--r-- | test/MC/Disassembler/Mips/mips32r2_le.txt | 3 | ||||
| -rw-r--r-- | test/MC/Mips/mips-jump-instructions.s | 12 |
5 files changed, 23 insertions, 1 deletions
diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt index 6d02925ff7..bfb145e395 100644 --- a/test/MC/Disassembler/Mips/mips32.txt +++ b/test/MC/Disassembler/Mips/mips32.txt @@ -206,6 +206,9 @@ # CHECK: jal 1328 0x0c 0x00 0x01 0x4c +# CHECK: jalx 1328 +0x74 0x00 0x01 0x4c + # CHECK: jalr $7 0x00 0xe0 0xf8 0x09 diff --git a/test/MC/Disassembler/Mips/mips32_le.txt b/test/MC/Disassembler/Mips/mips32_le.txt index 61e6fc868d..533fc69598 100644 --- a/test/MC/Disassembler/Mips/mips32_le.txt +++ b/test/MC/Disassembler/Mips/mips32_le.txt @@ -206,6 +206,9 @@ # CHECK: jal 1328 0x4c 0x01 0x00 0x0c +# CHECK: jalx 1328 +0x4c 0x01 0x00 0x74 + # CHECK: jalr $7 0x09 0xf8 0xe0 0x00 diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt index 11d9058221..299f6f0c8a 100644 --- a/test/MC/Disassembler/Mips/mips32r2.txt +++ b/test/MC/Disassembler/Mips/mips32r2.txt @@ -215,6 +215,9 @@ # CHECK: jal 1328 0x0c 0x00 0x01 0x4c +# CHECK: jalx 1328 +0x74 0x00 0x01 0x4c + # CHECK: jalr $7 0x00 0xe0 0xf8 0x09 diff --git a/test/MC/Disassembler/Mips/mips32r2_le.txt b/test/MC/Disassembler/Mips/mips32r2_le.txt index adafcf1258..0362ca6d8d 100644 --- a/test/MC/Disassembler/Mips/mips32r2_le.txt +++ b/test/MC/Disassembler/Mips/mips32r2_le.txt @@ -215,6 +215,9 @@ # CHECK: jal 1328 0x4c 0x01 0x00 0x0c +# CHECK: jalx 1328 +0x4c 0x01 0x00 0x74 + # CHECK: jalr $7 0x09 0xf8 0xe0 0x00 diff --git a/test/MC/Mips/mips-jump-instructions.s b/test/MC/Mips/mips-jump-instructions.s index 989826a1a2..596c8a2f76 100644 --- a/test/MC/Mips/mips-jump-instructions.s +++ b/test/MC/Mips/mips-jump-instructions.s @@ -101,12 +101,16 @@ end_of_code: # CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK32: jr $7 # encoding: [0x08,0x00,0xe0,0x00] # CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32:lab: # CHECK32: jr $7 # encoding: [0x08,0x00,0xe0,0x00] # CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK32: jalr $25 # encoding: [0x09,0xf8,0x20,0x03] # CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK32: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03] # CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jalx lab # encoding: [A,A,A,0b011101AA] +# CHECK32: # fixup A - offset: 0, value: lab, kind: fixup_Mips_26 +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK64: j 1328 # encoding: [0x4c,0x01,0x00,0x08] # CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] @@ -120,13 +124,16 @@ end_of_code: # CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK64: jr $7 # encoding: [0x08,0x00,0xe0,0x00] # CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64:lab: # CHECK64: jr $7 # encoding: [0x08,0x00,0xe0,0x00] # CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK64: jalr $25 # encoding: [0x09,0xf8,0x20,0x03] # CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK64: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03] # CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] - +# CHECK64: jalx lab # encoding: [A,A,A,0b011101AA] +# CHECK64: # fixup A - offset: 0, value: lab, kind: fixup_Mips_26 +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] j 1328 nop @@ -140,9 +147,12 @@ end_of_code: nop jr $7 nop +lab: j $7 nop jal $25 nop jal $4,$25 nop + jalx lab + nop |