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authorDaniel Dunbar <daniel@zuster.org>2009-08-14 03:48:55 +0000
committerDaniel Dunbar <daniel@zuster.org>2009-08-14 03:48:55 +0000
commitc22e0b2443afdedb6d9b225b938ad404d63cdbe6 (patch)
tree63f7975e72d90fa0fb45f05c4593608fa0550f17 /test/MC
parent575327b77e9092074e5d18bfebfb78ce550aa2a3 (diff)
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Update llvm-mc / MCAsmStreamer to print the instruction using the actual target
specific printer (this only works on x86, for now). - This makes it possible to do some correctness checking of the parsing and matching, since we can compare the results of 'as' on the original input, to those of 'as' on the output from llvm-mc. - In theory, we could now have an easy ATT -> Intel syntax converter. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78986 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
-rw-r--r--test/MC/AsmParser/labels.s6
-rw-r--r--test/MC/AsmParser/x86_instructions.s34
-rw-r--r--test/MC/AsmParser/x86_operands.s64
3 files changed, 63 insertions, 41 deletions
diff --git a/test/MC/AsmParser/labels.s b/test/MC/AsmParser/labels.s
index d4c80315a4..c9cb44eaf0 100644
--- a/test/MC/AsmParser/labels.s
+++ b/test/MC/AsmParser/labels.s
@@ -13,14 +13,14 @@ a:
.text
foo:
-// CHECK: val:"a$b"
+// CHECK: addl $24, "a$b"(%eax)
addl $24, "a$b"(%eax)
-// CHECK: val:"a$b" + 10
+// CHECK: addl $24, "a$b" + 10(%eax)
addl $24, ("a$b" + 10)(%eax)
// CHECK: "b$c" = 10
"b$c" = 10
-// CHECK: val:10
+// CHECK: addl $10, %eax
addl "b$c", %eax
diff --git a/test/MC/AsmParser/x86_instructions.s b/test/MC/AsmParser/x86_instructions.s
index c5cb80585a..4c5b698d3f 100644
--- a/test/MC/AsmParser/x86_instructions.s
+++ b/test/MC/AsmParser/x86_instructions.s
@@ -1,58 +1,58 @@
// FIXME: Switch back to FileCheck once we print actual instructions
-// RUN: llvm-mc -triple x86_64-unknown-unknown %s > %t
+// RUN: llvm-mc -triple x86_64-unknown-unknown %s | FileCheck %s
-// RUN: grep {MCInst(opcode=.*, operands=.reg:2, reg:0, reg:2.)} %t
+// CHECK: subb %al, %al
subb %al, %al
-// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:24.)} %t
+// CHECK: addl $24, %eax
addl $24, %eax
-// RUN: grep {MCInst(opcode=.*, operands=.reg:20, imm:1, reg:0, val:10, reg:0, reg:19.)} %t
+// CHECK: movl %eax, 10(%ebp)
movl %eax, 10(%ebp)
-// RUN: grep {MCInst(opcode=.*, operands=.reg:20, imm:1, reg:21, val:10, reg:0, reg:19.)} %t
+// CHECK: movl %eax, 10(%ebp,%ebx)
movl %eax, 10(%ebp, %ebx)
-// RUN: grep {MCInst(opcode=.*, operands=.reg:20, imm:4, reg:21, val:10, reg:0, reg:19.)} %t
+// CHECK: movl %eax, 10(%ebp,%ebx,4)
movl %eax, 10(%ebp, %ebx, 4)
-// RUN: grep {MCInst(opcode=.*, operands=.reg:0, imm:4, reg:21, val:10, reg:0, reg:19.)} %t
+// CHECK: movl %eax, 10(,%ebx,4)
movl %eax, 10(, %ebx, 4)
// FIXME: Check that this matches SUB32ri8
-// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:1.)} %t
+// CHECK: subl $1, %eax
subl $1, %eax
// FIXME: Check that this matches SUB32ri8
-// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:-1.)} %t
+// CHECK: subl $-1, %eax
subl $-1, %eax
// FIXME: Check that this matches SUB32ri
-// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:256.)} %t
+// CHECK: subl $256, %eax
subl $256, %eax
// FIXME: Check that this matches XOR64ri8
-// RUN: grep {MCInst(opcode=.*, operands=.reg:80, reg:0, val:1.)} %t
+// CHECK: xorq $1, %rax
xorq $1, %rax
// FIXME: Check that this matches XOR64ri32
-// RUN: grep {MCInst(opcode=.*, operands=.reg:80, reg:0, val:256.)} %t
+// CHECK: xorq $256, %rax
xorq $256, %rax
// FIXME: Check that this matches SUB8rr
-// RUN: grep {MCInst(opcode=.*, operands=.reg:5, reg:0, reg:2.)} %t
+// CHECK: subb %al, %bl
subb %al, %bl
// FIXME: Check that this matches SUB16rr
-// RUN: grep {MCInst(opcode=.*, operands=.reg:8, reg:0, reg:3.)} %t
+// CHECK: subw %ax, %bx
subw %ax, %bx
// FIXME: Check that this matches SUB32rr
-// RUN: grep {MCInst(opcode=.*, operands=.reg:21, reg:0, reg:19.)} %t
+// CHECK: subl %eax, %ebx
subl %eax, %ebx
// FIXME: Check that this matches the correct instruction.
-// RUN: grep {MCInst(opcode=.*, operands=.reg:80.)} %t
+// CHECK: call *%rax
call *%rax
// FIXME: Check that this matches the correct instruction.
-// RUN: grep {MCInst(opcode=.*, operands=.reg:21, reg:0, reg:19.)} %t
+// CHECK: shldl %cl, %eax, %ebx
shldl %cl, %eax, %ebx
diff --git a/test/MC/AsmParser/x86_operands.s b/test/MC/AsmParser/x86_operands.s
index c6f886b950..d6c16808cf 100644
--- a/test/MC/AsmParser/x86_operands.s
+++ b/test/MC/AsmParser/x86_operands.s
@@ -1,36 +1,58 @@
// FIXME: Actually test that we get the expected results.
-// RUN: llvm-mc -triple i386-unknown-unknown %s > %t 2> %t2
+// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s
# Immediates
- push $1
- push $(1+2)
- push $a
- push $1 + 2
+# CHECK: addl $1, %eax
+ addl $1, %eax
+# CHECK: addl $3, %eax
+ addl $(1+2), %eax
+# CHECK: addl $a, %eax
+ addl $a, %eax
+# CHECK: addl $3, %eax
+ addl $1 + 2, %eax
# Disambiguation
- push 4+4
- push (4+4)
- push (4+4)(%eax)
- push 8(%eax)
- push (%eax)
- push (4+4)(,%eax)
+
+ # FIXME: Add back when we can match this.
+ #addl $1, 4+4
+ # FIXME: Add back when we can match this.
+ #addl $1, (4+4)
+# CHECK: addl $1, 8(%eax)
+ addl $1, 4+4(%eax)
+# CHECK: addl $1, 8(%eax)
+ addl $1, (4+4)(%eax)
+# CHECK: addl $1, 8(%eax)
+ addl $1, 8(%eax)
+# CHECK: addl $1, 0(%eax)
+ addl $1, (%eax)
+# CHECK: addl $1, 8(,%eax)
+ addl $1, (4+4)(,%eax)
# Indirect Memory Operands
- push 1(%eax)
- push 1(%eax,%ebx)
- push 1(%eax,%ebx,)
- push 1(%eax,%ebx,4)
- push 1(,%ebx)
- push 1(,%ebx,)
- push 1(,%ebx,4)
- push 1(,%ebx,(2+2))
+# CHECK: addl $1, 1(%eax)
+ addl $1, 1(%eax)
+# CHECK: addl $1, 1(%eax,%ebx)
+ addl $1, 1(%eax,%ebx)
+# CHECK: addl $1, 1(%eax,%ebx)
+ addl $1, 1(%eax,%ebx,)
+# CHECK: addl $1, 1(%eax,%ebx,4)
+ addl $1, 1(%eax,%ebx,4)
+# CHECK: addl $1, 1(,%ebx)
+ addl $1, 1(,%ebx)
+# CHECK: addl $1, 1(,%ebx)
+ addl $1, 1(,%ebx,)
+# CHECK: addl $1, 1(,%ebx,4)
+ addl $1, 1(,%ebx,4)
+# CHECK: addl $1, 1(,%ebx,4)
+ addl $1, 1(,%ebx,(2+2))
# '*'
+# CHECK: call a
call a
- call *a
+# CHECK: call *%eax
call *%eax
- call 4(%eax) # FIXME: Warn or reject.
+# CHECK: call *4(%eax)
call *4(%eax)