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author | Daniel Malea <daniel.malea@intel.com> | 2013-06-28 20:37:20 +0000 |
---|---|---|
committer | Daniel Malea <daniel.malea@intel.com> | 2013-06-28 20:37:20 +0000 |
commit | 5fa8186b8dcc0be77f4ab64b1ef46ad919315b54 (patch) | |
tree | 22b3d235e9173e85d46a31943ff2bce28a6613f7 /test/Transforms/DebugIR | |
parent | 74cf767093d3dd46dc3c7cf5666060e8c1ee0be0 (diff) | |
download | llvm-5fa8186b8dcc0be77f4ab64b1ef46ad919315b54.tar.gz llvm-5fa8186b8dcc0be77f4ab64b1ef46ad919315b54.tar.bz2 llvm-5fa8186b8dcc0be77f4ab64b1ef46ad919315b54.tar.xz |
Adding tests for DebugIR pass
- lit tests verify that each line of input LLVM IR gets a !dbg node and a
corresponding entry of metadata that contains the line number
- unit tests verify that DebugIR works as advertised in the interface
- refactored some useful IR generation functionality from the MCJIT unit tests
so it can be reused
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185212 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/DebugIR')
-rw-r--r-- | test/Transforms/DebugIR/crash.ll | 42 | ||||
-rw-r--r-- | test/Transforms/DebugIR/exception.ll | 127 | ||||
-rw-r--r-- | test/Transforms/DebugIR/function.ll | 51 | ||||
-rw-r--r-- | test/Transforms/DebugIR/lit.local.cfg | 1 | ||||
-rw-r--r-- | test/Transforms/DebugIR/simple.ll | 25 | ||||
-rw-r--r-- | test/Transforms/DebugIR/struct.ll | 24 | ||||
-rw-r--r-- | test/Transforms/DebugIR/vector.ll | 93 |
7 files changed, 363 insertions, 0 deletions
diff --git a/test/Transforms/DebugIR/crash.ll b/test/Transforms/DebugIR/crash.ll new file mode 100644 index 0000000000..f4a88d7234 --- /dev/null +++ b/test/Transforms/DebugIR/crash.ll @@ -0,0 +1,42 @@ +; ModuleID = 'crash.c' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-pc-linux-gnu" + +@.str = private unnamed_addr constant [18 x i8] c"Hello, segfault!\0A\00", align 1 +@.str1 = private unnamed_addr constant [14 x i8] c"Now crash %d\0A\00", align 1 + +; Function Attrs: nounwind uwtable +define i32 @main(i32 %argc, i8** %argv) #0 { + %1 = alloca i32, align 4 ;CHECK: !dbg + %2 = alloca i32, align 4 ;CHECK-NEXT: !dbg + %3 = alloca i8**, align 8 ;CHECK-NEXT: !dbg + %null_ptr = alloca i32*, align 8 ;CHECK-NEXT: !dbg + store i32 0, i32* %1 ;CHECK-NEXT: !dbg + store i32 %argc, i32* %2, align 4 ;CHECK-NEXT: !dbg + store i8** %argv, i8*** %3, align 8 ;CHECK-NEXT: !dbg + store i32* null, i32** %null_ptr, align 8 ;CHECK-NEXT: !dbg + %4 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([18 x i8]* @.str, i32 0, i32 0)) ;CHECK-NEXT: !dbg + %5 = load i32** %null_ptr, align 8 ;CHECK-NEXT: !dbg + %6 = load i32* %5, align 4 ;CHECK-NEXT: !dbg + %7 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([14 x i8]* @.str1, i32 0, i32 0), i32 %6) ;CHECK-NEXT: !dbg + %8 = load i32* %2, align 4 ;CHECK-NEXT: !dbg + ret i32 %8 ;CHECK-NEXT: !dbg +} + +declare i32 @printf(i8*, ...) #1 + +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +; CHECK: = metadata !{i32 14, +; CHECK-NEXT: = metadata !{i32 15, +; CHECK-NEXT: = metadata !{i32 16, +; CHECK-NEXT: = metadata !{i32 17, +; CHECK-NEXT: = metadata !{i32 18, +; CHECK-NEXT: = metadata !{i32 19, +; CHECK-NEXT: = metadata !{i32 20, +; CHECK-NEXT: = metadata !{i32 21, +; CHECK-NEXT: = metadata !{i32 22, +; CHECK-NEXT: = metadata !{i32 23, + +; RUN: opt %s -debug-ir -S | FileCheck %s diff --git a/test/Transforms/DebugIR/exception.ll b/test/Transforms/DebugIR/exception.ll new file mode 100644 index 0000000000..2436d38968 --- /dev/null +++ b/test/Transforms/DebugIR/exception.ll @@ -0,0 +1,127 @@ +; ModuleID = 'exception.cpp' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-pc-linux-gnu" + +@_ZTIi = external constant i8* + +; Function Attrs: uwtable +define i32 @main(i32 %argc, i8** %argv) #0 { + %1 = alloca i32, align 4 ; CHECK: !dbg + %2 = alloca i32, align 4 ; CHECK-NEXT: !dbg + %3 = alloca i8**, align 8 ; CHECK-NEXT: !dbg + %4 = alloca i8* ; CHECK-NEXT: !dbg + %5 = alloca i32 ; CHECK-NEXT: !dbg + %e = alloca i32, align 4 ; CHECK-NEXT: !dbg + %6 = alloca i32 ; CHECK-NEXT: !dbg + store i32 0, i32* %1 ; CHECK-NEXT: !dbg + store i32 %argc, i32* %2, align 4 ; CHECK-NEXT: !dbg + store i8** %argv, i8*** %3, align 8 ; CHECK-NEXT: !dbg + %7 = call i8* @__cxa_allocate_exception(i64 4) #2 ; CHECK-NEXT: !dbg + %8 = bitcast i8* %7 to i32* ; CHECK-NEXT: !dbg + %9 = load i32* %2, align 4 ; CHECK-NEXT: !dbg + store i32 %9, i32* %8 ; CHECK-NEXT: !dbg + invoke void @__cxa_throw(i8* %7, i8* bitcast (i8** @_ZTIi to i8*), i8* null) #3 + to label %31 unwind label %10 ; CHECK: !dbg + +; <label>:10 ; preds = %0 + %11 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) + catch i8* bitcast (i8** @_ZTIi to i8*) ; CHECK: !dbg + %12 = extractvalue { i8*, i32 } %11, 0 ; CHECK-NEXT: !dbg + store i8* %12, i8** %4 ; CHECK-NEXT: !dbg + %13 = extractvalue { i8*, i32 } %11, 1 ; CHECK-NEXT: !dbg + store i32 %13, i32* %5 ; CHECK-NEXT: !dbg + br label %14 ; CHECK-NEXT: !dbg + +; <label>:14 ; preds = %10 + %15 = load i32* %5 ; CHECK: !dbg + %16 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) #2 ; CHECK-NEXT: !dbg + %17 = icmp eq i32 %15, %16 ; CHECK-NEXT: !dbg + br i1 %17, label %18, label %26 ; CHECK-NEXT: !dbg + +; <label>:18 ; preds = %14 + %19 = load i8** %4 ; CHECK: !dbg + %20 = call i8* @__cxa_begin_catch(i8* %19) #2 ; CHECK-NEXT: !dbg + %21 = bitcast i8* %20 to i32* ; CHECK-NEXT: !dbg + %22 = load i32* %21, align 4 ; CHECK-NEXT: !dbg + store i32 %22, i32* %e, align 4 ; CHECK-NEXT: !dbg + %23 = load i32* %e, align 4 ; CHECK-NEXT: !dbg + store i32 %23, i32* %1 ; CHECK-NEXT: !dbg + store i32 1, i32* %6 ; CHECK-NEXT: !dbg + call void @__cxa_end_catch() #2 ; CHECK-NEXT: !dbg + br label %24 ; CHECK-NEXT: !dbg + +; <label>:24 ; preds = %18 + %25 = load i32* %1 ; CHECK: !dbg + ret i32 %25 ; CHECK-NEXT: !dbg + +; <label>:26 ; preds = %14 + %27 = load i8** %4 ; CHECK: !dbg + %28 = load i32* %5 ; CHECK-NEXT: !dbg + %29 = insertvalue { i8*, i32 } undef, i8* %27, 0 ; CHECK-NEXT: !dbg + %30 = insertvalue { i8*, i32 } %29, i32 %28, 1 ; CHECK-NEXT: !dbg + resume { i8*, i32 } %30 ; CHECK-NEXT: !dbg + +; <label>:31 ; preds = %0 + unreachable ; CHECK: !dbg +} + +declare i8* @__cxa_allocate_exception(i64) + +declare void @__cxa_throw(i8*, i8*, i8*) + +declare i32 @__gxx_personality_v0(...) + +; Function Attrs: nounwind readnone +declare i32 @llvm.eh.typeid.for(i8*) #1 + +declare i8* @__cxa_begin_catch(i8*) + +declare void @__cxa_end_catch() + +attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind readnone } +attributes #2 = { nounwind } +attributes #3 = { noreturn } +; CHECK: = metadata !{i32 16, +; CHECK-NEXT: = metadata !{i32 17, +; CHECK-NEXT: = metadata !{i32 18, +; CHECK-NEXT: = metadata !{i32 19, +; CHECK-NEXT: = metadata !{i32 20, +; CHECK-NEXT: = metadata !{i32 21, +; CHECK-NEXT: = metadata !{i32 22, +; CHECK-NEXT: = metadata !{i32 24, + +; CHECK-NEXT: = metadata !{i32 28, +; CHECK-NEXT: = metadata !{i32 29, +; CHECK-NEXT: = metadata !{i32 30, +; CHECK-NEXT: = metadata !{i32 31, +; CHECK-NEXT: = metadata !{i32 32, +; CHECK-NEXT: = metadata !{i32 33, + +; CHECK-NEXT: = metadata !{i32 36, +; CHECK-NEXT: = metadata !{i32 37, +; CHECK-NEXT: = metadata !{i32 38, +; CHECK-NEXT: = metadata !{i32 39, + +; CHECK-NEXT: = metadata !{i32 42, +; CHECK-NEXT: = metadata !{i32 43, +; CHECK-NEXT: = metadata !{i32 44, +; CHECK-NEXT: = metadata !{i32 45, +; CHECK-NEXT: = metadata !{i32 46, +; CHECK-NEXT: = metadata !{i32 47, +; CHECK-NEXT: = metadata !{i32 48, +; CHECK-NEXT: = metadata !{i32 49, +; CHECK-NEXT: = metadata !{i32 50, +; CHECK-NEXT: = metadata !{i32 51, + +; CHECK-NEXT: = metadata !{i32 54, +; CHECK-NEXT: = metadata !{i32 55, + +; CHECK-NEXT: = metadata !{i32 58, +; CHECK-NEXT: = metadata !{i32 59, +; CHECK-NEXT: = metadata !{i32 60, +; CHECK-NEXT: = metadata !{i32 61, +; CHECK-NEXT: = metadata !{i32 62, +; CHECK-NEXT: = metadata !{i32 65, + +; RUN: opt %s -debug-ir -S | FileCheck %s diff --git a/test/Transforms/DebugIR/function.ll b/test/Transforms/DebugIR/function.ll new file mode 100644 index 0000000000..dba073de37 --- /dev/null +++ b/test/Transforms/DebugIR/function.ll @@ -0,0 +1,51 @@ +; ModuleID = 'function.c' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-pc-linux-gnu" + +; Function Attrs: nounwind uwtable +define void @blah(i32* %i) #0 { + %1 = alloca i32*, align 8 ; CHECK: !dbg + store i32* %i, i32** %1, align 8 ; CHECK-NEXT: !dbg + %2 = load i32** %1, align 8 ; CHECK-NEXT: !dbg + %3 = load i32* %2, align 4 ; CHECK-NEXT: !dbg + %4 = add nsw i32 %3, 1 ; CHECK-NEXT: !dbg + store i32 %4, i32* %2, align 4 ; CHECK-NEXT: !dbg + ret void ; CHECK-NEXT: !dbg +} + +; Function Attrs: nounwind uwtable +define i32 @main(i32 %argc, i8** %argv) #0 { + %1 = alloca i32, align 4 ; CHECK: !dbg + %2 = alloca i32, align 4 ; CHECK-NEXT: !dbg + %3 = alloca i8**, align 8 ; CHECK-NEXT: !dbg + %i = alloca i32, align 4 ; CHECK-NEXT: !dbg + store i32 0, i32* %1 ; CHECK-NEXT: !dbg + store i32 %argc, i32* %2, align 4 ; CHECK-NEXT: !dbg + store i8** %argv, i8*** %3, align 8 ; CHECK-NEXT: !dbg + store i32 7, i32* %i, align 4 ; CHECK-NEXT: !dbg + call void @blah(i32* %i) ; CHECK-NEXT: !dbg + %4 = load i32* %i, align 4 ; CHECK-NEXT: !dbg + ret i32 %4 ; CHECK-NEXT: !dbg +} + +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +; CHECK: = metadata !{i32 8, +; CHECK-NEXT: = metadata !{i32 9, +; CHECK-NEXT: = metadata !{i32 10, +; CHECK-NEXT: = metadata !{i32 11, +; CHECK-NEXT: = metadata !{i32 12, +; CHECK-NEXT: = metadata !{i32 13, + +; CHECK-NEXT: = metadata !{i32 18, +; CHECK-NEXT: = metadata !{i32 19, +; CHECK-NEXT: = metadata !{i32 20, +; CHECK-NEXT: = metadata !{i32 21, +; CHECK-NEXT: = metadata !{i32 22, +; CHECK-NEXT: = metadata !{i32 23, +; CHECK-NEXT: = metadata !{i32 24, +; CHECK-NEXT: = metadata !{i32 25, +; CHECK-NEXT: = metadata !{i32 26, +; CHECK-NEXT: = metadata !{i32 27, +; CHECK-NEXT: = metadata !{i32 28, + +; RUN: opt %s -debug-ir -S | FileCheck %s diff --git a/test/Transforms/DebugIR/lit.local.cfg b/test/Transforms/DebugIR/lit.local.cfg new file mode 100644 index 0000000000..c6106e4746 --- /dev/null +++ b/test/Transforms/DebugIR/lit.local.cfg @@ -0,0 +1 @@ +config.suffixes = ['.ll'] diff --git a/test/Transforms/DebugIR/simple.ll b/test/Transforms/DebugIR/simple.ll new file mode 100644 index 0000000000..3b18895826 --- /dev/null +++ b/test/Transforms/DebugIR/simple.ll @@ -0,0 +1,25 @@ +; ModuleID = 'simple.c' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-pc-linux-gnu" + +; Function Attrs: nounwind uwtable +define i32 @main(i32 %argc, i8** %argv) #0 { + %1 = alloca i32, align 4 ; CHECK: !dbg + %2 = alloca i32, align 4 ; CHECK-NEXT: !dbg + %3 = alloca i8**, align 8 ; CHECK-NEXT: !dbg + store i32 0, i32* %1 ; CHECK-NEXT: !dbg + store i32 %argc, i32* %2, align 4 ; CHECK-NEXT: !dbg + store i8** %argv, i8*** %3, align 8 ; CHECK-NEXT: !dbg + %4 = load i32* %2, align 4 ; CHECK-NEXT: !dbg + ret i32 %4 ; CHECK-NEXT: !dbg +} + +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +; CHECK: = metadata !{i32 10, +; CHECK-NEXT: = metadata !{i32 11, +; CHECK-NEXT: = metadata !{i32 12, +; CHECK-NEXT: = metadata !{i32 13, +; CHECK-NEXT: = metadata !{i32 14, + +; RUN: opt %s -debug-ir -S | FileCheck %s diff --git a/test/Transforms/DebugIR/struct.ll b/test/Transforms/DebugIR/struct.ll new file mode 100644 index 0000000000..8db3dbebe9 --- /dev/null +++ b/test/Transforms/DebugIR/struct.ll @@ -0,0 +1,24 @@ +; ModuleID = 'struct.cpp' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-pc-linux-gnu" + +%struct.blah = type { i32, float, i8 } + +; Function Attrs: nounwind uwtable +define i32 @main() #0 { + %1 = alloca i32, align 4 ; CHECK: !dbg + %b = alloca %struct.blah, align 4 ; CHECK-NEXT: !dbg + store i32 0, i32* %1 ; CHECK-NEXT: !dbg + %2 = getelementptr inbounds %struct.blah* %b, i32 0, i32 0 ; CHECK-NEXT: !dbg + %3 = load i32* %2, align 4 ; CHECK-NEXT: !dbg + ret i32 %3 ; CHECK-NEXT: !dbg +} + +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +; CHECK: = metadata !{i32 11, +; CHECK-NEXT: = metadata !{i32 12, +; CHECK-NEXT: = metadata !{i32 13, +; CHECK-NEXT: = metadata !{i32 14, + +; RUN: opt %s -debug-ir -S | FileCheck %s diff --git a/test/Transforms/DebugIR/vector.ll b/test/Transforms/DebugIR/vector.ll new file mode 100644 index 0000000000..50d99ac225 --- /dev/null +++ b/test/Transforms/DebugIR/vector.ll @@ -0,0 +1,93 @@ +; ModuleID = 'vector.cpp' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-pc-linux-gnu" + +; Function Attrs: noinline nounwind uwtable +define <4 x float> @_Z3fooDv2_fS_(double %a.coerce, double %b.coerce) #0 { + %1 = alloca <2 x float>, align 8 ; CHECK: !dbg + %2 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg + %3 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg + %4 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg + %c = alloca <4 x float>, align 16 ; CHECK-NEXT: !dbg + %5 = bitcast <2 x float>* %1 to double* ; CHECK-NEXT: !dbg + store double %a.coerce, double* %5, align 1 ; CHECK-NEXT: !dbg + %a = load <2 x float>* %1, align 8 ; CHECK-NEXT: !dbg + store <2 x float> %a, <2 x float>* %2, align 8 ; CHECK-NEXT: !dbg + %6 = bitcast <2 x float>* %3 to double* ; CHECK-NEXT: !dbg + store double %b.coerce, double* %6, align 1 ; CHECK-NEXT: !dbg + %b = load <2 x float>* %3, align 8 ; CHECK-NEXT: !dbg + store <2 x float> %b, <2 x float>* %4, align 8 ; CHECK-NEXT: !dbg + %7 = load <2 x float>* %2, align 8 ; CHECK-NEXT: !dbg + %8 = load <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg + %9 = shufflevector <2 x float> %7, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ; CHECK-NEXT: !dbg + %10 = shufflevector <4 x float> %8, <4 x float> %9, <4 x i32> <i32 4, i32 1, i32 5, i32 3> ; CHECK-NEXT: !dbg + store <4 x float> %10, <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg + %11 = load <2 x float>* %4, align 8 ; CHECK-NEXT: !dbg + %12 = load <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg + %13 = shufflevector <2 x float> %11, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ; CHECK-NEXT: !dbg + %14 = shufflevector <4 x float> %12, <4 x float> %13, <4 x i32> <i32 0, i32 4, i32 2, i32 5> ; CHECK-NEXT: !dbg + store <4 x float> %14, <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg + %15 = load <4 x float>* %c, align 16 ; CHECK-NEXT: !dbg + ret <4 x float> %15 ; CHECK-NEXT: !dbg +} + +; Function Attrs: nounwind uwtable +define i32 @main() #1 { + %1 = alloca i32, align 4 ; CHECK: !dbg + %a = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg + %b = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg + %x = alloca <4 x float>, align 16 ; CHECK-NEXT: !dbg + %2 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg + %3 = alloca <2 x float>, align 8 ; CHECK-NEXT: !dbg + store i32 0, i32* %1 ; CHECK-NEXT: !dbg + store <2 x float> <float 1.000000e+00, float 2.000000e+00>, <2 x float>* %a, align 8 ; CHECK-NEXT: !dbg + store <2 x float> <float 1.000000e+00, float 2.000000e+00>, <2 x float>* %b, align 8 ; CHECK-NEXT: !dbg + %4 = load <2 x float>* %a, align 8 ; CHECK-NEXT: !dbg + %5 = load <2 x float>* %b, align 8 ; CHECK-NEXT: !dbg + store <2 x float> %4, <2 x float>* %2, align 8 ; CHECK-NEXT: !dbg + %6 = bitcast <2 x float>* %2 to double* ; CHECK-NEXT: !dbg + %7 = load double* %6, align 1 ; CHECK-NEXT: !dbg + store <2 x float> %5, <2 x float>* %3, align 8 ; CHECK-NEXT: !dbg + %8 = bitcast <2 x float>* %3 to double* ; CHECK-NEXT: !dbg + %9 = load double* %8, align 1 ; CHECK-NEXT: !dbg + %10 = call <4 x float> @_Z3fooDv2_fS_(double %7, double %9) ; CHECK-NEXT: !dbg + store <4 x float> %10, <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg + %11 = load <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg + %12 = extractelement <4 x float> %11, i32 0 ; CHECK-NEXT: !dbg + %13 = load <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg + %14 = extractelement <4 x float> %13, i32 1 ; CHECK-NEXT: !dbg + %15 = fadd float %12, %14 ; CHECK-NEXT: !dbg + %16 = load <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg + %17 = extractelement <4 x float> %16, i32 2 ; CHECK-NEXT: !dbg + %18 = fadd float %15, %17 ; CHECK-NEXT: !dbg + %19 = load <4 x float>* %x, align 16 ; CHECK-NEXT: !dbg + %20 = extractelement <4 x float> %19, i32 3 ; CHECK-NEXT: !dbg + %21 = fadd float %18, %20 ; CHECK-NEXT: !dbg + %22 = fptosi float %21 to i32 ; CHECK-NEXT: !dbg + ret i32 %22 ; CHECK-NEXT: !dbg +} + +attributes #0 = { noinline nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +; CHECK: = metadata !{i32 13, +; CHECK-NEXT: = metadata !{i32 14, +; CHECK-NEXT: = metadata !{i32 15, +; CHECK-NEXT: = metadata !{i32 16, +; CHECK-NEXT: = metadata !{i32 17, +; CHECK-NEXT: = metadata !{i32 18, +; CHECK-NEXT: = metadata !{i32 19, +; CHECK-NEXT: = metadata !{i32 20, +; CHECK-NEXT: = metadata !{i32 21, +; CHECK-NEXT: = metadata !{i32 22, +; CHECK-NEXT: = metadata !{i32 23, +; CHECK-NEXT: = metadata !{i32 24, +; CHECK-NEXT: = metadata !{i32 25, +; CHECK-NEXT: = metadata !{i32 26, +; CHECK-NEXT: = metadata !{i32 27, +; CHECK-NEXT: = metadata !{i32 28, +; CHECK-NEXT: = metadata !{i32 29, +; CHECK-NEXT: = metadata !{i32 30, +; CHECK-NEXT: = metadata !{i32 31, + +; RUN: opt %s -debug-ir -S | FileCheck %s |