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author | Benjamin Kramer <benny.kra@googlemail.com> | 2010-07-12 11:54:45 +0000 |
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committer | Benjamin Kramer <benny.kra@googlemail.com> | 2010-07-12 11:54:45 +0000 |
commit | 4fc719e60767c80541a21c99d139a904b4c948df (patch) | |
tree | 5b9103623fe52fe2f7356dcd1e8a3f202214a355 /test/Transforms/InstCombine | |
parent | e99e0775226f09a4ac5e135c3c9bc1a836f09d15 (diff) | |
download | llvm-4fc719e60767c80541a21c99d139a904b4c948df.tar.gz llvm-4fc719e60767c80541a21c99d139a904b4c948df.tar.bz2 llvm-4fc719e60767c80541a21c99d139a904b4c948df.tar.xz |
instcombine: fold (x & y) | (~x & z) and (x & y) ^ (~x & z) into ((y ^ z) & x) ^ z which is one instruction shorter. (PR6773)
before:
%and = and i32 %y, %x
%neg = xor i32 %x, -1
%and4 = and i32 %z, %neg
%xor = xor i32 %and4, %and
after:
%xor1 = xor i32 %z, %y
%and2 = and i32 %xor1, %x
%xor = xor i32 %and2, %z
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108136 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/InstCombine')
-rw-r--r-- | test/Transforms/InstCombine/or.ll | 14 | ||||
-rw-r--r-- | test/Transforms/InstCombine/xor2.ll | 14 |
2 files changed, 28 insertions, 0 deletions
diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll index c3526b77f6..86fca14dbd 100644 --- a/test/Transforms/InstCombine/or.ll +++ b/test/Transforms/InstCombine/or.ll @@ -350,3 +350,17 @@ define <4 x i32> @test32(<4 x i1> %and.i1352, <4 x i32> %vecinit6.i176, <4 x i32 ; CHECK: or <4 x i32> %and.i, %and.i129 } +; PR6773 +define i32 @test33(i32 %x, i32 %y, i32 %z) nounwind readnone { + %and = and i32 %y, %x + %not = xor i32 %x, -1 + %and2 = and i32 %z, %not + %xor = xor i32 %and2, %and + ret i32 %xor +; CHECK: @test33 +; CHECK: xor i32 +; CHECK: and i32 +; CHECK: xor i32 +; CHECK: ret i32 +} + diff --git a/test/Transforms/InstCombine/xor2.ll b/test/Transforms/InstCombine/xor2.ll index 67f05efa23..27ce3bff47 100644 --- a/test/Transforms/InstCombine/xor2.ll +++ b/test/Transforms/InstCombine/xor2.ll @@ -51,3 +51,17 @@ define i32 @test4(i32 %A, i32 %B) { ; CHECK: %1 = ashr i32 %A, %B ; CHECK: ret i32 %1 } + +; PR6773 +define i32 @test5(i32 %x, i32 %y, i32 %z) nounwind readnone { + %and = and i32 %y, %x + %not = xor i32 %x, -1 + %and2 = and i32 %z, %not + %or = or i32 %and2, %and + ret i32 %or +; CHECK: @test5 +; CHECK: xor i32 +; CHECK: and i32 +; CHECK: xor i32 +; CHECK: ret i32 +} |