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authorChad Rosier <mcrosier@apple.com>2011-12-22 21:06:36 +0000
committerChad Rosier <mcrosier@apple.com>2011-12-22 21:06:36 +0000
commitf1eba253038ab480abb43ea33909e9095b1321a7 (patch)
treed6f77de868bc7c3bd52659bc323cd0faec340019 /test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll
parentc7448f8d47de96333d6854113fb9f0e7affb31cd (diff)
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Reinstate r146578; it doesn't appear to be the cause of some recent execution-
time regressions. In general, it is beneficial to compile-time. Original commit message: Fix for bug #11429: Wrong behaviour for switches. Small improvement for code size heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147175 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll')
-rw-r--r--test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll84
1 files changed, 84 insertions, 0 deletions
diff --git a/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll b/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll
new file mode 100644
index 0000000000..21c0ec3e22
--- /dev/null
+++ b/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll
@@ -0,0 +1,84 @@
+; RUN: opt -loop-unswitch -loop-unswitch-threshold 30 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
+; RUN: opt -S -loop-unswitch -loop-unswitch-threshold 30 -verify-loop-info -verify-dom-info %s | FileCheck %s
+
+; STATS: 1 loop-simplify - Number of pre-header or exit blocks inserted
+; STATS: 1 loop-unswitch - Number of switches unswitched
+
+; ModuleID = '../llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll'
+
+; CHECK: %1 = icmp eq i32 %c, 1
+; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
+
+; CHECK: ..split_crit_edge: ; preds = %0
+; CHECK-NEXT: br label %.split
+
+; CHECK: .split.us: ; preds = %0
+; CHECK-NEXT: br label %loop_begin.us
+
+; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
+; CHECK: switch i32 1, label %second_switch.us [
+; CHECK-NEXT: i32 1, label %inc.us
+
+; CHECK: inc.us: ; preds = %second_switch.us, %loop_begin.us
+; CHECK-NEXT: call void @incf() noreturn nounwind
+; CHECK-NEXT: br label %loop_begin.backedge.us
+
+; CHECK: second_switch.us: ; preds = %loop_begin.us
+; CHECK-NEXT: switch i32 %d, label %default.us [
+; CHECK-NEXT: i32 1, label %inc.us
+; CHECK-NEXT: ]
+
+; CHECK: .split: ; preds = %..split_crit_edge
+; CHECK-NEXT: br label %loop_begin
+
+; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split
+; CHECK: switch i32 %c, label %second_switch [
+; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
+; CHECK-NEXT: ]
+
+; CHECK: loop_begin.inc_crit_edge: ; preds = %loop_begin
+; CHECK-NEXT: br i1 true, label %us-unreachable, label %inc
+
+; CHECK: second_switch: ; preds = %loop_begin
+; CHECK-NEXT: switch i32 %d, label %default [
+; CHECK-NEXT: i32 1, label %inc
+; CHECK-NEXT: ]
+
+; CHECK: inc: ; preds = %loop_begin.inc_crit_edge, %second_switch
+; CHECK-NEXT: call void @incf() noreturn nounwind
+; CHECK-NEXT: br label %loop_begin.backedge
+
+define i32 @test(i32* %var) {
+ %mem = alloca i32
+ store i32 2, i32* %mem
+ %c = load i32* %mem
+ %d = load i32* %mem
+
+ br label %loop_begin
+
+loop_begin:
+
+ %var_val = load i32* %var
+
+ switch i32 %c, label %second_switch [
+ i32 1, label %inc
+ ]
+
+second_switch:
+ switch i32 %d, label %default [
+ i32 1, label %inc
+ ]
+
+inc:
+ call void @incf() noreturn nounwind
+ br label %loop_begin
+
+default:
+ br label %loop_begin
+
+loop_exit:
+ ret i32 0
+}
+
+declare void @incf() noreturn
+declare void @decf() noreturn