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| author | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-10-29 01:33:57 +0000 |
|---|---|---|
| committer | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-10-29 01:33:57 +0000 |
| commit | c04d241d13820b33224b5cbd89a427fc08e5d1d9 (patch) | |
| tree | dbf40b8b49ab3278f68615ad0af8db89758d9f07 /test/Transforms/LoopVectorize | |
| parent | 7e8cebf22d170769b0bf0c2a69309faa0e36ac4c (diff) | |
| download | llvm-c04d241d13820b33224b5cbd89a427fc08e5d1d9.tar.gz llvm-c04d241d13820b33224b5cbd89a427fc08e5d1d9.tar.bz2 llvm-c04d241d13820b33224b5cbd89a427fc08e5d1d9.tar.xz | |
ARM cost model: Unaligned vectorized double stores are expensive
Updated a test case that assumed that <2 x double> would vectorize to use
<4 x float>.
radar://15338229
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193574 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/LoopVectorize')
| -rw-r--r-- | test/Transforms/LoopVectorize/ARM/width-detect.ll | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/test/Transforms/LoopVectorize/ARM/width-detect.ll b/test/Transforms/LoopVectorize/ARM/width-detect.ll index c0795b6a79..99d7fa75ee 100644 --- a/test/Transforms/LoopVectorize/ARM/width-detect.ll +++ b/test/Transforms/LoopVectorize/ARM/width-detect.ll @@ -3,27 +3,27 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" target triple = "thumbv7-apple-ios3.0.0" -;CHECK:foo_F64 -;CHECK: <2 x double> +;CHECK:foo_F32 +;CHECK: <4 x float> ;CHECK:ret -define double @foo_F64(double* nocapture %A, i32 %n) nounwind uwtable readonly ssp { +define float @foo_F32(float* nocapture %A, i32 %n) nounwind uwtable readonly ssp { %1 = icmp sgt i32 %n, 0 br i1 %1, label %.lr.ph, label %._crit_edge .lr.ph: ; preds = %0, %.lr.ph %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ] - %prod.01 = phi double [ %4, %.lr.ph ], [ 0.000000e+00, %0 ] - %2 = getelementptr inbounds double* %A, i64 %indvars.iv - %3 = load double* %2, align 8 - %4 = fmul fast double %prod.01, %3 + %prod.01 = phi float [ %4, %.lr.ph ], [ 0.000000e+00, %0 ] + %2 = getelementptr inbounds float* %A, i64 %indvars.iv + %3 = load float* %2, align 8 + %4 = fmul fast float %prod.01, %3 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n br i1 %exitcond, label %._crit_edge, label %.lr.ph ._crit_edge: ; preds = %.lr.ph, %0 - %prod.0.lcssa = phi double [ 0.000000e+00, %0 ], [ %4, %.lr.ph ] - ret double %prod.0.lcssa + %prod.0.lcssa = phi float [ 0.000000e+00, %0 ], [ %4, %.lr.ph ] + ret float %prod.0.lcssa } ;CHECK:foo_I8 |