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authorBenjamin Kramer <benny.kra@googlemail.com>2011-02-02 15:56:22 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2011-02-02 15:56:22 +0000
commit56442dfdcf7b07c04b585de5205b9427b1739895 (patch)
tree93e69afd94be2799ef289cd14f0f02e73e5fb05b /test/Transforms/SimplifyCFG
parentff0c5014b2127b16815121d9e723dc85bd164a79 (diff)
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SimplifyCFG: Turn switches into sub+icmp+branch if possible.
This makes the job of the later optzn passes easier, allowing the vast amount of icmp transforms to chew on it. We transform 840 switches in gcc.c, leading to a 16k byte shrink of the resulting binary on i386-linux. The testcase from README.txt now compiles into decl %edi cmpl $3, %edi sbbl %eax, %eax andl $1, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124724 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/SimplifyCFG')
-rw-r--r--test/Transforms/SimplifyCFG/switch_create.ll17
-rw-r--r--test/Transforms/SimplifyCFG/switch_formation.dbg.ll12
2 files changed, 7 insertions, 22 deletions
diff --git a/test/Transforms/SimplifyCFG/switch_create.ll b/test/Transforms/SimplifyCFG/switch_create.ll
index 4e199bc859..7c153e8682 100644
--- a/test/Transforms/SimplifyCFG/switch_create.ll
+++ b/test/Transforms/SimplifyCFG/switch_create.ll
@@ -141,14 +141,8 @@ UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4
ret i1 %UnifiedRetVal
; CHECK: @test6
-; CHECK: switch i32 %tmp.2.i, label %shortcirc_next.4 [
-; CHECK: i32 14, label %UnifiedReturnBlock
-; CHECK: i32 15, label %UnifiedReturnBlock
-; CHECK: i32 16, label %UnifiedReturnBlock
-; CHECK: i32 17, label %UnifiedReturnBlock
-; CHECK: i32 18, label %UnifiedReturnBlock
-; CHECK: i32 19, label %UnifiedReturnBlock
-; CHECK: ]
+; CHECK: %off = add i32 %tmp.2.i, -14
+; CHECK: %switch = icmp ult i32 %off, 6
}
define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
@@ -447,11 +441,8 @@ if.end:
define zeroext i1 @test16(i32 %x) nounwind {
entry:
; CHECK: @test16
-; CHECK: switch i32 %x, label %lor.rhs [
-; CHECK: i32 1, label %lor.end
-; CHECK: i32 2, label %lor.end
-; CHECK: i32 3, label %lor.end
-; CHECK: ]
+; CHECK: %off = add i32 %x, -1
+; CHECK: %switch = icmp ult i32 %off, 3
%cmp.i = icmp eq i32 %x, 1
br i1 %cmp.i, label %lor.end, label %lor.lhs.false
diff --git a/test/Transforms/SimplifyCFG/switch_formation.dbg.ll b/test/Transforms/SimplifyCFG/switch_formation.dbg.ll
index 357ffb60e1..09bef648ab 100644
--- a/test/Transforms/SimplifyCFG/switch_formation.dbg.ll
+++ b/test/Transforms/SimplifyCFG/switch_formation.dbg.ll
@@ -13,15 +13,9 @@
declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
define i1 @t({ i32, i32 }* %I) {
-; CHECK: t
-; CHECK: switch i32 %tmp.2.i, label %shortcirc_next.4 [
-; CHECK: i32 14, label %UnifiedReturnBlock
-; CHECK: i32 15, label %UnifiedReturnBlock
-; CHECK: i32 16, label %UnifiedReturnBlock
-; CHECK: i32 17, label %UnifiedReturnBlock
-; CHECK: i32 18, label %UnifiedReturnBlock
-; CHECK: i32 19, label %UnifiedReturnBlock
-; CHECK: ]
+; CHECK: @t
+; CHECK: %off = add i32 %tmp.2.i, -14
+; CHECK: %switch = icmp ult i32 %off, 6
entry:
%tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
%tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6]