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| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-04-03 23:47:24 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-04-03 23:47:24 +0000 |
| commit | 2abadea537b10739dc76ad0bf698776eba32c989 (patch) | |
| tree | 7ce08608baa814fbefe61559e0a02ca3c3375f7f /test/Transforms | |
| parent | 91ba0a9f6142d3b0c76e9fcc6511b0d8d198d4bd (diff) | |
| download | llvm-2abadea537b10739dc76ad0bf698776eba32c989.tar.gz llvm-2abadea537b10739dc76ad0bf698776eba32c989.tar.bz2 llvm-2abadea537b10739dc76ad0bf698776eba32c989.tar.xz | |
ARM: yet another round of ARM test clean ups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205586 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms')
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll | 2 | ||||
| -rw-r--r-- | test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll b/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll index 5d728b528e..756ea82f37 100644 --- a/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll +++ b/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O3 -march=thumb -mcpu=cortex-a8 | FileCheck %s +; RUN: llc -O3 -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s ; ; LSR should only check for valid address modes when the IV user is a ; memory address. diff --git a/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll b/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll index ab7f20f012..c24eda3ddc 100644 --- a/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll +++ b/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O3 -march=thumb -mcpu=cortex-a9 | FileCheck %s -check-prefix=A9 +; RUN: llc -O3 -mtriple=thumb-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s -check-prefix=A9 ; @simple is the most basic chain of address induction variables. Chaining ; saves at least one register and avoids complex addressing and setup |