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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-06-20 16:23:52 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-06-20 16:23:52 +0000 |
| commit | 027e94479c9e69eb3c3c5536fa9990d0b96e9510 (patch) | |
| tree | e0ff894ae7806fba4e5872840cba830ff5daa4eb /test | |
| parent | 0db5379fe643cbe738b4831e337251819cc5dc5d (diff) | |
| download | llvm-027e94479c9e69eb3c3c5536fa9990d0b96e9510.tar.gz llvm-027e94479c9e69eb3c3c5536fa9990d0b96e9510.tar.bz2 llvm-027e94479c9e69eb3c3c5536fa9990d0b96e9510.tar.xz | |
[PowerPC] Optimize @ha/@l constructs
This patch adds support for having the assembler optimize fixups
to constructs like "symbol@ha" or "symbol@l" if "symbol" can be
resolved at assembler time.
This optimization is already present in the PPCMCExpr.cpp code
for handling PPC_HA16/PPC_LO16 target expressions. However,
those target expression were used only on Darwin targets.
This patch changes target expression code so that they are
usable also with the GNU assembler (using the @ha / @l syntax
instead of the ha16() / lo16() syntax), and changes the
MCInst lowering code to generate those target expressions
where appropriate.
It also changes the asm parser to generate HA16/LO16 target
expressions when parsing assembler source that uses the
@ha / @l modifiers. The effect is that now the above-
mentioned optimization automatically becomes available
for those situations too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184436 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/PowerPC/ppc64-fixup-apply.s | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/test/MC/PowerPC/ppc64-fixup-apply.s b/test/MC/PowerPC/ppc64-fixup-apply.s index fb75703b1c..ca33a4455b 100644 --- a/test/MC/PowerPC/ppc64-fixup-apply.s +++ b/test/MC/PowerPC/ppc64-fixup-apply.s @@ -12,6 +12,22 @@ addis 1, 1, target .set target, 0x1234 +addi 1, 1, target2@l +addis 1, 1, target2@ha + +.set target2, 0x12345678 + +addi 1, 1, target3-target4@l +addis 1, 1, target3-target4@ha + +.set target3, 0x23455678 +.set target4, 0x12341234 + +addi 1, 1, target5+0x8000@l +addis 1, 1, target5+0x8000@ha + +.set target5, 0x10000001 + .data .quad v1 @@ -33,13 +49,14 @@ addis 1, 1, target # CHECK-NEXT: ] # CHECK-NEXT: Address: 0x0 # CHECK-NEXT: Offset: -# CHECK-NEXT: Size: 8 +# CHECK-NEXT: Size: 32 # CHECK-NEXT: Link: 0 # CHECK-NEXT: Info: 0 # CHECK-NEXT: AddressAlignment: 4 # CHECK-NEXT: EntrySize: 0 # CHECK-NEXT: SectionData ( -# CHECK-NEXT: 0000: 38211234 3C211234 +# CHECK-NEXT: 0000: 38211234 3C211234 38215678 3C211234 +# CHECK-NEXT: 0010: 38214444 3C211111 38218001 3C211001 # CHECK-NEXT: ) # CHECK-NEXT: } |