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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-10-01 14:56:23 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-10-01 14:56:23 +0000
commit185ef05ad6fdcaad1e831020b1f88d0046dd15d6 (patch)
tree08ebf3788fe3c4a93e07dbc8102b136e5cc9dff4 /test
parentad366a3f67679a56d25464dc2bcad3a0a6a51780 (diff)
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[SystemZ] Add comparisons of large immediates using high words
There are no corresponding patterns for small immediates because they would prevent the use of fused compare-and-branch instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191775 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/SystemZ/asm-18.ll34
-rw-r--r--test/MC/Disassembler/SystemZ/insns.txt30
-rw-r--r--test/MC/SystemZ/insn-bad-z196.s16
-rw-r--r--test/MC/SystemZ/insn-bad.s10
-rw-r--r--test/MC/SystemZ/insn-good-z196.s24
5 files changed, 114 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/asm-18.ll b/test/CodeGen/SystemZ/asm-18.ll
index e16bf65c3e..d39de6d655 100644
--- a/test/CodeGen/SystemZ/asm-18.ll
+++ b/test/CodeGen/SystemZ/asm-18.ll
@@ -669,3 +669,37 @@ define void @f30() {
call void asm sideeffect "stepd $0", "r"(i32 %add3)
ret void
}
+
+; Test large immediate comparison involving high registers.
+define i32 @f31() {
+; CHECK-LABEL: f31:
+; CHECK: stepa [[REG1:%r[0-5]]]
+; CHECK: cih [[REG1]], 1000000000
+; CHECK: stepb [[REG2:%r[0-5]]]
+; CHECK: clih [[REG2]], 1000000000
+; CHECK: br %r14
+ %res1 = call i32 asm "stepa $0", "=h"()
+ %cmp1 = icmp sle i32 %res1, 1000000000
+ %sel1 = select i1 %cmp1, i32 0, i32 1
+ %res2 = call i32 asm "stepb $0, $1", "=h,r"(i32 %sel1)
+ %cmp2 = icmp ule i32 %res2, 1000000000
+ %sel2 = select i1 %cmp2, i32 0, i32 1
+ ret i32 %sel2
+}
+
+; Test large immediate comparison involving low registers.
+define i32 @f32() {
+; CHECK-LABEL: f32:
+; CHECK: stepa [[REG1:%r[0-5]]]
+; CHECK: cfi [[REG1]], 1000000000
+; CHECK: stepb [[REG2:%r[0-5]]]
+; CHECK: clfi [[REG2]], 1000000000
+; CHECK: br %r14
+ %res1 = call i32 asm "stepa $0", "=r"()
+ %cmp1 = icmp sle i32 %res1, 1000000000
+ %sel1 = select i1 %cmp1, i32 0, i32 1
+ %res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %sel1)
+ %cmp2 = icmp ule i32 %res2, 1000000000
+ %sel2 = select i1 %cmp2, i32 0, i32 1
+ ret i32 %sel2
+}
diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt
index 2f2e7fa0cd..f88531b2cd 100644
--- a/test/MC/Disassembler/SystemZ/insns.txt
+++ b/test/MC/Disassembler/SystemZ/insns.txt
@@ -1351,6 +1351,24 @@
# CHECK: chy %r15, 0
0xe3 0xf0 0x00 0x00 0x00 0x79
+# CHECK: cih %r0, -2147483648
+0xcc 0x0d 0x80 0x00 0x00 0x00
+
+# CHECK: cih %r0, -1
+0xcc 0x0d 0xff 0xff 0xff 0xff
+
+# CHECK: cih %r0, 0
+0xcc 0x0d 0x00 0x00 0x00 0x00
+
+# CHECK: cih %r0, 1
+0xcc 0x0d 0x00 0x00 0x00 0x01
+
+# CHECK: cih %r0, 2147483647
+0xcc 0x0d 0x7f 0xff 0xff 0xff
+
+# CHECK: cih %r15, 0
+0xcc 0xfd 0x00 0x00 0x00 0x00
+
# CHECK: clc 0(1), 0
0xd5 0x00 0x00 0x00 0x00 0x00
@@ -1573,6 +1591,18 @@
# CHECK: cli 4095(%r15), 42
0x95 0x2a 0xff 0xff
+# CHECK: clih %r0, 0
+0xcc 0x0f 0x00 0x00 0x00 0x00
+
+# CHECK: clih %r0, 1
+0xcc 0x0f 0x00 0x00 0x00 0x01
+
+# CHECK: clih %r0, 4294967295
+0xcc 0x0f 0xff 0xff 0xff 0xff
+
+# CHECK: clih %r15, 0
+0xcc 0xff 0x00 0x00 0x00 0x00
+
# CHECK: cliy -524288, 0
0xeb 0x00 0x00 0x00 0x80 0x55
diff --git a/test/MC/SystemZ/insn-bad-z196.s b/test/MC/SystemZ/insn-bad-z196.s
index 24640018a5..e387f149fd 100644
--- a/test/MC/SystemZ/insn-bad-z196.s
+++ b/test/MC/SystemZ/insn-bad-z196.s
@@ -33,6 +33,22 @@
aih %r0, (1 << 31)
#CHECK: error: invalid operand
+#CHECK: cih %r0, (-1 << 31) - 1
+#CHECK: error: invalid operand
+#CHECK: cih %r0, (1 << 31)
+
+ cih %r0, (-1 << 31) - 1
+ cih %r0, (1 << 31)
+
+#CHECK: error: invalid operand
+#CHECK: clih %r0, -1
+#CHECK: error: invalid operand
+#CHECK: clih %r0, (1 << 32)
+
+ clih %r0, -1
+ clih %r0, (1 << 32)
+
+#CHECK: error: invalid operand
#CHECK: fidbra %f0, 0, %f0, -1
#CHECK: error: invalid operand
#CHECK: fidbra %f0, 0, %f0, 16
diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index eadb9f0997..8de20612ca 100644
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -679,6 +679,11 @@
chy %r0, -524289
chy %r0, 524288
+#CHECK: error: {{(instruction requires: high-word)?}}
+#CHECK: cih %r0, 0
+
+ cih %r0, 0
+
#CHECK: error: invalid operand
#CHECK: cij %r0, -129, 0, 0
#CHECK: error: invalid operand
@@ -961,6 +966,11 @@
cli 0, -1
cli 0, 256
+#CHECK: error: {{(instruction requires: high-word)?}}
+#CHECK: clih %r0, 0
+
+ clih %r0, 0
+
#CHECK: error: invalid operand
#CHECK: clij %r0, -1, 0, 0
#CHECK: error: invalid operand
diff --git a/test/MC/SystemZ/insn-good-z196.s b/test/MC/SystemZ/insn-good-z196.s
index 2bc27bd58a..93687ea81f 100644
--- a/test/MC/SystemZ/insn-good-z196.s
+++ b/test/MC/SystemZ/insn-good-z196.s
@@ -135,6 +135,30 @@
ark %r15,%r0,%r0
ark %r7,%r8,%r9
+#CHECK: cih %r0, -2147483648 # encoding: [0xcc,0x0d,0x80,0x00,0x00,0x00]
+#CHECK: cih %r0, -1 # encoding: [0xcc,0x0d,0xff,0xff,0xff,0xff]
+#CHECK: cih %r0, 0 # encoding: [0xcc,0x0d,0x00,0x00,0x00,0x00]
+#CHECK: cih %r0, 1 # encoding: [0xcc,0x0d,0x00,0x00,0x00,0x01]
+#CHECK: cih %r0, 2147483647 # encoding: [0xcc,0x0d,0x7f,0xff,0xff,0xff]
+#CHECK: cih %r15, 0 # encoding: [0xcc,0xfd,0x00,0x00,0x00,0x00]
+
+ cih %r0, -1 << 31
+ cih %r0, -1
+ cih %r0, 0
+ cih %r0, 1
+ cih %r0, (1 << 31) - 1
+ cih %r15, 0
+
+#CHECK: clih %r0, 0 # encoding: [0xcc,0x0f,0x00,0x00,0x00,0x00]
+#CHECK: clih %r0, 1 # encoding: [0xcc,0x0f,0x00,0x00,0x00,0x01]
+#CHECK: clih %r0, 4294967295 # encoding: [0xcc,0x0f,0xff,0xff,0xff,0xff]
+#CHECK: clih %r15, 0 # encoding: [0xcc,0xff,0x00,0x00,0x00,0x00]
+
+ clih %r0, 0
+ clih %r0, 1
+ clih %r0, (1 << 32) - 1
+ clih %r15, 0
+
#CHECK: fidbra %f0, 0, %f0, 0 # encoding: [0xb3,0x5f,0x00,0x00]
#CHECK: fidbra %f0, 0, %f0, 15 # encoding: [0xb3,0x5f,0x0f,0x00]
#CHECK: fidbra %f0, 0, %f15, 0 # encoding: [0xb3,0x5f,0x00,0x0f]