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authorDan Gohman <gohman@apple.com>2008-05-02 21:30:02 +0000
committerDan Gohman <gohman@apple.com>2008-05-02 21:30:02 +0000
commit1d9cd506774f2d51b7e7315b07fdbcc05efebe4a (patch)
tree5fb78373be257cfcaf5f1a6971329d0c0a8b1054 /test
parent48e8c80e1791adb7a07b8fd6e27edcdfbb756950 (diff)
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Fix a mistake in the computation of leading zeros for udiv.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50591 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/Transforms/InstCombine/udiv-simplify-bug-0.ll14
-rw-r--r--test/Transforms/InstCombine/udiv-simplify-bug-1.ll25
2 files changed, 39 insertions, 0 deletions
diff --git a/test/Transforms/InstCombine/udiv-simplify-bug-0.ll b/test/Transforms/InstCombine/udiv-simplify-bug-0.ll
new file mode 100644
index 0000000000..5bcaa66366
--- /dev/null
+++ b/test/Transforms/InstCombine/udiv-simplify-bug-0.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {ret i64 0} | count 2
+
+define i64 @foo(i32 %x) nounwind {
+ %y = lshr i32 %x, 1
+ %r = udiv i32 %y, -1
+ %z = sext i32 %r to i64
+ ret i64 %z
+}
+define i64 @bar(i32 %x) nounwind {
+ %y = lshr i32 %x, 31
+ %r = udiv i32 %y, 3
+ %z = sext i32 %r to i64
+ ret i64 %z
+}
diff --git a/test/Transforms/InstCombine/udiv-simplify-bug-1.ll b/test/Transforms/InstCombine/udiv-simplify-bug-1.ll
new file mode 100644
index 0000000000..6e76bcfd75
--- /dev/null
+++ b/test/Transforms/InstCombine/udiv-simplify-bug-1.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis > %t1.ll
+; RUN: grep udiv %t1.ll | count 3
+; RUN: grep zext %t1.ll | count 3
+; PR2274
+
+; The udiv instructions shouldn't be optimized away, and the
+; sext instructions should be optimized to zext.
+
+define i64 @foo(i32 %x) nounwind {
+ %r = udiv i32 %x, -1
+ %z = sext i32 %r to i64
+ ret i64 %z
+}
+define i64 @bar(i32 %x) nounwind {
+ %y = lshr i32 %x, 30
+ %r = udiv i32 %y, 3
+ %z = sext i32 %r to i64
+ ret i64 %z
+}
+define i64 @qux(i32 %x, i32 %v) nounwind {
+ %y = lshr i32 %x, 31
+ %r = udiv i32 %y, %v
+ %z = sext i32 %r to i64
+ ret i64 %z
+}