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authorDerek Schuff <dschuff@google.com>2013-04-18 17:41:08 +0000
committerDerek Schuff <dschuff@google.com>2013-04-18 17:41:08 +0000
commit2061dcf0e4266c487185f1b3d8e23b93e2dd68fb (patch)
treef8fae2e562fa6d2839d321e4a7481e6724d746cc /test
parenta3fb330d05e85107d01ecf133355d0c6a88196fd (diff)
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Allow misaligned stores in x86 fast-isel.
In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and handled by the DAG-based ISel. However, X86FastISel::X86SelectLoad() makes no such requirement. There doesn't appear to be an x86 architectural correctness issue with allowing potentially unaligned store instructions. This patch removes this restriction. Patch by Jim Stichnot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/fast-isel-unaligned-store.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/X86/fast-isel-unaligned-store.ll b/test/CodeGen/X86/fast-isel-unaligned-store.ll
new file mode 100644
index 0000000000..7ce7f676ad
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-unaligned-store.ll
@@ -0,0 +1,18 @@
+; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s
+; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s
+
+define i32 @test_store_32(i32* nocapture %addr, i32 %value) {
+entry:
+ store i32 %value, i32* %addr, align 1
+ ret i32 %value
+}
+
+; CHECK: ret
+
+define i16 @test_store_16(i16* nocapture %addr, i16 %value) {
+entry:
+ store i16 %value, i16* %addr, align 1
+ ret i16 %value
+}
+
+; CHECK: ret