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| author | Cameron McInally <cameron.mcinally@nyu.edu> | 2013-11-04 19:14:56 +0000 |
|---|---|---|
| committer | Cameron McInally <cameron.mcinally@nyu.edu> | 2013-11-04 19:14:56 +0000 |
| commit | 2e58f1d4cf95e44674cbc4975e713f9293255d5f (patch) | |
| tree | 06b75b5e5593bf1ea6c1142e0b3839dcf3d91949 /test | |
| parent | 827ffff4b15fc7204087743f4c81419179e54ee6 (diff) | |
| download | llvm-2e58f1d4cf95e44674cbc4975e713f9293255d5f.tar.gz llvm-2e58f1d4cf95e44674cbc4975e713f9293255d5f.tar.bz2 llvm-2e58f1d4cf95e44674cbc4975e713f9293255d5f.tar.xz | |
Add support for AVX512 masked vector blend intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194006 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/avx512-intrinsics.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx512-intrinsics.ll b/test/CodeGen/X86/avx512-intrinsics.ll index 0570b21e78..5bdabf2349 100644 --- a/test/CodeGen/X86/avx512-intrinsics.ll +++ b/test/CodeGen/X86/avx512-intrinsics.ll @@ -340,3 +340,35 @@ define <8 x i64> @test_mask_conflict_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) { ret <8 x i64> %res } declare <8 x i64> @llvm.x86.avx512.conflict.q.mask.512(<8 x i64>, <8 x i1>,<8 x i64>) nounwind readonly + +define <16 x float> @test_x86_mskblend_ps_512(i16 %a0, <16 x float> %a1, <16 x float> %a2) { + ; CHECK: vblendmps + %m0 = bitcast i16 %a0 to <16 x i1> + %res = call <16 x float> @llvm.x86.avx512.mskblend.ps.512(<16 x i1> %m0, <16 x float> %a1, <16 x float> %a2) ; <<16 x float>> [#uses=1] + ret <16 x float> %res +} +declare <16 x float> @llvm.x86.avx512.mskblend.ps.512(<16 x i1> %a0, <16 x float> %a1, <16 x float> %a2) nounwind readonly + +define <8 x double> @test_x86_mskblend_pd_512(i8 %a0, <8 x double> %a1, <8 x double> %a2) { + ; CHECK: vblendmpd + %m0 = bitcast i8 %a0 to <8 x i1> + %res = call <8 x double> @llvm.x86.avx512.mskblend.pd.512(<8 x i1> %m0, <8 x double> %a1, <8 x double> %a2) ; <<8 x double>> [#uses=1] + ret <8 x double> %res +} +declare <8 x double> @llvm.x86.avx512.mskblend.pd.512(<8 x i1> %a0, <8 x double> %a1, <8 x double> %a2) nounwind readonly + +define <16 x i32> @test_x86_mskblend_d_512(i16 %a0, <16 x i32> %a1, <16 x i32> %a2) { + ; CHECK: vpblendmd + %m0 = bitcast i16 %a0 to <16 x i1> + %res = call <16 x i32> @llvm.x86.avx512.mskblend.d.512(<16 x i1> %m0, <16 x i32> %a1, <16 x i32> %a2) ; <<16 x i32>> [#uses=1] + ret <16 x i32> %res +} +declare <16 x i32> @llvm.x86.avx512.mskblend.d.512(<16 x i1> %a0, <16 x i32> %a1, <16 x i32> %a2) nounwind readonly + +define <8 x i64> @test_x86_mskblend_q_512(i8 %a0, <8 x i64> %a1, <8 x i64> %a2) { + ; CHECK: vpblendmq + %m0 = bitcast i8 %a0 to <8 x i1> + %res = call <8 x i64> @llvm.x86.avx512.mskblend.q.512(<8 x i1> %m0, <8 x i64> %a1, <8 x i64> %a2) ; <<8 x i64>> [#uses=1] + ret <8 x i64> %res +} +declare <8 x i64> @llvm.x86.avx512.mskblend.q.512(<8 x i1> %a0, <8 x i64> %a1, <8 x i64> %a2) nounwind readonly |