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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-04-05 23:31:20 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-04-05 23:31:20 +0000 |
| commit | 2fc7443498aee66e0112ef65a8466fa98d46e712 (patch) | |
| tree | 8d61a142f96aaf8356c694ffe9fee3334a21bd17 /test | |
| parent | ff56d1a2011f239e114267c13302ea26db4f8046 (diff) | |
| download | llvm-2fc7443498aee66e0112ef65a8466fa98d46e712.tar.gz llvm-2fc7443498aee66e0112ef65a8466fa98d46e712.tar.bz2 llvm-2fc7443498aee66e0112ef65a8466fa98d46e712.tar.xz | |
R600/SI: Avoid generating S_MOVs with 64-bit immediates v2
SITargetLowering::analyzeImmediate() was converting the 64-bit values
to 32-bit and then checking if they were an inline immediate. Some
of these conversions caused this check to succeed and produced
S_MOV instructions with 64-bit immediates, which are illegal.
v2:
- Clean up logic
Reviewed-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178927 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/R600/imm.ll | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/test/CodeGen/R600/imm.ll b/test/CodeGen/R600/imm.ll new file mode 100644 index 0000000000..b43f91722e --- /dev/null +++ b/test/CodeGen/R600/imm.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s + +; XXX: Enable once SI supports buffer stores +; XFAIL: * + +; Use a 64-bit value with lo bits that can be represented as an inline constant +; CHECK: @i64_imm_inline_lo +; CHECK: S_MOV_B32 [[LO:SGPR[0-9]+]], 5 +; CHECK: V_MOV_B32_e32 [[LO_VGPR:VGPR[0-9]+]], [[LO]] +; CHECK: BUFFER_STORE_DWORDX2 [[LO_VGPR]]_ +define void @i64_imm_inline_lo(i64 addrspace(1) *%out) { +entry: + store i64 1311768464867721221, i64 addrspace(1) *%out ; 0x1234567800000005 + ret void +} + +; Use a 64-bit value with hi bits that can be represented as an inline constant +; CHECK: @i64_imm_inline_hi +; CHECK: S_MOV_B32 [[HI:SGPR[0-9]+]], 5 +; CHECK: V_MOV_B32_e32 [[HI_VGPR:VGPR[0-9]+]], [[HI]] +; CHECK: BUFFER_STORE_DWORDX2 {{VGPR[0-9]+}}_[[HI_VGPR]] +define void @i64_imm_inline_hi(i64 addrspace(1) *%out) { +entry: + store i64 21780256376, i64 addrspace(1) *%out ; 0x0000000512345678 + ret void +} |