diff options
| author | Logan Chien <tzuhsiang.chien@gmail.com> | 2014-03-27 16:28:09 +0000 |
|---|---|---|
| committer | Logan Chien <tzuhsiang.chien@gmail.com> | 2014-03-27 16:28:09 +0000 |
| commit | 3b0efb2f8949317c695b4f6e12671219ea165de5 (patch) | |
| tree | df430dd635c3a98607b4e56fdd36755fbe819625 /test | |
| parent | f165cf7ce8d8df9b136604b1542dd9b4980793fe (diff) | |
| download | llvm-3b0efb2f8949317c695b4f6e12671219ea165de5.tar.gz llvm-3b0efb2f8949317c695b4f6e12671219ea165de5.tar.bz2 llvm-3b0efb2f8949317c695b4f6e12671219ea165de5.tar.xz | |
[AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS
Lower SHL_PARTS, SRA_PARTS and SRL_PARTS to perform 128-bit integer shift
Patch by GuanHong Liu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204940 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/AArch64/i128-shift.ll | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/i128-shift.ll b/test/CodeGen/AArch64/i128-shift.ll new file mode 100644 index 0000000000..d786d44896 --- /dev/null +++ b/test/CodeGen/AArch64/i128-shift.ll @@ -0,0 +1,43 @@ +; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s + +define i128 @test_i128_lsl(i128 %a, i32 %shift) { +; CHECK-LABEL: test_i128_lsl: + + %sh_prom = zext i32 %shift to i128 + %shl = shl i128 %a, %sh_prom + +; CHECK: movz [[SIXTYFOUR:x[0-9]+]], #64 +; CHECK-NEXT: sub [[REVSHAMT:x[0-9]+]], [[SIXTYFOUR]], [[SHAMT_32:w[0-9]+]], uxtw +; CHECK-NEXT: lsr [[TMP1:x[0-9]+]], [[LO:x[0-9]+]], [[REVSHAMT]] +; CHECK: lsl [[TMP2:x[0-9]+]], [[HI:x[0-9]+]], [[SHAMT:x[0-9]+]] +; CHECK-NEXT: orr [[FALSEVAL:x[0-9]+]], [[TMP1]], [[TMP2]] +; CHECK-NEXT: sub [[EXTRASHAMT:x[0-9]+]], [[SHAMT]], #64 +; CHECK-NEXT: lsl [[TMP3:x[0-9]+]], [[LO]], [[EXTRASHAMT]] +; CHECK-NEXT: cmp [[EXTRASHAMT]], #0 +; CHECK-NEXT: csel [[RESULTHI:x[0-9]+]], [[TMP3]], [[FALSEVAL]], ge +; CHECK-NEXT: lsl [[TMP4:x[0-9]+]], [[LO]], [[SHAMT]] +; CHECK-NEXT: csel [[RESULTLO:x[0-9]+]], xzr, [[TMP4]], ge + + ret i128 %shl +} + +define i128 @test_i128_shr(i128 %a, i32 %shift) { +; CHECK-LABEL: test_i128_shr: + + %sh_prom = zext i32 %shift to i128 + %shr = lshr i128 %a, %sh_prom + +; CHECK: movz [[SIXTYFOUR]], #64 +; CHECK-NEXT: sub [[REVSHAMT:x[0-9]+]], [[SIXTYFOUR]], [[SHAMT_32:w[0-9]+]], uxtw +; CHECK-NEXT: lsl [[TMP2:x[0-9]+]], [[HI:x[0-9]+]], [[REVSHAMT]] +; CHECK: lsr [[TMP1:x[0-9]+]], [[LO:x[0-9]+]], [[SHAMT:x[0-9]+]] +; CHECK-NEXT: orr [[FALSEVAL:x[0-9]+]], [[TMP1]], [[TMP2]] +; CHECK-NEXT: sub [[EXTRASHAMT:x[0-9]+]], [[SHAMT]], #64 +; CHECK-NEXT: lsr [[TRUEVAL:x[0-9]+]], [[HI]], [[EXTRASHAMT]] +; CHECK-NEXT: cmp [[EXTRASHAMT]], #0 +; CHECK-NEXT: csel [[RESULTLO:x[0-9]+]], [[TRUEVAL]], [[FALSEVAL]], ge +; CHECK-NEXT: lsr [[TMP3:x[0-9]+]], [[HI]], [[SHAMT]] +; CHECK-NEXT: csel [[RESULTHI:x[0-9]+]], xzr, [[TMP3]], ge + + ret i128 %shr +} |