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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-26 17:22:30 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-26 17:22:30 +0000 |
| commit | 3cd8cf6bbd76c7c52a2e7075579c069542f61696 (patch) | |
| tree | f995b832cafaf560b8485d6d1709bce9f2036832 /test | |
| parent | 2711c0a68b9127064f1d9efabe6ac7a6de5eca2c (diff) | |
| download | llvm-3cd8cf6bbd76c7c52a2e7075579c069542f61696.tar.gz llvm-3cd8cf6bbd76c7c52a2e7075579c069542f61696.tar.bz2 llvm-3cd8cf6bbd76c7c52a2e7075579c069542f61696.tar.xz | |
R600/SI: Add FP mode bits to binary.
The default rounding mode to initialize the mode register needs
to be reported to the runtime. Fill in other bits a kernel
may be interested in setting for future use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/R600/default-fp-mode.ll | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/test/CodeGen/R600/default-fp-mode.ll b/test/CodeGen/R600/default-fp-mode.ll new file mode 100644 index 0000000000..214b2c2036 --- /dev/null +++ b/test/CodeGen/R600/default-fp-mode.ll @@ -0,0 +1,10 @@ +; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s + +; SI-LABEL: @test_kernel +; SI: FloatMode: 240 +; SI: IeeeMode: 0 +define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind { + store float 0.0, float addrspace(1)* %out0 + store double 0.0, double addrspace(1)* %out1 + ret void +} |