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authorJustin Holewinski <jholewinski@nvidia.com>2012-11-29 14:26:24 +0000
committerJustin Holewinski <jholewinski@nvidia.com>2012-11-29 14:26:24 +0000
commit3d200255d5b93344c1ab0a5ba4b47a52cfa5893e (patch)
tree8b2469b4bddabff7cec81ed6a162701eded27e00 /test
parent84af05e1ba3a97d98b76929df858edc7b8b0d252 (diff)
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Allow targets to prefer TypeSplitVector over TypePromoteInteger when computing the legalization method for vectors
For some targets, it is desirable to prefer scalarizing <N x i1> instead of promoting to a larger legal type, such as <N x i32>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168882 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/NVPTX/vector-compare.ll19
1 files changed, 19 insertions, 0 deletions
diff --git a/test/CodeGen/NVPTX/vector-compare.ll b/test/CodeGen/NVPTX/vector-compare.ll
new file mode 100644
index 0000000000..2180499952
--- /dev/null
+++ b/test/CodeGen/NVPTX/vector-compare.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_20
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_20
+
+; This test makes sure that the result of vector compares are properly
+; scalarized. If codegen fails, then the type legalizer incorrectly
+; tried to promote <2 x i1> to <2 x i8> and instruction selection failed.
+
+define void @foo(<2 x i32>* %a, <2 x i32>* %b, i32* %r1, i32* %r2) {
+ %aval = load <2 x i32>* %a
+ %bval = load <2 x i32>* %b
+ %res = icmp slt <2 x i32> %aval, %bval
+ %t1 = extractelement <2 x i1> %res, i32 0
+ %t2 = extractelement <2 x i1> %res, i32 1
+ %t1a = zext i1 %t1 to i32
+ %t2a = zext i1 %t2 to i32
+ store i32 %t1a, i32* %r1
+ store i32 %t2a, i32* %r2
+ ret void
+}