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| author | Jyotsna Verma <jverma@codeaurora.org> | 2013-02-04 15:52:56 +0000 |
|---|---|---|
| committer | Jyotsna Verma <jverma@codeaurora.org> | 2013-02-04 15:52:56 +0000 |
| commit | 3e1635d08ce786d32dd53f772ccc6a8b4f720ff3 (patch) | |
| tree | ea19b98b2d573fb1235870381aaf1a43406f53cf /test | |
| parent | 0d3731478e6242cceae7c006a071b8b17f7fd298 (diff) | |
| download | llvm-3e1635d08ce786d32dd53f772ccc6a8b4f720ff3.tar.gz llvm-3e1635d08ce786d32dd53f772ccc6a8b4f720ff3.tar.bz2 llvm-3e1635d08ce786d32dd53f772ccc6a8b4f720ff3.tar.xz | |
Hexagon: Add V4 combine instructions and some more Def Pats for V2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174331 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/Hexagon/combine_ir.ll | 55 | ||||
| -rw-r--r-- | test/CodeGen/Hexagon/struct_args.ll | 2 |
2 files changed, 56 insertions, 1 deletions
diff --git a/test/CodeGen/Hexagon/combine_ir.ll b/test/CodeGen/Hexagon/combine_ir.ll new file mode 100644 index 0000000000..921ce9928e --- /dev/null +++ b/test/CodeGen/Hexagon/combine_ir.ll @@ -0,0 +1,55 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; CHECK: word +; CHECK: combine(#0 + +define void @word(i32* nocapture %a) nounwind { +entry: + %0 = load i32* %a, align 4, !tbaa !0 + %1 = zext i32 %0 to i64 + %add.ptr = getelementptr inbounds i32* %a, i32 1 + %2 = load i32* %add.ptr, align 4, !tbaa !0 + %3 = zext i32 %2 to i64 + %4 = shl nuw i64 %3, 32 + %ins = or i64 %4, %1 + tail call void @bar(i64 %ins) nounwind + ret void +} + +declare void @bar(i64) + +; CHECK: halfword +; CHECK: combine(#0 + +define void @halfword(i16* nocapture %a) nounwind { +entry: + %0 = load i16* %a, align 2, !tbaa !3 + %1 = zext i16 %0 to i64 + %add.ptr = getelementptr inbounds i16* %a, i32 1 + %2 = load i16* %add.ptr, align 2, !tbaa !3 + %3 = zext i16 %2 to i64 + %4 = shl nuw nsw i64 %3, 16 + %ins = or i64 %4, %1 + tail call void @bar(i64 %ins) nounwind + ret void +} + +; CHECK: byte +; CHECK: combine(#0 + +define void @byte(i8* nocapture %a) nounwind { +entry: + %0 = load i8* %a, align 1, !tbaa !1 + %1 = zext i8 %0 to i64 + %add.ptr = getelementptr inbounds i8* %a, i32 1 + %2 = load i8* %add.ptr, align 1, !tbaa !1 + %3 = zext i8 %2 to i64 + %4 = shl nuw nsw i64 %3, 8 + %ins = or i64 %4, %1 + tail call void @bar(i64 %ins) nounwind + ret void +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} +!3 = metadata !{metadata !"short", metadata !1} diff --git a/test/CodeGen/Hexagon/struct_args.ll b/test/CodeGen/Hexagon/struct_args.ll index e488f33c3d..f91300b506 100644 --- a/test/CodeGen/Hexagon/struct_args.ll +++ b/test/CodeGen/Hexagon/struct_args.ll @@ -1,5 +1,5 @@ ; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s -; CHECK: r{{[0-9]}}:{{[0-9]}} = combine(r{{[0-9]}}, r{{[0-9]}}) +; CHECK: r{{[0-9]}}:{{[0-9]}} = combine({{r[0-9]|#0}}, r{{[0-9]}}) ; CHECK: r{{[0-9]}}:{{[0-9]}} |= asl(r{{[0-9]}}:{{[0-9]}}, #32) %struct.small = type { i32, i32 } |