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| author | Evan Cheng <evan.cheng@apple.com> | 2010-09-10 01:29:16 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-09-10 01:29:16 +0000 |
| commit | 3ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1 (patch) | |
| tree | ffcb01b1621bcedb427d701cfaee9ea9a19b0a2c /test | |
| parent | 920a2089d9b737820631bc6de4c4fb9fa9ad1e07 (diff) | |
| download | llvm-3ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1.tar.gz llvm-3ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1.tar.bz2 llvm-3ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1.tar.xz | |
Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/ifcvt10.ll | 30 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll | 2 |
2 files changed, 31 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/ifcvt10.ll b/test/CodeGen/ARM/ifcvt10.ll new file mode 100644 index 0000000000..3fd6a97c76 --- /dev/null +++ b/test/CodeGen/ARM/ifcvt10.ll @@ -0,0 +1,30 @@ +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s +; rdar://8402126 +; Make sure if-converter is not predicating vldmia and ldmia. These are +; micro-coded and would have long issue latency even if predicated on +; false predicate. + +%0 = type { float, float, float, float } +%pln = type { %vec, float } +%vec = type { [4 x float] } + +define arm_aapcs_vfpcc float @aaa(%vec* nocapture %ustart, %vec* nocapture %udir, %vec* nocapture %vstart, %vec* nocapture %vdir, %vec* %upoint, %vec* %vpoint) { +; CHECK: aaa: +; CHECK: vldr.32 +; CHECK-NOT: vldrne +; CHECK-NOT: vldmiane +; CHECK-NOT: ldmiane +; CHECK: vldmia sp! +; CHECK: ldmia sp! +entry: + br i1 undef, label %bb81, label %bb48 + +bb48: ; preds = %entry + %0 = call arm_aapcs_vfpcc %0 @bbb(%pln* undef, %vec* %vstart, %vec* undef) nounwind ; <%0> [#uses=0] + ret float 0.000000e+00 + +bb81: ; preds = %entry + ret float 0.000000e+00 +} + +declare arm_aapcs_vfpcc %0 @bbb(%pln* nocapture, %vec* nocapture, %vec* nocapture) nounwind diff --git a/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll b/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll index c5fc5098cd..f91e1c9feb 100644 --- a/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll +++ b/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O3 -relocation-model=pic -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -O3 -relocation-model=pic | FileCheck %s ; rdar://8115404 ; Tail merging must not split an IT block. |