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authorChris Lattner <sabre@nondot.org>2007-07-15 20:54:51 +0000
committerChris Lattner <sabre@nondot.org>2007-07-15 20:54:51 +0000
commit4241e4da85caf46d1f6457e99029dd37cc27be72 (patch)
treeefd1bfb2406bca0aa5dd42bcb3d4840e4d286218 /test
parenta0141b90a34da612e348e2c7af41ec571a6fd143 (diff)
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Implement shift-simplify.ll:test[45].
First teach instcombine that sign bit checks only demand the sign bit, this allows simplify demanded bits to hack on expressions better. Second, teach instcombine that ashr is useless if only the sign bit is demanded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39880 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/Transforms/InstCombine/shift-simplify.ll12
1 files changed, 12 insertions, 0 deletions
diff --git a/test/Transforms/InstCombine/shift-simplify.ll b/test/Transforms/InstCombine/shift-simplify.ll
index 4c84612748..e028385839 100644
--- a/test/Transforms/InstCombine/shift-simplify.ll
+++ b/test/Transforms/InstCombine/shift-simplify.ll
@@ -28,3 +28,15 @@ define i1 @test3(i32 %X) {
ret i1 %tmp2
}
+define i1 @test4(i32 %X) {
+ %tmp1 = lshr i32 %X, 7
+ %tmp2 = icmp slt i32 %tmp1, 0
+ ret i1 %tmp2
+}
+
+define i1 @test5(i32 %X) {
+ %tmp1 = ashr i32 %X, 7
+ %tmp2 = icmp slt i32 %tmp1, 0
+ ret i1 %tmp2
+}
+