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author | Akira Hatanaka <ahatanaka@mips.com> | 2013-05-13 18:23:35 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-05-13 18:23:35 +0000 |
commit | 42f562a1694d24b41f36bbb4d4a086a2a470c625 (patch) | |
tree | 77e78bd7a2da75ad5133bb5924b6e0a9098bfad1 /test | |
parent | 4b6b53b0cec4fcf4d570daed3be41d6147d05224 (diff) | |
download | llvm-42f562a1694d24b41f36bbb4d4a086a2a470c625.tar.gz llvm-42f562a1694d24b41f36bbb4d4a086a2a470c625.tar.bz2 llvm-42f562a1694d24b41f36bbb4d4a086a2a470c625.tar.xz |
[mips] Add option -mno-ldc1-sdc1.
This option is used when the user wants to avoid emitting double precision FP
loads and stores. Double precision FP loads and stores are expanded to single
precision instructions after register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181718 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Mips/mno-ldc1-sdc1.ll | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/mno-ldc1-sdc1.ll b/test/CodeGen/Mips/mno-ldc1-sdc1.ll new file mode 100644 index 0000000000..eae9a2216a --- /dev/null +++ b/test/CodeGen/Mips/mno-ldc1-sdc1.ll @@ -0,0 +1,45 @@ +; RUN: llc -march=mipsel -relocation-model=pic -mno-ldc1-sdc1 < %s | \ +; RUN: FileCheck %s -check-prefix=LE-PIC +; RUN: llc -march=mipsel -relocation-model=static -mno-ldc1-sdc1 < %s | \ +; RUN: FileCheck %s -check-prefix=LE-STATIC +; RUN: llc -march=mips -relocation-model=pic -mno-ldc1-sdc1 < %s | \ +; RUN: FileCheck %s -check-prefix=BE-PIC +; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=CHECK-LDC1-SDC1 + +@g0 = common global double 0.000000e+00, align 8 + +; LE-PIC: test_ldc1: +; LE-PIC: lwc1 $f0, 0(${{[0-9]+}}) +; LE-PIC: lwc1 $f1, 4(${{[0-9]+}}) +; LE-STATIC: test_ldc1: +; LE-STATIC: lwc1 $f0, %lo(g0)(${{[0-9]+}}) +; LE-STATIC: lwc1 $f1, %lo(g0+4)(${{[0-9]+}}) +; BE-PIC: test_ldc1: +; BE-PIC: lwc1 $f1, 0(${{[0-9]+}}) +; BE-PIC: lwc1 $f0, 4(${{[0-9]+}}) +; CHECK-LDC1-SDC1: test_ldc1: +; CHECK-LDC1-SDC1: ldc1 $f{{[0-9]+}} + +define double @test_ldc1() { +entry: + %0 = load double* @g0, align 8 + ret double %0 +} + +; LE-PIC: test_sdc1: +; LE-PIC: swc1 $f12, 0(${{[0-9]+}}) +; LE-PIC: swc1 $f13, 4(${{[0-9]+}}) +; LE-STATIC: test_sdc1: +; LE-STATIC: swc1 $f12, %lo(g0)(${{[0-9]+}}) +; LE-STATIC: swc1 $f13, %lo(g0+4)(${{[0-9]+}}) +; BE-PIC: test_sdc1: +; BE-PIC: swc1 $f13, 0(${{[0-9]+}}) +; BE-PIC: swc1 $f12, 4(${{[0-9]+}}) +; CHECK-LDC1-SDC1: test_sdc1: +; CHECK-LDC1-SDC1: sdc1 $f{{[0-9]+}} + +define void @test_sdc1(double %a) { +entry: + store double %a, double* @g0, align 8 + ret void +} |