diff options
| author | Weiming Zhao <weimingz@codeaurora.org> | 2014-01-13 18:47:54 +0000 |
|---|---|---|
| committer | Weiming Zhao <weimingz@codeaurora.org> | 2014-01-13 18:47:54 +0000 |
| commit | 436f2975ace26abec6a686ef74fec728d5d52aa4 (patch) | |
| tree | e60982a9cdcfbbf5e8b370ef60de2134997f9fca /test | |
| parent | 99c7fec2c94bd44fd16ba50340896287438e6a0e (diff) | |
| download | llvm-436f2975ace26abec6a686ef74fec728d5d52aa4.tar.gz llvm-436f2975ace26abec6a686ef74fec728d5d52aa4.tar.bz2 llvm-436f2975ace26abec6a686ef74fec728d5d52aa4.tar.xz | |
Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks
The issue is caused when Post-RA scheduler reorders a bundle instruction
(IT block). However, it only flips the CPSR liveness of the bundle instruction,
leaves the instructions inside the bundle unchanged, which causes inconstancy and crashes
Thumb2SizeReduction.cpp::ReduceMBB().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199127 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll b/test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll index dadbdc5ced..48d76241d5 100644 --- a/test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll +++ b/test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-ios -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 +; RUN: llc < %s -mtriple=thumbv8-none-linux-gnueabi | FileCheck %s %struct.LIST_NODE.0.16 = type { %struct.LIST_NODE.0.16*, i8* } @@ -26,3 +27,24 @@ bb3: ; preds = %bb2, %entry bb5: ; preds = %bb3, %bb ret %struct.LIST_NODE.0.16* null } + +declare void @use(i32) +define double @find_max_double(i32 %n, double* nocapture readonly %aa) { +entry: +;CHECK-LABEL: find_max_double: + br i1 undef, label %for.body, label %for.end + +for.body: ; preds = %for.body, %entry + %0 = load double* null, align 8 + %cmp2.6 = fcmp ogt double %0, 0.000000e+00 + %idx.1.6 = select i1 %cmp2.6, i32 undef, i32 0 + %idx.1.7 = select i1 undef, i32 undef, i32 %idx.1.6 + %max.1.7 = select i1 undef, double 0.000000e+00, double undef + br i1 undef, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + %max.0.lcssa = phi double [ undef, %entry ], [ %max.1.7, %for.body ] + %idx.0.lcssa = phi i32 [ 0, %entry ], [ %idx.1.7, %for.body ] + tail call void @use(i32 %idx.0.lcssa) + ret double %max.0.lcssa +} |