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author | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2014-06-10 13:11:35 +0000 |
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committer | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2014-06-10 13:11:35 +0000 |
commit | 45a31492d5475a1744966a0cd5e631694b29f953 (patch) | |
tree | 1de64d9289e04769ccf7bf00324df191e33f9634 /test | |
parent | 8316a97e024de3b335386922a6c3b6e1a7b197f5 (diff) | |
download | llvm-45a31492d5475a1744966a0cd5e631694b29f953.tar.gz llvm-45a31492d5475a1744966a0cd5e631694b29f953.tar.bz2 llvm-45a31492d5475a1744966a0cd5e631694b29f953.tar.xz |
Condition codes AL and NV are invalid in the aliases that use
inverted condition codes (CINC, CINV, CNEG, CSET, and CSETM).
Matching aliases based on "immediate classes", when disassembling,
wasn't previously supported, hence adding MCOperandPredicate
into class Operand, and implementing the support for it
in AsmWriterEmitter.
The parsing for those aliases was already custom, so just adding
the missing condition into AArch64AsmParser::parseCondCode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210528 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/MC/AArch64/basic-a64-diagnostics.s | 20 | ||||
-rw-r--r-- | test/MC/Disassembler/AArch64/basic-a64-instructions.txt | 22 |
2 files changed, 40 insertions, 2 deletions
diff --git a/test/MC/AArch64/basic-a64-diagnostics.s b/test/MC/AArch64/basic-a64-diagnostics.s index a4a3b1379c..b33891cc3d 100644 --- a/test/MC/AArch64/basic-a64-diagnostics.s +++ b/test/MC/AArch64/basic-a64-diagnostics.s @@ -1345,39 +1345,59 @@ cset wsp, lt csetm sp, ge + cset w1, al + csetm x6, nv // CHECK-ERROR: error: invalid operand for instruction // CHECK-ERROR-NEXT: cset wsp, lt // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: invalid operand for instruction // CHECK-ERROR-NEXT: csetm sp, ge // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: cset w1, al +// CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: csetm x6, nv +// CHECK-ERROR-NEXT: ^ cinc w3, wsp, ne cinc sp, x9, eq + cinc x2, x0, nv // CHECK-ERROR: error: invalid operand for instruction // CHECK-ERROR-NEXT: cinc w3, wsp, ne // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: invalid operand for instruction // CHECK-ERROR-NEXT: cinc sp, x9, eq // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: cinc x2, x0, nv +// CHECK-ERROR-NEXT: ^ cinv w3, wsp, ne cinv sp, x9, eq + cinv w8, x7, nv // CHECK-ERROR: error: invalid operand for instruction // CHECK-ERROR-NEXT: cinv w3, wsp, ne // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: invalid operand for instruction // CHECK-ERROR-NEXT: cinv sp, x9, eq // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: cinv w8, x7, nv +// CHECK-ERROR-NEXT: ^ cneg w3, wsp, ne cneg sp, x9, eq + cneg x4, x5, al // CHECK-ERROR: error: invalid operand for instruction // CHECK-ERROR-NEXT: cneg w3, wsp, ne // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: invalid operand for instruction // CHECK-ERROR-NEXT: cneg sp, x9, eq // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: cneg x4, x5, al +// CHECK-ERROR-NEXT: ^ //------------------------------------------------------------------------------ // Data Processing (1 source) diff --git a/test/MC/Disassembler/AArch64/basic-a64-instructions.txt b/test/MC/Disassembler/AArch64/basic-a64-instructions.txt index 70c45c8513..23da001acc 100644 --- a/test/MC/Disassembler/AArch64/basic-a64-instructions.txt +++ b/test/MC/Disassembler/AArch64/basic-a64-instructions.txt @@ -945,10 +945,15 @@ # CHECK: cset x9, pl # CHECK: csetm w20, ne # CHECK: csetm x30, ge +# "cset w2, nv" and "csetm x3, al" are invalid aliases for these two +# CHECK: csinc w2, wzr, wzr, al +# CHECK: csinv x3, xzr, xzr, nv 0xe3 0x17 0x9f 0x1a 0xe9 0x47 0x9f 0x9a 0xf4 0x3 0x9f 0x5a 0xfe 0xb3 0x9f 0xda +0xe2,0xe7,0x9f,0x1a +0xe3,0xf3,0x9f,0xda # CHECK: cinc w3, w5, gt # CHECK: cinc wzr, w4, le @@ -956,12 +961,17 @@ # CHECK: cinc x3, x5, gt # CHECK: cinc xzr, x4, le # CHECK: cset x9, lt +# "cinc w5, w6, al" and "cinc x1, x2, nv" are invalid aliases for these two +# CHECK: csinc w5, w6, w6, nv +# CHECK: csinc x1, x2, x2, al 0xa3 0xd4 0x85 0x1a 0x9f 0xc4 0x84 0x1a 0xe9 0xa7 0x9f 0x1a 0xa3 0xd4 0x85 0x9a 0x9f 0xc4 0x84 0x9a 0xe9 0xa7 0x9f 0x9a +0xc5,0xf4,0x86,0x1a +0x41,0xe4,0x82,0x9a # CHECK: cinv w3, w5, gt # CHECK: cinv wzr, w4, le @@ -969,14 +979,17 @@ # CHECK: cinv x3, x5, gt # CHECK: cinv xzr, x4, le # CHECK: csetm x9, lt -# CHECK: cinv x0, x0, nv +# "cinv x1, x0, nv" and "cinv w9, w8, al" are invalid aliases for these two +# CHECK: csinv x1, x0, x0, al +# CHECK: csinv w9, w8, w8, nv 0xa3 0xd0 0x85 0x5a 0x9f 0xc0 0x84 0x5a 0xe9 0xa3 0x9f 0x5a 0xa3 0xd0 0x85 0xda 0x9f 0xc0 0x84 0xda 0xe9 0xa3 0x9f 0xda -0x00 0xe0 0x80 0xda +0x01 0xe0 0x80 0xda +0x09,0xf1,0x88,0x5a # CHECK: cneg w3, w5, gt # CHECK: cneg wzr, w4, le @@ -984,12 +997,17 @@ # CHECK: cneg x3, x5, gt # CHECK: cneg xzr, x4, le # CHECK: cneg x9, xzr, lt +# "cneg x4, x8, nv" and "cneg w5, w6, al" are invalid aliases for these two +# CHECK: csneg x4, x8, x8, al +# CHECK: csinv w9, w8, w8, nv 0xa3 0xd4 0x85 0x5a 0x9f 0xc4 0x84 0x5a 0xe9 0xa7 0x9f 0x5a 0xa3 0xd4 0x85 0xda 0x9f 0xc4 0x84 0xda 0xe9 0xa7 0x9f 0xda +0x04,0xe5,0x88,0xda +0x09,0xf1,0x88,0x5a #------------------------------------------------------------------------------ # Data-processing (1 source) |