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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-28 10:31:43 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-28 10:31:43 +0000 |
commit | 477168192c98e1f75a5bc6db3d34a177f327bd34 (patch) | |
tree | 29024a631a02e26dd2d4634abed8612c5469ca0c /test | |
parent | a6c3a4ee76ef8464d3c83472e15af521ade7eeb4 (diff) | |
download | llvm-477168192c98e1f75a5bc6db3d34a177f327bd34.tar.gz llvm-477168192c98e1f75a5bc6db3d34a177f327bd34.tar.bz2 llvm-477168192c98e1f75a5bc6db3d34a177f327bd34.tar.xz |
[SystemZ] Add support for TMHH, TMHL, TMLH and TMLL
For now just handles simple comparisons of an ANDed value with zero.
The CC value provides enough information to do any comparison for a
2-bit mask, and some nonzero comparisons with more populated masks,
but that's all future work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189469 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/SystemZ/int-cmp-44.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/SystemZ/int-cmp-46.ll | 99 | ||||
-rw-r--r-- | test/CodeGen/SystemZ/int-cmp-47.ll | 193 | ||||
-rw-r--r-- | test/MC/Disassembler/SystemZ/insns.txt | 48 | ||||
-rw-r--r-- | test/MC/SystemZ/insn-bad.s | 32 | ||||
-rw-r--r-- | test/MC/SystemZ/insn-good.s | 40 |
6 files changed, 414 insertions, 2 deletions
diff --git a/test/CodeGen/SystemZ/int-cmp-44.ll b/test/CodeGen/SystemZ/int-cmp-44.ll index b94f482f8b..ae0133f108 100644 --- a/test/CodeGen/SystemZ/int-cmp-44.ll +++ b/test/CodeGen/SystemZ/int-cmp-44.ll @@ -203,11 +203,11 @@ exit: ; comparisons with zero if the immediate covers the whole register. define i32 @f11(i32 %a, i32 %b, i32 *%dest) { ; CHECK-LABEL: f11: -; CHECK: nilf %r2, 100 +; CHECK: nilf %r2, 100000001 ; CHECK-NEXT: jl .L{{.*}} ; CHECK: br %r14 entry: - %res = and i32 %a, 100 + %res = and i32 %a, 100000001 %cmp = icmp ne i32 %res, 0 br i1 %cmp, label %exit, label %store diff --git a/test/CodeGen/SystemZ/int-cmp-46.ll b/test/CodeGen/SystemZ/int-cmp-46.ll new file mode 100644 index 0000000000..b46ca5e6d1 --- /dev/null +++ b/test/CodeGen/SystemZ/int-cmp-46.ll @@ -0,0 +1,99 @@ +; Test the use of TEST UNDER MASK for 32-bit operations. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s + +@g = global i32 0 + +; Check the lowest useful TMLL value. +define void @f1(i32 %a) { +; CHECK-LABEL: f1: +; CHECK: tmll %r2, 1 +; CHECK: je {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i32 %a, 1 + %cmp = icmp eq i32 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the high end of the TMLL range. +define void @f2(i32 %a) { +; CHECK-LABEL: f2: +; CHECK: tmll %r2, 65535 +; CHECK: jne {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i32 %a, 65535 + %cmp = icmp ne i32 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the lowest useful TMLH value, which is the next value up. +define void @f3(i32 %a) { +; CHECK-LABEL: f3: +; CHECK: tmlh %r2, 1 +; CHECK: jne {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i32 %a, 65536 + %cmp = icmp ne i32 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the next value up again, which cannot use TM. +define void @f4(i32 %a) { +; CHECK-LABEL: f4: +; CHECK-NOT: {{tm[lh].}} +; CHECK: br %r14 +entry: + %and = and i32 %a, 4294901759 + %cmp = icmp eq i32 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the high end of the TMLH range. +define void @f5(i32 %a) { +; CHECK-LABEL: f5: +; CHECK: tmlh %r2, 65535 +; CHECK: je {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i32 %a, 4294901760 + %cmp = icmp eq i32 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} diff --git a/test/CodeGen/SystemZ/int-cmp-47.ll b/test/CodeGen/SystemZ/int-cmp-47.ll new file mode 100644 index 0000000000..bf206ed9db --- /dev/null +++ b/test/CodeGen/SystemZ/int-cmp-47.ll @@ -0,0 +1,193 @@ +; Test the use of TEST UNDER MASK for 64-bit operations. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s + +@g = global i32 0 + +; Check the lowest useful TMLL value. +define void @f1(i64 %a) { +; CHECK-LABEL: f1: +; CHECK: tmll %r2, 1 +; CHECK: je {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 1 + %cmp = icmp eq i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the high end of the TMLL range. +define void @f2(i64 %a) { +; CHECK-LABEL: f2: +; CHECK: tmll %r2, 65535 +; CHECK: jne {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 65535 + %cmp = icmp ne i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the lowest useful TMLH value, which is the next value up. +define void @f3(i64 %a) { +; CHECK-LABEL: f3: +; CHECK: tmlh %r2, 1 +; CHECK: jne {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 65536 + %cmp = icmp ne i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the next value up again, which cannot use TM. +define void @f4(i64 %a) { +; CHECK-LABEL: f4: +; CHECK-NOT: {{tm[lh].}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 4294901759 + %cmp = icmp eq i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the high end of the TMLH range. +define void @f5(i64 %a) { +; CHECK-LABEL: f5: +; CHECK: tmlh %r2, 65535 +; CHECK: je {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 4294901760 + %cmp = icmp eq i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the lowest useful TMHL value. +define void @f6(i64 %a) { +; CHECK-LABEL: f6: +; CHECK: tmhl %r2, 1 +; CHECK: je {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 4294967296 + %cmp = icmp eq i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the next value up again, which cannot use TM. +define void @f7(i64 %a) { +; CHECK-LABEL: f7: +; CHECK-NOT: {{tm[lh].}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 4294967297 + %cmp = icmp ne i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the high end of the TMHL range. +define void @f8(i64 %a) { +; CHECK-LABEL: f8: +; CHECK: tmhl %r2, 65535 +; CHECK: jne {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 281470681743360 + %cmp = icmp ne i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the lowest useful TMHH value. +define void @f9(i64 %a) { +; CHECK-LABEL: f9: +; CHECK: tmhh %r2, 1 +; CHECK: jne {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 281474976710656 + %cmp = icmp ne i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} + +; Check the high end of the TMHH range. +define void @f10(i64 %a) { +; CHECK-LABEL: f10: +; CHECK: tmhh %r2, 65535 +; CHECK: je {{\.L.*}} +; CHECK: br %r14 +entry: + %and = and i64 %a, 18446462598732840960 + %cmp = icmp eq i64 %and, 0 + br i1 %cmp, label %exit, label %store + +store: + store i32 1, i32 *@g + br label %exit + +exit: + ret void +} diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt index 360785e94b..912837c9a6 100644 --- a/test/MC/Disassembler/SystemZ/insns.txt +++ b/test/MC/Disassembler/SystemZ/insns.txt @@ -6964,6 +6964,54 @@ # CHECK: sy %r15, 0 0xe3 0xf0 0x00 0x00 0x00 0x5b +# CHECK: tmhh %r0, 0 +0xa7 0x02 0x00 0x00 + +# CHECK: tmhh %r0, 32768 +0xa7 0x02 0x80 0x00 + +# CHECK: tmhh %r0, 65535 +0xa7 0x02 0xff 0xff + +# CHECK: tmhh %r15, 0 +0xa7 0xf2 0x00 0x00 + +# CHECK: tmhl %r0, 0 +0xa7 0x03 0x00 0x00 + +# CHECK: tmhl %r0, 32768 +0xa7 0x03 0x80 0x00 + +# CHECK: tmhl %r0, 65535 +0xa7 0x03 0xff 0xff + +# CHECK: tmhl %r15, 0 +0xa7 0xf3 0x00 0x00 + +# CHECK: tmlh %r0, 0 +0xa7 0x00 0x00 0x00 + +# CHECK: tmlh %r0, 32768 +0xa7 0x00 0x80 0x00 + +# CHECK: tmlh %r0, 65535 +0xa7 0x00 0xff 0xff + +# CHECK: tmlh %r15, 0 +0xa7 0xf0 0x00 0x00 + +# CHECK: tmll %r0, 0 +0xa7 0x01 0x00 0x00 + +# CHECK: tmll %r0, 32768 +0xa7 0x01 0x80 0x00 + +# CHECK: tmll %r0, 65535 +0xa7 0x01 0xff 0xff + +# CHECK: tmll %r15, 0 +0xa7 0xf1 0x00 0x00 + # CHECK: xgr %r0, %r0 0xb9 0x82 0x00 0x00 diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s index 1c478caa03..54979fdaf9 100644 --- a/test/MC/SystemZ/insn-bad.s +++ b/test/MC/SystemZ/insn-bad.s @@ -2864,6 +2864,38 @@ sy %r0, 524288 #CHECK: error: invalid operand +#CHECK: tmhh %r0, -1 +#CHECK: error: invalid operand +#CHECK: tmhh %r0, 0x10000 + + tmhh %r0, -1 + tmhh %r0, 0x10000 + +#CHECK: error: invalid operand +#CHECK: tmhl %r0, -1 +#CHECK: error: invalid operand +#CHECK: tmhl %r0, 0x10000 + + tmhl %r0, -1 + tmhl %r0, 0x10000 + +#CHECK: error: invalid operand +#CHECK: tmlh %r0, -1 +#CHECK: error: invalid operand +#CHECK: tmlh %r0, 0x10000 + + tmlh %r0, -1 + tmlh %r0, 0x10000 + +#CHECK: error: invalid operand +#CHECK: tmll %r0, -1 +#CHECK: error: invalid operand +#CHECK: tmll %r0, 0x10000 + + tmll %r0, -1 + tmll %r0, 0x10000 + +#CHECK: error: invalid operand #CHECK: x %r0, -1 #CHECK: error: invalid operand #CHECK: x %r0, 4096 diff --git a/test/MC/SystemZ/insn-good.s b/test/MC/SystemZ/insn-good.s index 9930d8ce6d..be7e308549 100644 --- a/test/MC/SystemZ/insn-good.s +++ b/test/MC/SystemZ/insn-good.s @@ -7284,6 +7284,46 @@ sy %r0, 524287(%r15,%r1) sy %r15, 0 +#CHECK: tmhh %r0, 0 # encoding: [0xa7,0x02,0x00,0x00] +#CHECK: tmhh %r0, 32768 # encoding: [0xa7,0x02,0x80,0x00] +#CHECK: tmhh %r0, 65535 # encoding: [0xa7,0x02,0xff,0xff] +#CHECK: tmhh %r15, 0 # encoding: [0xa7,0xf2,0x00,0x00] + + tmhh %r0, 0 + tmhh %r0, 0x8000 + tmhh %r0, 0xffff + tmhh %r15, 0 + +#CHECK: tmhl %r0, 0 # encoding: [0xa7,0x03,0x00,0x00] +#CHECK: tmhl %r0, 32768 # encoding: [0xa7,0x03,0x80,0x00] +#CHECK: tmhl %r0, 65535 # encoding: [0xa7,0x03,0xff,0xff] +#CHECK: tmhl %r15, 0 # encoding: [0xa7,0xf3,0x00,0x00] + + tmhl %r0, 0 + tmhl %r0, 0x8000 + tmhl %r0, 0xffff + tmhl %r15, 0 + +#CHECK: tmlh %r0, 0 # encoding: [0xa7,0x00,0x00,0x00] +#CHECK: tmlh %r0, 32768 # encoding: [0xa7,0x00,0x80,0x00] +#CHECK: tmlh %r0, 65535 # encoding: [0xa7,0x00,0xff,0xff] +#CHECK: tmlh %r15, 0 # encoding: [0xa7,0xf0,0x00,0x00] + + tmlh %r0, 0 + tmlh %r0, 0x8000 + tmlh %r0, 0xffff + tmlh %r15, 0 + +#CHECK: tmll %r0, 0 # encoding: [0xa7,0x01,0x00,0x00] +#CHECK: tmll %r0, 32768 # encoding: [0xa7,0x01,0x80,0x00] +#CHECK: tmll %r0, 65535 # encoding: [0xa7,0x01,0xff,0xff] +#CHECK: tmll %r15, 0 # encoding: [0xa7,0xf1,0x00,0x00] + + tmll %r0, 0 + tmll %r0, 0x8000 + tmll %r0, 0xffff + tmll %r15, 0 + #CHECK: x %r0, 0 # encoding: [0x57,0x00,0x00,0x00] #CHECK: x %r0, 4095 # encoding: [0x57,0x00,0x0f,0xff] #CHECK: x %r0, 0(%r1) # encoding: [0x57,0x00,0x10,0x00] |