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author | Jim Grosbach <grosbach@apple.com> | 2013-02-19 18:55:36 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2013-02-19 18:55:36 +0000 |
commit | 4fd4c91c40fa40ae4cd671b03056de8c3c961046 (patch) | |
tree | 54821d20234d8ad7d1866c69b50494d791a9413c /test | |
parent | da5f1ed6406442735fbb4421f8a22bc8a41d4c57 (diff) | |
download | llvm-4fd4c91c40fa40ae4cd671b03056de8c3c961046.tar.gz llvm-4fd4c91c40fa40ae4cd671b03056de8c3c961046.tar.bz2 llvm-4fd4c91c40fa40ae4cd671b03056de8c3c961046.tar.xz |
ARM: Allocation hints must make sure to be in the alloc order.
When creating an allocation hint for a register pair, make sure the hint
for the physical register reference is still in the allocation order.
rdar://13240556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175541 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll b/test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll new file mode 100644 index 0000000000..502b138f65 --- /dev/null +++ b/test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll @@ -0,0 +1,53 @@ +; RUN: llc < %s -mtriple=thumbv7s-apple-ios6.0.0 -verify-machineinstrs + +; Check to make sure the tail-call return at the end doesn't use a +; callee-saved register. Register hinting from t2LDRDri was getting this +; wrong. The intervening call will force allocation to try a high register +; first, so the hint will attempt to fire, but must be rejected due to +; not being in the allocation order for the tcGPR register class. +; The machine instruction verifier will make sure that all actually worked +; out the way it's supposed to. + +%"myclass" = type { %struct.foo } +%struct.foo = type { i32, [40 x i8] } + +define hidden void @func(i8* %Data) nounwind ssp { + %1 = getelementptr inbounds i8* %Data, i32 12 + %2 = bitcast i8* %1 to %"myclass"* + tail call void @abc(%"myclass"* %2) nounwind + tail call void @def(%"myclass"* %2) nounwind + %3 = getelementptr inbounds i8* %Data, i32 8 + %4 = bitcast i8* %3 to i8** + %5 = load i8** %4, align 4, !tbaa !0 + tail call void @ghi(i8* %5) nounwind + %6 = bitcast i8* %Data to void (i8*)** + %7 = load void (i8*)** %6, align 4, !tbaa !0 + %8 = getelementptr inbounds i8* %Data, i32 4 + %9 = bitcast i8* %8 to i8** + %10 = load i8** %9, align 4, !tbaa !0 + %11 = icmp eq i8* %Data, null + br i1 %11, label %14, label %12 + +; <label>:12 ; preds = %0 + %13 = tail call %"myclass"* @jkl(%"myclass"* %2) nounwind + tail call void @mno(i8* %Data) nounwind + br label %14 + +; <label>:14 ; preds = %12, %0 + tail call void %7(i8* %10) nounwind + ret void +} + +declare void @mno(i8*) + +declare void @def(%"myclass"*) + +declare void @abc(%"myclass"*) + +declare void @ghi(i8*) + +declare %"myclass"* @jkl(%"myclass"*) nounwind + +!0 = metadata !{metadata !"any pointer", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} |