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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-01-28 12:53:56 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-01-28 12:53:56 +0000 |
| commit | 5144469bb4a801c289e47377b9399aa685e5ce99 (patch) | |
| tree | e6ea9b1967733883f802fee4681ec456ffc4f349 /test | |
| parent | 510c731153e2938874217ebaa4d9b5c8a5985c00 (diff) | |
| download | llvm-5144469bb4a801c289e47377b9399aa685e5ce99.tar.gz llvm-5144469bb4a801c289e47377b9399aa685e5ce99.tar.bz2 llvm-5144469bb4a801c289e47377b9399aa685e5ce99.tar.xz | |
[DAGCombiner] Avoid introducing an illegal build_vector when folding a sign_extend.
Make sure that we don't introduce illegal build_vector dag nodes
when trying to fold a sign_extend of a build_vector.
This fixes a regression introduced by r200234.
Added test CodeGen/X86/fold-vector-sext-crash.ll
to verify that llc no longer crashes with an assertion failure
due to an illegal build_vector of type MVT::v4i64.
Thanks to Ilia Filippov for spotting this regression and for
providing a reproducible test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200313 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/fold-vector-sext-crash.ll | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/test/CodeGen/X86/fold-vector-sext-crash.ll b/test/CodeGen/X86/fold-vector-sext-crash.ll new file mode 100644 index 0000000000..52ea7a912b --- /dev/null +++ b/test/CodeGen/X86/fold-vector-sext-crash.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s -mcpu=core-avx-i -mtriple=i386-unknown-linux-gnu -mattr=+avx,+popcnt,+cmov + +; Make sure that we don't introduce illegal build_vector dag nodes +; when trying to fold a sign_extend of a constant build_vector. +; After r200234 the test case below was crashing the compiler with an assertion failure +; due to an illegal build_vector of type MVT::v4i64. + +define <4 x i64> @foo(<4 x i64> %A) { + %1 = select <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i64> %A, <4 x i64><i64 undef, i64 undef, i64 0, i64 0> + ret <4 x i64> %1 +} + |