Liveness Analysis Pass

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197254 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 125 insertions, 60 deletions

diff --git a/test/CodeGen/X86/anyregcc.ll b/test/CodeGen/X86/anyregcc.ll
index 300db34b97..65ec910f64 100644
--- a/test/CodeGen/X86/anyregcc.ll
+++ b/test/CodeGen/X86/anyregcc.ll
@@ -11,7 +11,6 @@
 ; CHECK-NEXT:   .long   8
 
 ; test
-; CHECK-NEXT:   .long   0
 ; CHECK-LABEL:  .long   L{{.*}}-_test
 ; CHECK-NEXT:   .short  0
 ; 3 locations
@@ -38,7 +37,6 @@ entry:
 }
 
 ; property access 1 - %obj is an anyreg call argument and should therefore be in a register
-; CHECK-NEXT:   .long   1
 ; CHECK-LABEL:  .long   L{{.*}}-_property_access1
 ; CHECK-NEXT:   .short  0
 ; 2 locations
@@ -61,7 +59,6 @@ entry:
 }
 
 ; property access 2 - %obj is an anyreg call argument and should therefore be in a register
-; CHECK-NEXT:   .long   2
 ; CHECK-LABEL:  .long   L{{.*}}-_property_access2
 ; CHECK-NEXT:   .short  0
 ; 2 locations
@@ -85,7 +82,6 @@ entry:
 }
 
 ; property access 3 - %obj is a frame index
-; CHECK-NEXT:   .long   3
 ; CHECK-LABEL:  .long   L{{.*}}-_property_access3
 ; CHECK-NEXT:   .short  0
 ; 2 locations
@@ -109,7 +105,6 @@ entry:
 }
 
 ; anyreg_test1
-; CHECK-NEXT:   .long   4
 ; CHECK-LABEL:  .long   L{{.*}}-_anyreg_test1
 ; CHECK-NEXT:   .short  0
 ; 14 locations
@@ -192,7 +187,6 @@ entry:
 }
 
 ; anyreg_test2
-; CHECK-NEXT:   .long   5
 ; CHECK-LABEL:  .long   L{{.*}}-_anyreg_test2
 ; CHECK-NEXT:   .short  0
 ; 14 locations
@@ -278,7 +272,6 @@ entry:
 ;
 ; <rdar://problem/15432754> [JS] Assertion: "Folded a def to a non-store!"
 ;
-; CHECK-LABEL: .long 12
 ; CHECK-LABEL: .long L{{.*}}-_patchpoint_spilldef
 ; CHECK-NEXT: .short 0
 ; CHECK-NEXT: .short 3
@@ -308,7 +301,6 @@ entry:
 ;
 ; <rdar://problem/15487687> [JS] AnyRegCC argument ends up being spilled
 ;
-; CHECK-LABEL: .long 13
 ; CHECK-LABEL: .long L{{.*}}-_patchpoint_spillargs
 ; CHECK-NEXT: .short 0
 ; CHECK-NEXT: .short 5
diff --git a/test/CodeGen/X86/stackmap-liveness.ll b/test/CodeGen/X86/stackmap-liveness.ll
new file mode 100644
index 0000000000..64c39eabaf
--- /dev/null
+++ b/test/CodeGen/X86/stackmap-liveness.ll
@@ -0,0 +1,85 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -disable-fp-elim | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -disable-fp-elim -enable-stackmap-liveness| FileCheck -check-prefix=LIVE %s
+;
+; Note: Print verbose stackmaps using -debug-only=stackmaps.
+
+; CHECK-LABEL:  .section  __LLVM_STACKMAPS,__llvm_stackmaps
+; CHECK-NEXT:   __LLVM_StackMaps:
+; CHECK-NEXT:   .long   0
+; Num LargeConstants
+; CHECK-NEXT:   .long   0
+; Num Callsites
+; CHECK-NEXT:   .long   3
+
+; CHECK-LABEL:  .long L{{.*}}-_liveness
+; CHECK-NEXT:   .short  0
+; CHECK-NEXT:   .short  0
+; CHECK-NEXT:   .short  0
+; LIVE-LABEL:   .long L{{.*}}-_liveness
+; LIVE-NEXT:    .short  0
+; LIVE-NEXT:    .short  0
+; LIVE-NEXT:    .short  2
+; LIVE-NEXT:    .short  7
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 8
+; LIVE-NEXT:    .short  19
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 16
+
+; CHECK-LABEL:  .long L{{.*}}-_liveness
+; CHECK-NEXT:   .short  0
+; CHECK-NEXT:   .short  0
+; CHECK-NEXT:   .short  0
+; LIVE-LABEL:   .long L{{.*}}-_liveness
+; LIVE-NEXT:    .short  0
+; LIVE-NEXT:    .short  0
+; LIVE-NEXT:    .short  6
+; LIVE-NEXT:    .short  0
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 2
+; LIVE-NEXT:    .short  7
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 8
+; LIVE-NEXT:    .short  8
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 8
+; LIVE-NEXT:    .short  17
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 32
+; LIVE-NEXT:    .short  18
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 32
+; LIVE-NEXT:    .short  19
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 16
+
+; CHECK-LABEL:  .long L{{.*}}-_liveness
+; CHECK-NEXT:   .short  0
+; CHECK-NEXT:   .short  0
+; CHECK-NEXT:   .short  0
+; LIVE-LABEL:   .long L{{.*}}-_liveness
+; LIVE-NEXT:    .short  0
+; LIVE-NEXT:    .short  0
+; LIVE-NEXT:    .short  2
+; LIVE-NEXT:    .short  7
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 8
+; LIVE-NEXT:    .short  19
+; LIVE-NEXT:    .byte 0
+; LIVE-NEXT:    .byte 16
+define void @liveness() {
+entry:
+  %a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
+  call void (i32, i32, ...)* @llvm.experimental.stackmap(i32 1, i32 5)
+  %a2 = call i64 asm sideeffect "", "={r8}"() nounwind
+  %a3 = call i8 asm sideeffect "", "={ah}"() nounwind
+  %a4 = call <4 x double> asm sideeffect "", "={ymm0}"() nounwind
+  %a5 = call <4 x double> asm sideeffect "", "={ymm1}"() nounwind
+  call void (i32, i32, ...)* @llvm.experimental.stackmap(i32 2, i32 5)
+  call void asm sideeffect "", "{r8},{ah},{ymm0},{ymm1}"(i64 %a2, i8 %a3, <4 x double> %a4, <4 x double> %a5) nounwind
+  call void (i32, i32, ...)* @llvm.experimental.stackmap(i32 3, i32 5)
+  call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
+  ret void
+}
+
+declare void @llvm.experimental.stackmap(i32, i32, ...)
diff --git a/test/CodeGen/X86/stackmap.ll b/test/CodeGen/X86/stackmap.ll
index 35a1819b0d..bb88221a36 100644
--- a/test/CodeGen/X86/stackmap.ll
+++ b/test/CodeGen/X86/stackmap.ll
@@ -47,8 +47,7 @@ entry:
 
 ; Inline OSR Exit
 ;
-; CHECK-NEXT:   .long   3
-; CHECK-NEXT:   .long   L{{.*}}-_osrinline
+; CHECK-LABEL:  .long   L{{.*}}-_osrinline
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  2
 ; CHECK-NEXT:   .byte   1
@@ -72,8 +71,7 @@ entry:
 ;
 ; 2 live variables in register.
 ;
-; CHECK-NEXT:   .long   4
-; CHECK-NEXT:   .long   L{{.*}}-_osrcold
+; CHECK-LABEL:  .long   L{{.*}}-_osrcold
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  2
 ; CHECK-NEXT:   .byte   1
@@ -98,8 +96,7 @@ ret:
 }
 
 ; Property Read
-; CHECK-NEXT:   .long   5
-; CHECK-NEXT:   .long   L{{.*}}-_propertyRead
+; CHECK-LABEL:  .long   L{{.*}}-_propertyRead
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  2
 ; CHECK-NEXT:   .byte   1
@@ -119,8 +116,7 @@ entry:
 }
 
 ; Property Write
-; CHECK-NEXT:   .long   6
-; CHECK-NEXT:   .long   L{{.*}}-_propertyWrite
+; CHECK-LABEL:  .long   L{{.*}}-_propertyWrite
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  2
 ; CHECK-NEXT:   .byte   1
@@ -142,8 +138,7 @@ entry:
 ;
 ; 2 live variables in registers.
 ;
-; CHECK-NEXT:   .long  7
-; CHECK-NEXT:   .long   L{{.*}}-_jsVoidCall
+; CHECK-LABEL:  .long   L{{.*}}-_jsVoidCall
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  2
 ; CHECK-NEXT:   .byte   1
@@ -165,8 +160,7 @@ entry:
 ;
 ; 2 live variables in registers.
 ;
-; CHECK:        .long  8
-; CHECK-NEXT:   .long   L{{.*}}-_jsIntCall
+; CHECK-LABEL:  .long   L{{.*}}-_jsIntCall
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  2
 ; CHECK-NEXT:   .byte   1
@@ -189,16 +183,15 @@ entry:
 ;
 ; Verify 17 stack map entries.
 ;
-; CHECK:      .long 11
-; CHECK-NEXT: .long L{{.*}}-_spilledValue
-; CHECK-NEXT: .short 0
-; CHECK-NEXT: .short 17
+; CHECK-LABEL:  .long L{{.*}}-_spilledValue
+; CHECK-NEXT:   .short 0
+; CHECK-NEXT:   .short 17
 ;
 ; Check that at least one is a spilled entry from RBP.
 ; Location: Indirect RBP + ...
-; CHECK:      .byte 3
-; CHECK-NEXT: .byte 8
-; CHECK-NEXT: .short 6
+; CHECK:        .byte 3
+; CHECK-NEXT:   .byte 8
+; CHECK-NEXT:   .short 6
 define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {
 entry:
   call void (i32, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i32 11, i32 15, i8* null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
@@ -209,16 +202,15 @@ entry:
 ;
 ; Verify 17 stack map entries.
 ;
-; CHECK:       .long 12
-; CHECK-LABEL: .long L{{.*}}-_spilledStackMapValue
-; CHECK-NEXT:  .short 0
-; CHECK-NEXT:  .short 17
+; CHECK-LABEL:  .long L{{.*}}-_spilledStackMapValue
+; CHECK-NEXT:   .short 0
+; CHECK-NEXT:   .short 17
 ;
 ; Check that at least one is a spilled entry from RBP.
 ; Location: Indirect RBP + ...
-; CHECK:      .byte 3
-; CHECK-NEXT: .byte 8
-; CHECK-NEXT: .short 6
+; CHECK:        .byte 3
+; CHECK-NEXT:   .byte 8
+; CHECK-NEXT:   .short 6
 define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {
 entry:
   call void (i32, i32, ...)* @llvm.experimental.stackmap(i32 12, i32 15, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
@@ -227,17 +219,16 @@ entry:
 
 ; Spill a subregister stackmap operand.
 ;
-; CHECK:       .long 13
-; CHECK-LABEL: .long L{{.*}}-_spillSubReg
-; CHECK-NEXT:  .short 0
+; CHECK-LABEL:  .long L{{.*}}-_spillSubReg
+; CHECK-NEXT:   .short 0
 ; 4 locations
-; CHECK-NEXT:  .short 1
+; CHECK-NEXT:   .short 1
 ;
 ; Check that the subregister operand is a 4-byte spill.
 ; Location: Indirect, 4-byte, RBP + ...
-; CHECK:      .byte 3
-; CHECK-NEXT: .byte 4
-; CHECK-NEXT: .short 6
+; CHECK:        .byte 3
+; CHECK-NEXT:   .byte 4
+; CHECK-NEXT:   .short 6
 define void @spillSubReg(i64 %arg) #0 {
 bb:
   br i1 undef, label %bb1, label %bb2
@@ -268,24 +259,23 @@ bb61:
 ; Map a single byte subregister. There is no DWARF register number, so
 ; we expect the register to be encoded with the proper size and spill offset. We don't know which
 ;
-; CHECK:       .long 14
-; CHECK-LABEL: .long L{{.*}}-_subRegOffset
-; CHECK-NEXT:  .short 0
+; CHECK-LABEL:  .long L{{.*}}-_subRegOffset
+; CHECK-NEXT:   .short 0
 ; 2 locations
-; CHECK-NEXT:  .short 2
+; CHECK-NEXT:   .short 2
 ;
 ; Check that the subregister operands are 1-byte spills.
 ; Location 0: Register, 4-byte, AL
-; CHECK-NEXT: .byte 1
-; CHECK-NEXT: .byte 1
-; CHECK-NEXT: .short 0
-; CHECK-NEXT: .long 0
+; CHECK-NEXT:   .byte 1
+; CHECK-NEXT:   .byte 1
+; CHECK-NEXT:   .short 0
+; CHECK-NEXT:   .long 0
 ;
 ; Location 1: Register, 4-byte, BL
-; CHECK-NEXT: .byte 1
-; CHECK-NEXT: .byte 1
-; CHECK-NEXT: .short 3
-; CHECK-NEXT: .long 0
+; CHECK-NEXT:   .byte 1
+; CHECK-NEXT:   .byte 1
+; CHECK-NEXT:   .short 3
+; CHECK-NEXT:   .long 0
 define void @subRegOffset(i16 %arg) {
   %v = mul i16 %arg, 5
   %a0 = trunc i16 %v to i8
@@ -299,11 +289,10 @@ define void @subRegOffset(i16 %arg) {
 
 ; Map a constant value.
 ;
-; CHECK:       .long 15
-; CHECK-LABEL: .long L{{.*}}-_liveConstant
-; CHECK-NEXT:  .short 0
+; CHECK-LABEL:  .long L{{.*}}-_liveConstant
+; CHECK-NEXT:   .short 0
 ; 1 location
-; CHECK-NEXT:  .short 1
+; CHECK-NEXT:   .short 1
 ; Loc 0: SmallConstant
 ; CHECK-NEXT:   .byte   4
 ; CHECK-NEXT:   .byte   8
@@ -318,7 +307,6 @@ define void @liveConstant() {
 ; Directly map an alloca's address.
 ;
 ; Callsite 16
-; CHECK:        .long 16
 ; CHECK-LABEL:  .long L{{.*}}-_directFrameIdx
 ; CHECK-NEXT:   .short 0
 ; 1 location
@@ -328,9 +316,9 @@ define void @liveConstant() {
 ; CHECK-NEXT:   .byte	8
 ; CHECK-NEXT:   .short	6
 ; CHECK-NEXT:   .long
+
 ; Callsite 17
-; CHECK-NEXT:   .long	17
-; CHECK-NEXT:   .long	L{{.*}}-_directFrameIdx
+; CHECK-LABEL:  .long	L{{.*}}-_directFrameIdx
 ; CHECK-NEXT:   .short	0
 ; 2 locations
 ; CHECK-NEXT:   .short	2