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authorNadav Rotem <nadav.rotem@intel.com>2011-02-12 14:40:33 +0000
committerNadav Rotem <nadav.rotem@intel.com>2011-02-12 14:40:33 +0000
commit609d54ee1e715af57e499c2cd10ff5a9ba89b9f2 (patch)
treed8717486235f7bce657041770ce999f245cada01 /test
parentf922c47143d247cbae14b294a0bada139bcd35f6 (diff)
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A fix for 9165.
The DAGCombiner created illegal BUILD_VECTOR operations. The patch added a check that either illegal operations are allowed or that the created operation is legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125435 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/Generic/2011-02-12-shuffle.ll32
1 files changed, 32 insertions, 0 deletions
diff --git a/test/CodeGen/Generic/2011-02-12-shuffle.ll b/test/CodeGen/Generic/2011-02-12-shuffle.ll
new file mode 100644
index 0000000000..b4d56d193c
--- /dev/null
+++ b/test/CodeGen/Generic/2011-02-12-shuffle.ll
@@ -0,0 +1,32 @@
+; RUN: llc < %s
+; PR9165
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i686-pc-win32"
+
+define void @m_387() nounwind {
+entry:
+ br i1 undef, label %if.end, label %UnifiedReturnBlock
+
+if.end: ; preds = %entry
+ %tmp1067 = load <16 x i32> addrspace(1)* null, align 64
+ %tmp1082 = shufflevector <16 x i32> <i32 0, i32 0, i32 0, i32 undef, i32 undef, i32 0, i32 0, i32 undef, i32 0, i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef>,
+ <16 x i32> %tmp1067,
+ <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 26, i32 5, i32 6, i32 undef, i32 8, i32 9, i32 31, i32 30, i32 12, i32 undef, i32 undef, i32 undef>
+
+ %tmp1100 = shufflevector <16 x i32> %tmp1082,
+ <16 x i32> %tmp1067,
+ <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 4, i32 5, i32 6, i32 18, i32 8, i32 9, i32 10, i32 11, i32 12, i32 25, i32 undef, i32 17>
+
+ %tmp1112 = shufflevector <16 x i32> %tmp1100,
+ <16 x i32> %tmp1067,
+ <16 x i32> <i32 0, i32 1, i32 2, i32 24, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 18, i32 15>
+
+ store <16 x i32> %tmp1112, <16 x i32> addrspace(1)* undef, align 64
+
+ ret void
+
+UnifiedReturnBlock: ; preds = %entry
+ ret void
+}
+