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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-24 14:05:39 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-24 14:05:39 +0000 |
| commit | 67db74e02c1608ceb6845db4a6a80f7804f26a6c (patch) | |
| tree | ec07050f3e0bfc33ebe96550fa3fd5f5d14ab16d /test | |
| parent | b8cb7098582e980529713fc00b6da96c45be4cf5 (diff) | |
| download | llvm-67db74e02c1608ceb6845db4a6a80f7804f26a6c.tar.gz llvm-67db74e02c1608ceb6845db4a6a80f7804f26a6c.tar.bz2 llvm-67db74e02c1608ceb6845db4a6a80f7804f26a6c.tar.xz | |
[mips] Implement shorthand add / sub forms for MIPS.
Summary:
- If only two registers are passed to a three-register operation, then the
first argument is both source and destination register.
- If a non-register is passed as the last argument, generate the immediate
version of the instruction.
Also mark DADD commutative and add scheduling information (to the generic
scheduler), and implement DSUB.
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL
CC: theraven
Differential Revision: http://llvm-reviews.chandlerc.com/D3148
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204605 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/Mips/mips-alu-instructions.s | 21 | ||||
| -rw-r--r-- | test/MC/Mips/mips64-alu-instructions.s | 23 |
2 files changed, 44 insertions, 0 deletions
diff --git a/test/MC/Mips/mips-alu-instructions.s b/test/MC/Mips/mips-alu-instructions.s index 68a8da07c2..1ee994f09a 100644 --- a/test/MC/Mips/mips-alu-instructions.s +++ b/test/MC/Mips/mips-alu-instructions.s @@ -118,3 +118,24 @@ negu $6,$7 move $7,$8 rdhwr $5, $29 + +#------------------------------------------------------------------------------ +# Shortcuts for arithmetic instructions +#------------------------------------------------------------------------------ + +# CHECK: add $9, $9, $3 # encoding: [0x20,0x48,0x23,0x01] +# CHECK: addu $9, $9, $3 # encoding: [0x21,0x48,0x23,0x01] +# CHECK: addi $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x21] +# CHECK: addiu $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x25] +# CHECK: sub $9, $9, $3 # encoding: [0x22,0x48,0x23,0x01] +# CHECK: subu $9, $9, $3 # encoding: [0x23,0x48,0x23,0x01] +# CHECK: addi $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x21] +# CHECK: addiu $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x25] + add $9, $3 + addu $9, $3 + add $9, 10 + addu $9, 10 + sub $9, $3 + subu $9, $3 + sub $9, 10 + subu $9, 10 diff --git a/test/MC/Mips/mips64-alu-instructions.s b/test/MC/Mips/mips64-alu-instructions.s index 8262a46ee4..12c49a4621 100644 --- a/test/MC/Mips/mips64-alu-instructions.s +++ b/test/MC/Mips/mips64-alu-instructions.s @@ -81,6 +81,7 @@ # CHECK: msubu $6, $7 # encoding: [0x05,0x00,0xc7,0x70] # CHECK: mult $3, $5 # encoding: [0x18,0x00,0x65,0x00] # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00] +# CHECK: dsub $9, $6, $7 # encoding: [0x2e,0x48,0xc7,0x00] # CHECK: dsubu $4, $3, $5 # encoding: [0x2f,0x20,0x65,0x00] # CHECK: move $7, $8 # encoding: [0x2d,0x38,0x00,0x01] # CHECK: .set push @@ -104,6 +105,28 @@ msubu $6,$7 mult $3,$5 multu $3,$5 + dsub $9,$6,$7 dsubu $4,$3,$5 move $7,$8 rdhwr $5, $29 + +#------------------------------------------------------------------------------ +# Shortcuts for arithmetic instructions +#------------------------------------------------------------------------------ + +# CHECK: dadd $9, $9, $3 # encoding: [0x2c,0x48,0x23,0x01] +# CHECK: daddu $9, $9, $3 # encoding: [0x2d,0x48,0x23,0x01] +# CHECK: daddi $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x61] +# CHECK: daddiu $9, $9, 10 # encoding: [0x0a,0x00,0x29,0x65] +# CHECK: dsub $9, $9, $3 # encoding: [0x2e,0x48,0x23,0x01] +# CHECK: dsubu $9, $9, $3 # encoding: [0x2f,0x48,0x23,0x01] +# CHECK: daddi $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x61] +# CHECK: daddiu $9, $9, -10 # encoding: [0xf6,0xff,0x29,0x65] + dadd $9, $3 + daddu $9, $3 + dadd $9, 10 + daddu $9, 10 + dsub $9, $3 + dsubu $9, $3 + dsub $9, 10 + dsubu $9, 10 |