summaryrefslogtreecommitdiff
path: root/test
diff options
context:
space:
mode:
authorJack Carter <jcarter@mips.com>2012-09-06 20:00:02 +0000
committerJack Carter <jcarter@mips.com>2012-09-06 20:00:02 +0000
commit6b96c3f71fce6b0a7c380dfc3b7ebf22c40e804b (patch)
treefb916862ba719f22e1bac98944f6695e98c9b21f /test
parentcc77eece74c8db09acc2af425e7e6c88a5bb30d1 (diff)
downloadllvm-6b96c3f71fce6b0a7c380dfc3b7ebf22c40e804b.tar.gz
llvm-6b96c3f71fce6b0a7c380dfc3b7ebf22c40e804b.tar.bz2
llvm-6b96c3f71fce6b0a7c380dfc3b7ebf22c40e804b.tar.xz
The Mips standalone assembler memory instruction support.
This includes sb,sc,sh,sw,lb,lw,lbu,lh,lhu,ll,lw Test case included Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163346 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/MC/Mips/mips-memory-instructions.s41
1 files changed, 41 insertions, 0 deletions
diff --git a/test/MC/Mips/mips-memory-instructions.s b/test/MC/Mips/mips-memory-instructions.s
new file mode 100644
index 0000000000..48678194c5
--- /dev/null
+++ b/test/MC/Mips/mips-memory-instructions.s
@@ -0,0 +1,41 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
+# Check that the assembler can handle the documented syntax
+# for loads and stores.
+# CHECK: .section __TEXT,__text,regular,pure_instructions
+#------------------------------------------------------------------------------
+# Memory store instructions
+#------------------------------------------------------------------------------
+# CHECK: sb $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa0]
+# CHECK: sc $4, 16($5) # encoding: [0x10,0x00,0xa4,0xe0]
+# CHECK: sh $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa4]
+# CHECK: sw $4, 16($5) # encoding: [0x10,0x00,0xa4,0xac]
+# CHECK: sw $7, 0($5) # encoding: [0x00,0x00,0xa7,0xac]
+ sb $4, 16($5)
+ sc $4, 16($5)
+ sh $4, 16($5)
+ sw $4, 16($5)
+ sw $7, ($5)
+
+#------------------------------------------------------------------------------
+# Memory load instructions
+#------------------------------------------------------------------------------
+
+# CHECK: lb $4, 4($5) # encoding: [0x04,0x00,0xa4,0x80]
+# CHECK: lw $4, 4($5) # encoding: [0x04,0x00,0xa4,0x8c]
+# CHECK: lbu $4, 4($5) # encoding: [0x04,0x00,0xa4,0x90]
+# CHECK: lh $4, 4($5) # encoding: [0x04,0x00,0xa4,0x84]
+# CHECK: lhu $4, 4($5) # encoding: [0x04,0x00,0xa4,0x94]
+# CHECK: ll $4, 4($5) # encoding: [0x04,0x00,0xa4,0xc0]
+# CHECK: lw $4, 4($5) # encoding: [0x04,0x00,0xa4,0x8c]
+# CHECK: lw $7, 0($7) # encoding: [0x00,0x00,0xe7,0x8c]
+# CHECK: lw $2, 16($sp) # encoding: [0x10,0x00,0xa2,0x8f]
+
+ lb $4, 4($5)
+ lw $4, 4($5)
+ lbu $4, 4($5)
+ lh $4, 4($5)
+ lhu $4, 4($5)
+ ll $4, 4($5)
+ lw $4, 4($5)
+ lw $7, ($7)
+ lw $2, 16($sp)