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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-03-07 20:12:39 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-03-07 20:12:39 +0000 |
| commit | 6cadd406ccbf4ea0fa8b7fc31b094eeb3db979fb (patch) | |
| tree | 474d1efbf76615c33bc539cb0d131f9a4a42186f /test | |
| parent | 7e06370873060c29be3bf0b3308205d165228187 (diff) | |
| download | llvm-6cadd406ccbf4ea0fa8b7fc31b094eeb3db979fb.tar.gz llvm-6cadd406ccbf4ea0fa8b7fc31b094eeb3db979fb.tar.bz2 llvm-6cadd406ccbf4ea0fa8b7fc31b094eeb3db979fb.tar.xz | |
R600/SI: Using SGPRs is illegal for instructions that read carry-out from VCC
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203281 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/R600/add.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/test/CodeGen/R600/add.ll b/test/CodeGen/R600/add.ll index 600419cd16..e9db52ae4a 100644 --- a/test/CodeGen/R600/add.ll +++ b/test/CodeGen/R600/add.ll @@ -125,3 +125,18 @@ entry: store i64 %0, i64 addrspace(1)* %out ret void } + +; The V_ADDC_U32 and V_ADD_I32 instruction can't read SGPRs, because they +; use VCC. The test is designed so that %a will be stored in an SGPR and +; %0 will be stored in a VGPR, so the comiler will be forced to copy %a +; to a VGPR before doing the add. + +; FUNC-LABEL: @add64_sgpr_vgpr +; SI-CHECK-NOT: V_ADDC_U32_e32 s +define void @add64_sgpr_vgpr(i64 addrspace(1)* %out, i64 %a, i64 addrspace(1)* %in) { +entry: + %0 = load i64 addrspace(1)* %in + %1 = add i64 %a, %0 + store i64 %1, i64 addrspace(1)* %out + ret void +} |