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| author | Johnny Chen <johnny.chen@apple.com> | 2011-04-01 23:15:50 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2011-04-01 23:15:50 +0000 |
| commit | 6da3fe68c6e3f5abd520a1bfc8dd8429e6ec6389 (patch) | |
| tree | 4ddcbc2d3f886b46ed64ae9dfd7fb2768e9acb03 /test | |
| parent | 857b1939dabefe931e1fd25b20185153ea389587 (diff) | |
| download | llvm-6da3fe68c6e3f5abd520a1bfc8dd8429e6ec6389.tar.gz llvm-6da3fe68c6e3f5abd520a1bfc8dd8429e6ec6389.tar.bz2 llvm-6da3fe68c6e3f5abd520a1bfc8dd8429e6ec6389.tar.xz | |
MOVs should have Inst{19-16} as 0b0000, otherwise, the instruction is UNPREDICTABLE.
rdar://problem/9224120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128748 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/Disassembler/ARM/invalid-MOVs-arm.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt b/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt new file mode 100644 index 0000000000..cfbba43fd5 --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt @@ -0,0 +1,17 @@ +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} + +# Opcode=0 Name=PHI Format=(42) +# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +# ------------------------------------------------------------------------------------------------- +# | 1: 1: 1: 1| 0: 0: 0: 1| 1: 0: 1: 1| 1: 1: 0: 0| 1: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 1: 0| +# ------------------------------------------------------------------------------------------------- +# To qualify as an LSL (immediate) instruction, Inst{19-16} "should" be 0b0000, instead it is = 0b1100. +# The instruction is UNPREDICTABLE, and is not a valid intruction. +# +# See also +# A8.6.88 LSL (immediate) +# A8.6.98 MOV (shifted register), and +# I.1 Instruction encoding diagrams and pseudocode +0x2 0xd1 0xbc 0xf1 + + |