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author | Joey Gouly <joey.gouly@arm.com> | 2013-07-19 16:34:16 +0000 |
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committer | Joey Gouly <joey.gouly@arm.com> | 2013-07-19 16:34:16 +0000 |
commit | 6fec715a1a662ce3b560f85c710875cfeeb1fb98 (patch) | |
tree | f39f45ee8a071b4846106f9a07cea2e6f8eb8d2f /test | |
parent | 70d3e71f2e44250594f1b6edd7bbbf8b945a4452 (diff) | |
download | llvm-6fec715a1a662ce3b560f85c710875cfeeb1fb98.tar.gz llvm-6fec715a1a662ce3b560f85c710875cfeeb1fb98.tar.bz2 llvm-6fec715a1a662ce3b560f85c710875cfeeb1fb98.tar.xz |
[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186688 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/MC/ARM/neon-v8.s | 37 | ||||
-rw-r--r-- | test/MC/ARM/thumb-neon-v8.s | 37 | ||||
-rw-r--r-- | test/MC/Disassembler/ARM/neon-v8.txt | 25 | ||||
-rw-r--r-- | test/MC/Disassembler/ARM/thumb-neon-v8.txt | 25 |
4 files changed, 124 insertions, 0 deletions
diff --git a/test/MC/ARM/neon-v8.s b/test/MC/ARM/neon-v8.s index 06a22f7c4f..429c8e3c08 100644 --- a/test/MC/ARM/neon-v8.s +++ b/test/MC/ARM/neon-v8.s @@ -44,3 +44,40 @@ vcvtp.s32.f32 q4, q15 @ CHECK: vcvtp.s32.f32 q4, q15 @ encoding: [0x6e,0x82,0xbb,0xf3] vcvtp.u32.f32 q9, q8 @ CHECK: vcvtp.u32.f32 q9, q8 @ encoding: [0xe0,0x22,0xfb,0xf3] + +vrintn.f32 d3, d0 +@ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3] +vrintn.f32 q1, q4 +@ CHECK: vrintn.f32 q1, q4 @ encoding: [0x48,0x24,0xba,0xf3] +vrintx.f32 d5, d12 +@ CHECK: vrintx.f32 d5, d12 @ encoding: [0x8c,0x54,0xba,0xf3] +vrintx.f32 q0, q3 +@ CHECK: vrintx.f32 q0, q3 @ encoding: [0xc6,0x04,0xba,0xf3] +vrinta.f32 d3, d0 +@ CHECK: vrinta.f32 d3, d0 @ encoding: [0x00,0x35,0xba,0xf3] +vrinta.f32 q8, q2 +@ CHECK: vrinta.f32 q8, q2 @ encoding: [0x44,0x05,0xfa,0xf3] +vrintz.f32 d12, d18 +@ CHECK: vrintz.f32 d12, d18 @ encoding: [0xa2,0xc5,0xba,0xf3] +vrintz.f32 q9, q4 +@ CHECK: vrintz.f32 q9, q4 @ encoding: [0xc8,0x25,0xfa,0xf3] +vrintm.f32 d3, d0 +@ CHECK: vrintm.f32 d3, d0 @ encoding: [0x80,0x36,0xba,0xf3] +vrintm.f32 q1, q4 +@ CHECK: vrintm.f32 q1, q4 @ encoding: [0xc8,0x26,0xba,0xf3] +vrintp.f32 d3, d0 +@ CHECK: vrintp.f32 d3, d0 @ encoding: [0x80,0x37,0xba,0xf3] +vrintp.f32 q1, q4 +@ CHECK: vrintp.f32 q1, q4 @ encoding: [0xc8,0x27,0xba,0xf3] + +@ test the aliases of vrint +vrintn.f32.f32 d3, d0 +@ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3] +vrintx.f32.f32 q0, q3 +@ CHECK: vrintx.f32 q0, q3 @ encoding: [0xc6,0x04,0xba,0xf3] +vrinta.f32.f32 d3, d0 +@ CHECK: vrinta.f32 d3, d0 @ encoding: [0x00,0x35,0xba,0xf3] +vrintz.f32.f32 q9, q4 +@ CHECK: vrintz.f32 q9, q4 @ encoding: [0xc8,0x25,0xfa,0xf3] +vrintp.f32.f32 q1, q4 +@ CHECK: vrintp.f32 q1, q4 @ encoding: [0xc8,0x27,0xba,0xf3] diff --git a/test/MC/ARM/thumb-neon-v8.s b/test/MC/ARM/thumb-neon-v8.s index df40238757..5b327810f8 100644 --- a/test/MC/ARM/thumb-neon-v8.s +++ b/test/MC/ARM/thumb-neon-v8.s @@ -44,3 +44,40 @@ vcvtp.s32.f32 q4, q15 @ CHECK: vcvtp.s32.f32 q4, q15 @ encoding: [0xbb,0xff,0x6e,0x82] vcvtp.u32.f32 q9, q8 @ CHECK: vcvtp.u32.f32 q9, q8 @ encoding: [0xfb,0xff,0xe0,0x22] + +vrintn.f32 d3, d0 +@ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34] +vrintn.f32 q1, q4 +@ CHECK: vrintn.f32 q1, q4 @ encoding: [0xba,0xff,0x48,0x24] +vrintx.f32 d5, d12 +@ CHECK: vrintx.f32 d5, d12 @ encoding: [0xba,0xff,0x8c,0x54] +vrintx.f32 q0, q3 +@ CHECK: vrintx.f32 q0, q3 @ encoding: [0xba,0xff,0xc6,0x04] +vrinta.f32 d3, d0 +@ CHECK: vrinta.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x35] +vrinta.f32 q8, q2 +@ CHECK: vrinta.f32 q8, q2 @ encoding: [0xfa,0xff,0x44,0x05] +vrintz.f32 d12, d18 +@ CHECK: vrintz.f32 d12, d18 @ encoding: [0xba,0xff,0xa2,0xc5] +vrintz.f32 q9, q4 +@ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25] +vrintm.f32 d3, d0 +@ CHECK: vrintm.f32 d3, d0 @ encoding: [0xba,0xff,0x80,0x36] +vrintm.f32 q1, q4 +@ CHECK: vrintm.f32 q1, q4 @ encoding: [0xba,0xff,0xc8,0x26] +vrintp.f32 d3, d0 +@ CHECK: vrintp.f32 d3, d0 @ encoding: [0xba,0xff,0x80,0x37] +vrintp.f32 q1, q4 +@ CHECK: vrintp.f32 q1, q4 @ encoding: [0xba,0xff,0xc8,0x27] + +@ test the aliases of vrint +vrintn.f32.f32 d3, d0 +@ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34] +vrintx.f32.f32 q0, q3 +@ CHECK: vrintx.f32 q0, q3 @ encoding: [0xba,0xff,0xc6,0x04] +vrinta.f32.f32 d3, d0 +@ CHECK: vrinta.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x35] +vrintz.f32.f32 q9, q4 +@ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25] +vrintp.f32.f32 q1, q4 +@ CHECK: vrintp.f32 q1, q4 @ encoding: [0xba,0xff,0xc8,0x27] diff --git a/test/MC/Disassembler/ARM/neon-v8.txt b/test/MC/Disassembler/ARM/neon-v8.txt index 4e9bf3f7de..8c6e6898b9 100644 --- a/test/MC/Disassembler/ARM/neon-v8.txt +++ b/test/MC/Disassembler/ARM/neon-v8.txt @@ -44,3 +44,28 @@ # CHECK: vcvtp.s32.f32 q4, q15 0xe0 0x22 0xfb 0xf3 # CHECK: vcvtp.u32.f32 q9, q8 + +0x00 0x34 0xba 0xf3 +# CHECK: vrintn.f32 d3, d0 +0x48 0x24 0xba 0xf3 +# CHECK: vrintn.f32 q1, q4 +0x8c 0x54 0xba 0xf3 +# CHECK: vrintx.f32 d5, d12 +0xc6 0x04 0xba 0xf3 +# CHECK: vrintx.f32 q0, q3 +0x00 0x35 0xba 0xf3 +# CHECK: vrinta.f32 d3, d0 +0x44 0x05 0xfa 0xf3 +# CHECK: vrinta.f32 q8, q2 +0xa2 0xc5 0xba 0xf3 +# CHECK: vrintz.f32 d12, d18 +0xc8 0x25 0xfa 0xf3 +# CHECK: vrintz.f32 q9, q4 +0x80 0x36 0xba 0xf3 +# CHECK: vrintm.f32 d3, d0 +0xc8 0x26 0xba 0xf3 +# CHECK: vrintm.f32 q1, q4 +0x80 0x37 0xba 0xf3 +# CHECK: vrintp.f32 d3, d0 +0xc8 0x27 0xba 0xf3 +# CHECK: vrintp.f32 q1, q4 diff --git a/test/MC/Disassembler/ARM/thumb-neon-v8.txt b/test/MC/Disassembler/ARM/thumb-neon-v8.txt index f025b8b2ab..27c09ea0f8 100644 --- a/test/MC/Disassembler/ARM/thumb-neon-v8.txt +++ b/test/MC/Disassembler/ARM/thumb-neon-v8.txt @@ -44,3 +44,28 @@ # CHECK: vcvtp.s32.f32 q4, q15 0xfb 0xff 0xe0 0x22 # CHECK: vcvtp.u32.f32 q9, q8 + +0xba 0xff 0x00 0x34 +# CHECK: vrintn.f32 d3, d0 +0xba 0xff 0x48 0x24 +# CHECK: vrintn.f32 q1, q4 +0xba 0xff 0x8c 0x54 +# CHECK: vrintx.f32 d5, d12 +0xba 0xff 0xc6 0x04 +# CHECK: vrintx.f32 q0, q3 +0xba 0xff 0x00 0x35 +# CHECK: vrinta.f32 d3, d0 +0xfa 0xff 0x44 0x05 +# CHECK: vrinta.f32 q8, q2 +0xba 0xff 0xa2 0xc5 +# CHECK: vrintz.f32 d12, d18 +0xfa 0xff 0xc8 0x25 +# CHECK: vrintz.f32 q9, q4 +0xba 0xff 0x80 0x36 +# CHECK: vrintm.f32 d3, d0 +0xba 0xff 0xc8 0x26 +# CHECK: vrintm.f32 q1, q4 +0xba 0xff 0x80 0x37 +# CHECK: vrintp.f32 d3, d0 +0xba 0xff 0xc8 0x27 +# CHECK: vrintp.f32 q1, q4 |