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| author | Tim Northover <tnorthover@apple.com> | 2014-04-18 09:31:20 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-04-18 09:31:20 +0000 |
| commit | 70b63374f24a8e05389bb410372d6b83230df227 (patch) | |
| tree | 5c3c55a96e9cce22e9c3aabd4292e76b3515f377 /test | |
| parent | e7ec66e56be056243e87c2920e0866d7aa84f6ff (diff) | |
| download | llvm-70b63374f24a8e05389bb410372d6b83230df227.tar.gz llvm-70b63374f24a8e05389bb410372d6b83230df227.tar.bz2 llvm-70b63374f24a8e05389bb410372d6b83230df227.tar.xz | |
ARM64: implement cunning optimisation from AArch64
A vector extract followed by a dup can become a single instruction even if the
types don't match. AArch64 handled this in ISelLowering, but a few reasonably
simple patterns can take care of it in TableGen, so that's where I've put it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206573 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM64/dup.ll | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/test/CodeGen/ARM64/dup.ll b/test/CodeGen/ARM64/dup.ll index e65957522b..97774a7d18 100644 --- a/test/CodeGen/ARM64/dup.ll +++ b/test/CodeGen/ARM64/dup.ll @@ -297,10 +297,11 @@ define <2 x i64> @h(i64 %a, i64 %b) nounwind readnone { ; the scalar corresponding to the vector type is illegal (e.g. a <4 x i16> ; BUILD_VECTOR will have an i32 as its source). In that case, the operation is ; not a simple "dup vD.4h, vN.h[idx]" after all, and we crashed. +; +; *However*, it is a dup vD.4h, vN.h[2*idx]. define <4 x i16> @test_build_illegal(<4 x i32> %in) { ; CHECK-LABEL: test_build_illegal: -; CHECK: umov.s [[WTMP:w[0-9]+]], v0[3] -; CHECK: dup.4h v0, [[WTMP]] +; CHECK: dup.4h v0, v0[6] %val = extractelement <4 x i32> %in, i32 3 %smallval = trunc i32 %val to i16 %vec = insertelement <4x i16> undef, i16 %smallval, i32 3 |