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| author | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-01-29 15:12:02 +0000 |
|---|---|---|
| committer | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-01-29 15:12:02 +0000 |
| commit | 72d4223ff57f6d03d7802e100cc38634c14c70dc (patch) | |
| tree | 896cea50b6e7a7956ee0ff3bc1c44cf94892dcff /test | |
| parent | 88390209daa6a501e010624a4328508f9b6ffd24 (diff) | |
| download | llvm-72d4223ff57f6d03d7802e100cc38634c14c70dc.tar.gz llvm-72d4223ff57f6d03d7802e100cc38634c14c70dc.tar.bz2 llvm-72d4223ff57f6d03d7802e100cc38634c14c70dc.tar.xz | |
[mips][msa] Add fill.d instruction.
This instruction is only available on Mips64 cores
that implement the MSA ASE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200400 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/Mips/msa/2r_vector_scalar.ll | 13 | ||||
| -rw-r--r-- | test/MC/Mips/msa/test_2r_msa64.s | 11 |
2 files changed, 23 insertions, 1 deletions
diff --git a/test/CodeGen/Mips/msa/2r_vector_scalar.ll b/test/CodeGen/Mips/msa/2r_vector_scalar.ll index c304ede366..64e459e4d9 100644 --- a/test/CodeGen/Mips/msa/2r_vector_scalar.ll +++ b/test/CodeGen/Mips/msa/2r_vector_scalar.ll @@ -5,6 +5,10 @@ ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS32 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | \ ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS32 +; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 < %s | \ +; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS64 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=+msa,+fp64 < %s | \ +; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS64 @llvm_mips_fill_b_ARG1 = global i32 23, align 16 @llvm_mips_fill_b_RES = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, align 16 @@ -21,6 +25,7 @@ declare <16 x i8> @llvm.mips.fill.b(i32) nounwind ; MIPS-ANY: llvm_mips_fill_b_test: ; MIPS32-DAG: lw [[R1:\$[0-9]+]], +; MIPS64-DAG: ld [[R1:\$[0-9]+]], ; MIPS-ANY-DAG: fill.b [[R2:\$w[0-9]+]], [[R1]] ; MIPS-ANY-DAG: st.b [[R2]], ; MIPS-ANY: .size llvm_mips_fill_b_test @@ -40,6 +45,7 @@ declare <8 x i16> @llvm.mips.fill.h(i32) nounwind ; MIPS-ANY: llvm_mips_fill_h_test: ; MIPS32-DAG: lw [[R1:\$[0-9]+]], +; MIPS64-DAG: ld [[R1:\$[0-9]+]], ; MIPS-ANY-DAG: fill.h [[R2:\$w[0-9]+]], [[R1]] ; MIPS-ANY-DAG: st.h [[R2]], ; MIPS-ANY: .size llvm_mips_fill_h_test @@ -59,6 +65,7 @@ declare <4 x i32> @llvm.mips.fill.w(i32) nounwind ; MIPS-ANY: llvm_mips_fill_w_test: ; MIPS32-DAG: lw [[R1:\$[0-9]+]], +; MIPS64-DAG: ld [[R1:\$[0-9]+]], ; MIPS-ANY-DAG: fill.w [[R2:\$w[0-9]+]], [[R1]] ; MIPS-ANY-DAG: st.w [[R2]], ; MIPS-ANY: .size llvm_mips_fill_w_test @@ -79,11 +86,15 @@ declare <2 x i64> @llvm.mips.fill.d(i64) nounwind ; MIPS-ANY: llvm_mips_fill_d_test: ; MIPS32-DAG: lw [[R1:\$[0-9]+]], 0( ; MIPS32-DAG: lw [[R2:\$[0-9]+]], 4( +; MIPS64-DAG: ld [[R1:\$[0-9]+]], %got_disp(llvm_mips_fill_d_ARG1) ; MIPS32-DAG: ldi.b [[R3:\$w[0-9]+]], 0 ; MIPS32-DAG: insert.w [[R3]][0], [[R1]] ; MIPS32-DAG: insert.w [[R3]][1], [[R2]] ; MIPS32-DAG: insert.w [[R3]][2], [[R1]] ; MIPS32-DAG: insert.w [[R3]][3], [[R2]] +; MIPS64-DAG: fill.d [[WD:\$w[0-9]+]], [[R1]] ; MIPS32-DAG: st.w [[R3]], +; MIPS64-DAG: ld [[RD:\$[0-9]+]], %got_disp(llvm_mips_fill_d_RES) +; MIPS64-DAG: st.d [[WD]], 0([[RD]]) ; MIPS-ANY: .size llvm_mips_fill_d_test -; +;
\ No newline at end of file diff --git a/test/MC/Mips/msa/test_2r_msa64.s b/test/MC/Mips/msa/test_2r_msa64.s new file mode 100644 index 0000000000..743fb88087 --- /dev/null +++ b/test/MC/Mips/msa/test_2r_msa64.s @@ -0,0 +1,11 @@ +# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s +# +# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -filetype=obj -o - | \ +# RUN: llvm-objdump -d -arch=mips64 -mattr=+msa - | \ +# RUN: FileCheck %s -check-prefix=CHECKOBJDUMP +# +# CHECK: fill.d $w27, $9 # encoding: [0x7b,0x03,0x4e,0xde] + +# CHECKOBJDUMP: fill.d $w27, $9 + + fill.d $w27, $9 |