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author | Michael Zolotukhin <mzolotukhin@apple.com> | 2014-04-21 05:33:09 +0000 |
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committer | Michael Zolotukhin <mzolotukhin@apple.com> | 2014-04-21 05:33:09 +0000 |
commit | 7d5100d14edd6d1595cc60ce5f89b64bfc564ef4 (patch) | |
tree | 8032a932e0cf8fbccd0ddd3083c69aff432fe8e7 /test | |
parent | 29e0c0b57cb6002565b5b84b15864357947914b3 (diff) | |
download | llvm-7d5100d14edd6d1595cc60ce5f89b64bfc564ef4.tar.gz llvm-7d5100d14edd6d1595cc60ce5f89b64bfc564ef4.tar.bz2 llvm-7d5100d14edd6d1595cc60ce5f89b64bfc564ef4.tar.xz |
Implement builtins for safe division: safe.sdiv.iN, safe.udiv.iN, safe.srem.iN,
safe.urem.iN (iN = i8, i16, i32, or i64).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206732 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/ARM64/SafeDivRemIntrinsics-Opts.ll | 112 | ||||
-rw-r--r-- | test/CodeGen/ARM64/SafeDivRemIntrinsics.ll | 152 | ||||
-rw-r--r-- | test/CodeGen/X86/SafeDivRemIntrinsics-Opts.ll | 110 | ||||
-rw-r--r-- | test/CodeGen/X86/SafeDivRemIntrinsics.ll | 144 |
4 files changed, 518 insertions, 0 deletions
diff --git a/test/CodeGen/ARM64/SafeDivRemIntrinsics-Opts.ll b/test/CodeGen/ARM64/SafeDivRemIntrinsics-Opts.ll new file mode 100644 index 0000000000..d722818e2e --- /dev/null +++ b/test/CodeGen/ARM64/SafeDivRemIntrinsics-Opts.ll @@ -0,0 +1,112 @@ +; RUN: llc < %s -march=arm64 | FileCheck %s +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" + +%divovf32 = type { i32, i1 } + +declare %divovf32 @llvm.safe.sdiv.i32(i32, i32) nounwind readnone +declare %divovf32 @llvm.safe.udiv.i32(i32, i32) nounwind readnone + +; CHECK-LABEL: sdiv32_results_unused +; CHECK: entry +; CHECK-NEXT: ret +define void @sdiv32_results_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + ret void +} + +; CHECK-LABEL: sdiv32_div_result_unused +; CHECK-NOT: sdiv{{[ ]}} +define i1 @sdiv32_div_result_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + %bit = extractvalue %divovf32 %divr, 1 + ret i1 %bit +} + +; CHECK-LABEL: sdiv32_flag_result_unused +; CHECK-NOT: cb +; CHECK: sdiv{{[ ]}} +define i32 @sdiv32_flag_result_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + %div = extractvalue %divovf32 %divr, 0 + ret i32 %div +} + +; CHECK-LABEL: sdiv32_result_returned +; CHECK: sdiv{{[ ]}} +define %divovf32 @sdiv32_result_returned(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + ret %divovf32 %divr +} + +; CHECK-LABEL: sdiv32_trap_relinked +; CHECK-NOT: %div.divmin +; CHECK-NOT: %div.divz +define i32 @sdiv32_trap_relinked(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + %div = extractvalue %divovf32 %divr, 0 + %bit = extractvalue %divovf32 %divr, 1 + br i1 %bit, label %trap.bb, label %ok.bb +trap.bb: + ret i32 7 +ok.bb: + ret i32 %div +} + +; CHECK-LABEL: udiv32_results_unused +; CHECK: entry +; CHECK-NEXT: ret +define void @udiv32_results_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + ret void +} + +; CHECK-LABEL: udiv32_div_result_unused +; CHECK-NOT: udiv{{[ ]}} +define i1 @udiv32_div_result_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + %bit = extractvalue %divovf32 %divr, 1 + ret i1 %bit +} + +; CHECK-LABEL: udiv32_flag_result_unused +; CHECK-NOT: cb +; CHECK: udiv{{[ ]}} +define i32 @udiv32_flag_result_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + %div = extractvalue %divovf32 %divr, 0 + ret i32 %div +} + +; CHECK-LABEL: udiv32_result_returned +; CHECK: udiv{{[ ]}} +define %divovf32 @udiv32_result_returned(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + ret %divovf32 %divr +} + +; CHECK-LABEL: udiv32_trap_relinked +; CHECK-NOT: %div.divz +define i32 @udiv32_trap_relinked(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + %div = extractvalue %divovf32 %divr, 0 + %bit = extractvalue %divovf32 %divr, 1 + br i1 %bit, label %trap.bb, label %ok.bb +trap.bb: + ret i32 7 +ok.bb: + ret i32 %div +} + +!llvm.ident = !{!0} + +!0 = metadata !{metadata !"clang version 3.5.0 "} diff --git a/test/CodeGen/ARM64/SafeDivRemIntrinsics.ll b/test/CodeGen/ARM64/SafeDivRemIntrinsics.ll new file mode 100644 index 0000000000..5c4e58b37d --- /dev/null +++ b/test/CodeGen/ARM64/SafeDivRemIntrinsics.ll @@ -0,0 +1,152 @@ +; RUN: llc < %s -march=arm64 | FileCheck %s +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" + +%divovf8 = type { i8, i1 } +%divovf16 = type { i16, i1 } +%divovf32 = type { i32, i1 } +%divovf64 = type { i64, i1 } + +declare %divovf8 @llvm.safe.sdiv.i8(i8, i8) nounwind readnone +declare %divovf16 @llvm.safe.sdiv.i16(i16, i16) nounwind readnone +declare %divovf32 @llvm.safe.sdiv.i32(i32, i32) nounwind readnone +declare %divovf64 @llvm.safe.sdiv.i64(i64, i64) nounwind readnone + +declare %divovf8 @llvm.safe.srem.i8(i8, i8) nounwind readnone +declare %divovf16 @llvm.safe.srem.i16(i16, i16) nounwind readnone +declare %divovf32 @llvm.safe.srem.i32(i32, i32) nounwind readnone +declare %divovf64 @llvm.safe.srem.i64(i64, i64) nounwind readnone + +declare %divovf8 @llvm.safe.udiv.i8(i8, i8) nounwind readnone +declare %divovf16 @llvm.safe.udiv.i16(i16, i16) nounwind readnone +declare %divovf32 @llvm.safe.udiv.i32(i32, i32) nounwind readnone +declare %divovf64 @llvm.safe.udiv.i64(i64, i64) nounwind readnone + +declare %divovf8 @llvm.safe.urem.i8(i8, i8) nounwind readnone +declare %divovf16 @llvm.safe.urem.i16(i16, i16) nounwind readnone +declare %divovf32 @llvm.safe.urem.i32(i32, i32) nounwind readnone +declare %divovf64 @llvm.safe.urem.i64(i64, i64) nounwind readnone + +; CHECK-LABEL: sdiv8 +; CHECK: sdiv{{[ ]}} +define %divovf8 @sdiv8(i8 %x, i8 %y) { +entry: + %divr = call %divovf8 @llvm.safe.sdiv.i8(i8 %x, i8 %y) + ret %divovf8 %divr +} +; CHECK-LABEL: sdiv16 +; CHECK: sdiv{{[ ]}} +define %divovf16 @sdiv16(i16 %x, i16 %y) { +entry: + %divr = call %divovf16 @llvm.safe.sdiv.i16(i16 %x, i16 %y) + ret %divovf16 %divr +} +; CHECK-LABEL: sdiv32 +; CHECK: sdiv{{[ ]}} +define %divovf32 @sdiv32(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + ret %divovf32 %divr +} +; CHECK-LABEL: sdiv64 +; CHECK: sdiv{{[ ]}} +define %divovf64 @sdiv64(i64 %x, i64 %y) { +entry: + %divr = call %divovf64 @llvm.safe.sdiv.i64(i64 %x, i64 %y) + ret %divovf64 %divr +} +; CHECK-LABEL: udiv8 +; CHECK: udiv{{[ ]}} +define %divovf8 @udiv8(i8 %x, i8 %y) { +entry: + %divr = call %divovf8 @llvm.safe.udiv.i8(i8 %x, i8 %y) + ret %divovf8 %divr +} +; CHECK-LABEL: udiv16 +; CHECK: udiv{{[ ]}} +define %divovf16 @udiv16(i16 %x, i16 %y) { +entry: + %divr = call %divovf16 @llvm.safe.udiv.i16(i16 %x, i16 %y) + ret %divovf16 %divr +} +; CHECK-LABEL: udiv32 +; CHECK: udiv{{[ ]}} +define %divovf32 @udiv32(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + ret %divovf32 %divr +} +; CHECK-LABEL: udiv64 +; CHECK: udiv{{[ ]}} +define %divovf64 @udiv64(i64 %x, i64 %y) { +entry: + %divr = call %divovf64 @llvm.safe.udiv.i64(i64 %x, i64 %y) + ret %divovf64 %divr +} +; CHECK-LABEL: srem8 +; CHECK: sdiv{{[ ]}} +; CHECK: msub{{[ ]}} +define %divovf8 @srem8(i8 %x, i8 %y) { +entry: + %remr = call %divovf8 @llvm.safe.srem.i8(i8 %x, i8 %y) + ret %divovf8 %remr +} +; CHECK-LABEL: srem16 +; CHECK: sdiv{{[ ]}} +; CHECK: msub{{[ ]}} +define %divovf16 @srem16(i16 %x, i16 %y) { +entry: + %remr = call %divovf16 @llvm.safe.srem.i16(i16 %x, i16 %y) + ret %divovf16 %remr +} +; CHECK-LABEL: srem32 +; CHECK: sdiv{{[ ]}} +; CHECK: msub{{[ ]}} +define %divovf32 @srem32(i32 %x, i32 %y) { +entry: + %remr = call %divovf32 @llvm.safe.srem.i32(i32 %x, i32 %y) + ret %divovf32 %remr +} +; CHECK-LABEL: srem64 +; CHECK: sdiv{{[ ]}} +; CHECK: msub{{[ ]}} +define %divovf64 @srem64(i64 %x, i64 %y) { +entry: + %remr = call %divovf64 @llvm.safe.srem.i64(i64 %x, i64 %y) + ret %divovf64 %remr +} +; CHECK-LABEL: urem8 +; CHECK: udiv{{[ ]}} +; CHECK: msub{{[ ]}} +define %divovf8 @urem8(i8 %x, i8 %y) { +entry: + %remr = call %divovf8 @llvm.safe.urem.i8(i8 %x, i8 %y) + ret %divovf8 %remr +} +; CHECK-LABEL: urem16 +; CHECK: udiv{{[ ]}} +; CHECK: msub{{[ ]}} +define %divovf16 @urem16(i16 %x, i16 %y) { +entry: + %remr = call %divovf16 @llvm.safe.urem.i16(i16 %x, i16 %y) + ret %divovf16 %remr +} +; CHECK-LABEL: urem32 +; CHECK: udiv{{[ ]}} +; CHECK: msub{{[ ]}} +define %divovf32 @urem32(i32 %x, i32 %y) { +entry: + %remr = call %divovf32 @llvm.safe.urem.i32(i32 %x, i32 %y) + ret %divovf32 %remr +} +; CHECK-LABEL: urem64 +; CHECK: udiv{{[ ]}} +; CHECK: msub{{[ ]}} +define %divovf64 @urem64(i64 %x, i64 %y) { +entry: + %remr = call %divovf64 @llvm.safe.urem.i64(i64 %x, i64 %y) + ret %divovf64 %remr +} + +!llvm.ident = !{!0} + +!0 = metadata !{metadata !"clang version 3.5.0 "} diff --git a/test/CodeGen/X86/SafeDivRemIntrinsics-Opts.ll b/test/CodeGen/X86/SafeDivRemIntrinsics-Opts.ll new file mode 100644 index 0000000000..90763166b7 --- /dev/null +++ b/test/CodeGen/X86/SafeDivRemIntrinsics-Opts.ll @@ -0,0 +1,110 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" + +%divovf32 = type { i32, i1 } + +declare %divovf32 @llvm.safe.sdiv.i32(i32, i32) nounwind readnone +declare %divovf32 @llvm.safe.udiv.i32(i32, i32) nounwind readnone + +; CHECK-LABEL: sdiv32_results_unused +; CHECK: entry +; CHECK-NEXT: ret +define void @sdiv32_results_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + ret void +} + +; CHECK-LABEL: sdiv32_div_result_unused +; CHECK-NOT: idiv +define i1 @sdiv32_div_result_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + %bit = extractvalue %divovf32 %divr, 1 + ret i1 %bit +} + +; CHECK-LABEL: sdiv32_flag_result_unused +; CHECK: idiv +define i32 @sdiv32_flag_result_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + %div = extractvalue %divovf32 %divr, 0 + ret i32 %div +} + +; CHECK-LABEL: sdiv32_result_returned +; CHECK: idiv +define %divovf32 @sdiv32_result_returned(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + ret %divovf32 %divr +} + +; CHECK-LABEL: sdiv32_trap_relinked +; CHECK: %div.div{{min|z}} +define i32 @sdiv32_trap_relinked(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + %div = extractvalue %divovf32 %divr, 0 + %bit = extractvalue %divovf32 %divr, 1 + br i1 %bit, label %trap.bb, label %ok.bb +trap.bb: + ret i32 7 +ok.bb: + ret i32 %div +} + +; CHECK-LABEL: udiv32_results_unused +; CHECK: entry +; CHECK-NEXT: ret +define void @udiv32_results_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + ret void +} + +; CHECK-LABEL: udiv32_div_result_unused +; CHECK-NOT: udiv{{[ ]}} +define i1 @udiv32_div_result_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + %bit = extractvalue %divovf32 %divr, 1 + ret i1 %bit +} + +; CHECK-LABEL: udiv32_flag_result_unused +; CHECK-NOT: cb +; CHECK: {{[ ]}}div +define i32 @udiv32_flag_result_unused(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + %div = extractvalue %divovf32 %divr, 0 + ret i32 %div +} + +; CHECK-LABEL: udiv32_result_returned +; CHECK: {{[ ]}}div +define %divovf32 @udiv32_result_returned(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + ret %divovf32 %divr +} + +; CHECK-LABEL: udiv32_trap_relinked +; CHECK: %div.divz +define i32 @udiv32_trap_relinked(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + %div = extractvalue %divovf32 %divr, 0 + %bit = extractvalue %divovf32 %divr, 1 + br i1 %bit, label %trap.bb, label %ok.bb +trap.bb: + ret i32 7 +ok.bb: + ret i32 %div +} + +!llvm.ident = !{!0} + +!0 = metadata !{metadata !"clang version 3.5.0 "} diff --git a/test/CodeGen/X86/SafeDivRemIntrinsics.ll b/test/CodeGen/X86/SafeDivRemIntrinsics.ll new file mode 100644 index 0000000000..748034366f --- /dev/null +++ b/test/CodeGen/X86/SafeDivRemIntrinsics.ll @@ -0,0 +1,144 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" + +%divovf8 = type { i8, i1 } +%divovf16 = type { i16, i1 } +%divovf32 = type { i32, i1 } +%divovf64 = type { i64, i1 } + +declare %divovf8 @llvm.safe.sdiv.i8(i8, i8) nounwind readnone +declare %divovf16 @llvm.safe.sdiv.i16(i16, i16) nounwind readnone +declare %divovf32 @llvm.safe.sdiv.i32(i32, i32) nounwind readnone +declare %divovf64 @llvm.safe.sdiv.i64(i64, i64) nounwind readnone + +declare %divovf8 @llvm.safe.srem.i8(i8, i8) nounwind readnone +declare %divovf16 @llvm.safe.srem.i16(i16, i16) nounwind readnone +declare %divovf32 @llvm.safe.srem.i32(i32, i32) nounwind readnone +declare %divovf64 @llvm.safe.srem.i64(i64, i64) nounwind readnone + +declare %divovf8 @llvm.safe.udiv.i8(i8, i8) nounwind readnone +declare %divovf16 @llvm.safe.udiv.i16(i16, i16) nounwind readnone +declare %divovf32 @llvm.safe.udiv.i32(i32, i32) nounwind readnone +declare %divovf64 @llvm.safe.udiv.i64(i64, i64) nounwind readnone + +declare %divovf8 @llvm.safe.urem.i8(i8, i8) nounwind readnone +declare %divovf16 @llvm.safe.urem.i16(i16, i16) nounwind readnone +declare %divovf32 @llvm.safe.urem.i32(i32, i32) nounwind readnone +declare %divovf64 @llvm.safe.urem.i64(i64, i64) nounwind readnone + +; CHECK-LABEL: sdiv8 +; CHECK: idivb{{[ ]}} +define %divovf8 @sdiv8(i8 %x, i8 %y) { +entry: + %divr = call %divovf8 @llvm.safe.sdiv.i8(i8 %x, i8 %y) + ret %divovf8 %divr +} +; CHECK-LABEL: sdiv16 +; CHECK: idivw{{[ ]}} +define %divovf16 @sdiv16(i16 %x, i16 %y) { +entry: + %divr = call %divovf16 @llvm.safe.sdiv.i16(i16 %x, i16 %y) + ret %divovf16 %divr +} +; CHECK-LABEL: sdiv32 +; CHECK: idivl{{[ ]}} +define %divovf32 @sdiv32(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y) + ret %divovf32 %divr +} +; CHECK-LABEL: sdiv64 +; CHECK: idivq{{[ ]}} +define %divovf64 @sdiv64(i64 %x, i64 %y) { +entry: + %divr = call %divovf64 @llvm.safe.sdiv.i64(i64 %x, i64 %y) + ret %divovf64 %divr +} +; CHECK-LABEL: udiv8 +; CHECK: {{[ ]}}divb{{[ ]}} +define %divovf8 @udiv8(i8 %x, i8 %y) { +entry: + %divr = call %divovf8 @llvm.safe.udiv.i8(i8 %x, i8 %y) + ret %divovf8 %divr +} +; CHECK-LABEL: udiv16 +; CHECK: {{[ ]}}divw{{[ ]}} +define %divovf16 @udiv16(i16 %x, i16 %y) { +entry: + %divr = call %divovf16 @llvm.safe.udiv.i16(i16 %x, i16 %y) + ret %divovf16 %divr +} +; CHECK-LABEL: udiv32 +; CHECK: {{[ ]}}divl{{[ ]}} +define %divovf32 @udiv32(i32 %x, i32 %y) { +entry: + %divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y) + ret %divovf32 %divr +} +; CHECK-LABEL: udiv64 +; CHECK: {{[ ]}}divq{{[ ]}} +define %divovf64 @udiv64(i64 %x, i64 %y) { +entry: + %divr = call %divovf64 @llvm.safe.udiv.i64(i64 %x, i64 %y) + ret %divovf64 %divr +} +; CHECK-LABEL: srem8 +; CHECK: idivb{{[ ]}} +define %divovf8 @srem8(i8 %x, i8 %y) { +entry: + %remr = call %divovf8 @llvm.safe.srem.i8(i8 %x, i8 %y) + ret %divovf8 %remr +} +; CHECK-LABEL: srem16 +; CHECK: idivw{{[ ]}} +define %divovf16 @srem16(i16 %x, i16 %y) { +entry: + %remr = call %divovf16 @llvm.safe.srem.i16(i16 %x, i16 %y) + ret %divovf16 %remr +} +; CHECK-LABEL: srem32 +; CHECK: idivl{{[ ]}} +define %divovf32 @srem32(i32 %x, i32 %y) { +entry: + %remr = call %divovf32 @llvm.safe.srem.i32(i32 %x, i32 %y) + ret %divovf32 %remr +} +; CHECK-LABEL: srem64 +; CHECK: idivq{{[ ]}} +define %divovf64 @srem64(i64 %x, i64 %y) { +entry: + %remr = call %divovf64 @llvm.safe.srem.i64(i64 %x, i64 %y) + ret %divovf64 %remr +} +; CHECK-LABEL: urem8 +; CHECK: {{[ ]}}divb{{[ ]}} +define %divovf8 @urem8(i8 %x, i8 %y) { +entry: + %remr = call %divovf8 @llvm.safe.urem.i8(i8 %x, i8 %y) + ret %divovf8 %remr +} +; CHECK-LABEL: urem16 +; CHECK: {{[ ]}}divw{{[ ]}} +define %divovf16 @urem16(i16 %x, i16 %y) { +entry: + %remr = call %divovf16 @llvm.safe.urem.i16(i16 %x, i16 %y) + ret %divovf16 %remr +} +; CHECK-LABEL: urem32 +; CHECK: {{[ ]}}divl{{[ ]}} +define %divovf32 @urem32(i32 %x, i32 %y) { +entry: + %remr = call %divovf32 @llvm.safe.urem.i32(i32 %x, i32 %y) + ret %divovf32 %remr +} +; CHECK-LABEL: urem64 +; CHECK: {{[ ]}}divq{{[ ]}} +define %divovf64 @urem64(i64 %x, i64 %y) { +entry: + %remr = call %divovf64 @llvm.safe.urem.i64(i64 %x, i64 %y) + ret %divovf64 %remr +} + +!llvm.ident = !{!0} + +!0 = metadata !{metadata !"clang version 3.5.0 "} |