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authorEvan Cheng <evan.cheng@apple.com>2007-12-07 08:07:39 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-12-07 08:07:39 +0000
commit8a86c3f3aee55f68cc227362031596edd93f7170 (patch)
treecd1d3f5439f13bcb1df3e88112e5332b92b14d01 /test
parent050fe638a5e543674133af6abceb1f0967b84134 (diff)
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Much improved v8i16 shuffles. (Step 1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44676 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/2007-12-05-VectorShuffle.ll9
-rw-r--r--test/CodeGen/X86/vec_shuffle-12.ll37
2 files changed, 37 insertions, 9 deletions
diff --git a/test/CodeGen/X86/2007-12-05-VectorShuffle.ll b/test/CodeGen/X86/2007-12-05-VectorShuffle.ll
deleted file mode 100644
index 8933a63835..0000000000
--- a/test/CodeGen/X86/2007-12-05-VectorShuffle.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
-
-define void @test(<8 x i16>* %res, <8 x i16>* %A, <8 x i16>* %B) {
- %tmp1 = load <8 x i16>* %A
- %tmp2 = load <8 x i16>* %B
- %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
- store <8 x i16> %tmp3, <8 x i16>* %res
- ret void
-}
diff --git a/test/CodeGen/X86/vec_shuffle-12.ll b/test/CodeGen/X86/vec_shuffle-12.ll
new file mode 100644
index 0000000000..f66f3bbbd8
--- /dev/null
+++ b/test/CodeGen/X86/vec_shuffle-12.ll
@@ -0,0 +1,37 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpck
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pextrw | count 7
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pinsrw | count 7
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshuf | count 2
+
+define void @t1(<8 x i16>* %res, <8 x i16>* %A, <8 x i16>* %B) {
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
+ store <8 x i16> %tmp3, <8 x i16>* %res
+ ret void
+}
+
+define void @t2(<8 x i16>* %res, <8 x i16>* %A, <8 x i16>* %B) {
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 13, i32 4, i32 5, i32 6, i32 7 >
+ store <8 x i16> %tmp3, <8 x i16>* %res
+ ret void
+}
+
+define void @t3(<8 x i16>* %res, <8 x i16>* %A, <8 x i16>* %B) {
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 >
+ store <8 x i16> %tmp3, <8 x i16>* %res
+ ret void
+}
+
+define void @t4(<8 x i16>* %res, <8 x i16>* %A, <8 x i16>* %B) {
+ %tmp1 = load <8 x i16>* %A
+ %tmp2 = load <8 x i16>* %B
+ %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
+ store <8 x i16> %tmp3, <8 x i16>* %res
+ ret void
+}