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authorEvan Cheng <evan.cheng@apple.com>2008-09-11 20:07:10 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-09-11 20:07:10 +0000
commit8db866808c803f9bdcd45c56a042fedd8cccd5bc (patch)
tree0616d920ec6af7dc1ea68c275f8065140b736e13 /test
parentac34a00fe0784cd6efc466f03f93ab1017fa9726 (diff)
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Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g.
vr1024 = extract_subreg vr1025, 1 ... vr1024 = mov8rr AH If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56118 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/2008-09-11-CoalescerBug2.ll33
1 files changed, 33 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll b/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
new file mode 100644
index 0000000000..9403344911
--- /dev/null
+++ b/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
@@ -0,0 +1,33 @@
+; RUN: llvm-as < %s | llc -march=x86
+; PR2748
+
+@g_73 = external global i32 ; <i32*> [#uses=1]
+@g_5 = external global i32 ; <i32*> [#uses=1]
+
+define i32 @func_44(i16 signext %p_46) nounwind {
+entry:
+ %0 = load i32* @g_5, align 4 ; <i32> [#uses=1]
+ %1 = ashr i32 %0, 1 ; <i32> [#uses=1]
+ %2 = icmp sgt i32 %1, 1 ; <i1> [#uses=1]
+ %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
+ %4 = load i32* @g_73, align 4 ; <i32> [#uses=1]
+ %5 = zext i16 %p_46 to i64 ; <i64> [#uses=1]
+ %6 = sub i64 0, %5 ; <i64> [#uses=1]
+ %7 = trunc i64 %6 to i8 ; <i8> [#uses=2]
+ %8 = trunc i32 %4 to i8 ; <i8> [#uses=2]
+ %9 = icmp eq i8 %8, 0 ; <i1> [#uses=1]
+ br i1 %9, label %bb11, label %bb12
+
+bb11: ; preds = %entry
+ %10 = urem i8 %7, %8 ; <i8> [#uses=1]
+ br label %bb12
+
+bb12: ; preds = %bb11, %entry
+ %.014.in = phi i8 [ %10, %bb11 ], [ %7, %entry ] ; <i8> [#uses=1]
+ %11 = icmp ne i8 %.014.in, 0 ; <i1> [#uses=1]
+ %12 = zext i1 %11 to i32 ; <i32> [#uses=1]
+ %13 = tail call i32 (...)* @func_48( i32 %12, i32 %3, i32 0 ) nounwind ; <i32> [#uses=0]
+ ret i32 undef
+}
+
+declare i32 @func_48(...)