diff options
| author | Jim Grosbach <grosbach@apple.com> | 2014-04-21 21:45:57 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2014-04-21 21:45:57 +0000 |
| commit | 91c655736e8a48ac4c464a1c95f29d6147370e57 (patch) | |
| tree | 25151b659c3001b6a08d228e6c1ffa5c21bd8f66 /test | |
| parent | 8a412da0eaf2b694091471a8420e8d47a84816ac (diff) | |
| download | llvm-91c655736e8a48ac4c464a1c95f29d6147370e57.tar.gz llvm-91c655736e8a48ac4c464a1c95f29d6147370e57.tar.bz2 llvm-91c655736e8a48ac4c464a1c95f29d6147370e57.tar.xz | |
ARM64: Improve diagnostics for malformed reg+reg addressing mode.
Make sure only general purpose registers are valid for offset regs and
that 32-bit regs are only valid for sxtw and uxtw extends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206799 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/ARM64/diags.s | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/test/MC/ARM64/diags.s b/test/MC/ARM64/diags.s index e82147e6c2..424d9547fe 100644 --- a/test/MC/ARM64/diags.s +++ b/test/MC/ARM64/diags.s @@ -74,6 +74,18 @@ foo: ; CHECK-ERRORS: ^ +; Check that register offset addressing modes only accept 32-bit offset +; registers when using uxtw/sxtw extends. Everything else requires a 64-bit +; register. + str d1, [x3, w3, sxtx #3] + ldr s1, [x3, d3, sxtx #2] + +; CHECK-ERRORS: 32-bit general purpose offset register requires sxtw or uxtw extend +; CHECK-ERRORS: str d1, [x3, w3, sxtx #3] +; CHECK-ERRORS: ^ +; CHECK-ERRORS: error: 64-bit general purpose offset register expected +; CHECK-ERRORS: ldr s1, [x3, d3, sxtx #2] +; CHECK-ERRORS: ^ ; Shift immediates range checking. sqrshrn b4, h9, #10 |