diff options
| author | Nick Lewycky <nicholas@mxc.ca> | 2011-07-08 00:19:27 +0000 |
|---|---|---|
| committer | Nick Lewycky <nicholas@mxc.ca> | 2011-07-08 00:19:27 +0000 |
| commit | 9bf45d0b1a5d9229978135d48de803edf729599e (patch) | |
| tree | b3159dc92de254581afc31be49c2d143c6dca672 /test | |
| parent | 77ed1353bfd456efd35c2b6e17115ce624d19e92 (diff) | |
| download | llvm-9bf45d0b1a5d9229978135d48de803edf729599e.tar.gz llvm-9bf45d0b1a5d9229978135d48de803edf729599e.tar.bz2 llvm-9bf45d0b1a5d9229978135d48de803edf729599e.tar.xz | |
Let the inline asm 'q' constraint match float, and on 64-bit double too.
Fixes PR9602!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134665 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/inline-asm-q-regs.ll | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/test/CodeGen/X86/inline-asm-q-regs.ll b/test/CodeGen/X86/inline-asm-q-regs.ll index 321fd30dbb..1c8e2f9eec 100644 --- a/test/CodeGen/X86/inline-asm-q-regs.ll +++ b/test/CodeGen/X86/inline-asm-q-regs.ll @@ -3,8 +3,20 @@ %0 = type { i64, i64, i64, i64, i64 } ; type %0 -define void @t() nounwind { +define void @test1() nounwind { entry: %asmtmp = call %0 asm sideeffect "mov %cr0, $0 \0Amov %cr2, $1 \0Amov %cr3, $2 \0Amov %cr4, $3 \0Amov %cr8, $0 \0A", "=q,=q,=q,=q,=q,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%0> [#uses=0] ret void } + +; PR9602 +define void @test2(float %tmp) nounwind { + call void asm sideeffect "$0", "q"(float %tmp) nounwind + call void asm sideeffect "$0", "Q"(float %tmp) nounwind + ret void +} + +define void @test3(double %tmp) nounwind { + call void asm sideeffect "$0", "q"(double %tmp) nounwind + ret void +} |